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clk: qcom: gpucc-sm8350: Park RCG's clk source at XO during disable

The RCG's clk src has to be parked at XO while disabling as per the
HW recommendation, hence use clk_rcg2_shared_ops to achieve the same.

Fixes: 160758b05ab1 ("clk: qcom: add support for SM8350 GPUCC")
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # SM8350-HDK
Link: https://lore.kernel.org/r/20240621-sm8350-gpucc-fixes-v1-1-22db60c7c5d3@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

authored by

Taniya Das and committed by
Bjorn Andersson 313e2909 b45120fb

+3 -2
+3 -2
drivers/clk/qcom/gpucc-sm8350.c
··· 2 2 /* 3 3 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. 4 4 * Copyright (c) 2022, Linaro Limited 5 + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. 5 6 */ 6 7 7 8 #include <linux/clk.h> ··· 148 147 .parent_data = gpu_cc_parent_data_0, 149 148 .num_parents = ARRAY_SIZE(gpu_cc_parent_data_0), 150 149 .flags = CLK_SET_RATE_PARENT, 151 - .ops = &clk_rcg2_ops, 150 + .ops = &clk_rcg2_shared_ops, 152 151 }, 153 152 }; 154 153 ··· 170 169 .parent_data = gpu_cc_parent_data_1, 171 170 .num_parents = ARRAY_SIZE(gpu_cc_parent_data_1), 172 171 .flags = CLK_SET_RATE_PARENT, 173 - .ops = &clk_rcg2_ops, 172 + .ops = &clk_rcg2_shared_ops, 174 173 }, 175 174 }; 176 175