Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge master.kernel.org:/home/rmk/linux-2.6-arm

* master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 4278/1: configure pxa27x I2C SCL as "input"
[ARM] 4272/1: Missing symbol h1940_pm_return fix
[ARM] 4235/1: ns9xxx: declare the clock functions as "const"
[ARM] 4271/1: iop32x: fix ep80219 detection (support iq80219 platforms)
[ARM] 4270/2: mach-s3c2443/irq.c off by one error in dma irqs

+68 -13
+4
arch/arm/mach-iop32x/Kconfig
··· 4 4 5 5 comment "IOP32x Platform Types" 6 6 7 + config MACH_EP80219 8 + bool 9 + 7 10 config MACH_GLANTANK 8 11 bool "Enable support for the IO-Data GLAN Tank" 9 12 help ··· 22 19 23 20 config ARCH_IQ31244 24 21 bool "Enable support for EP80219/IQ31244" 22 + select MACH_EP80219 25 23 help 26 24 Say Y here if you want to run your kernel on the Intel EP80219 27 25 evaluation kit for the Intel 80219 processor (a IOP321 variant)
+51 -8
arch/arm/mach-iop32x/iq31244.c
··· 39 39 #include <asm/arch/time.h> 40 40 41 41 /* 42 - * The EP80219 and IQ31244 use the same machine ID. To find out 43 - * which of the two we're running on, we look at the processor ID. 42 + * Until March of 2007 iq31244 platforms and ep80219 platforms shared the 43 + * same machine id, and the processor type was used to select board type. 44 + * However this assumption breaks for an iq80219 board which is an iop219 45 + * processor on an iq31244 board. The force_ep80219 flag has been added 46 + * for old boot loaders using the iq31244 machine id for an ep80219 platform. 44 47 */ 48 + static int force_ep80219; 49 + 45 50 static int is_80219(void) 46 51 { 47 52 extern int processor_id; 48 53 return !!((processor_id & 0xffffffe0) == 0x69052e20); 54 + } 55 + 56 + static int is_ep80219(void) 57 + { 58 + if (machine_is_ep80219() || force_ep80219) 59 + return 1; 60 + else 61 + return 0; 49 62 } 50 63 51 64 ··· 67 54 */ 68 55 static void __init iq31244_timer_init(void) 69 56 { 70 - if (is_80219()) { 57 + if (is_ep80219()) { 71 58 /* 33.333 MHz crystal. */ 72 59 iop_init_time(200000000); 73 60 } else { ··· 178 165 179 166 static int __init iq31244_pci_init(void) 180 167 { 181 - if (machine_is_iq31244()) { 168 + if (is_ep80219()) 169 + pci_common_init(&ep80219_pci); 170 + else if (machine_is_iq31244()) { 182 171 if (is_80219()) { 183 - pci_common_init(&ep80219_pci); 184 - } else { 185 - pci_common_init(&iq31244_pci); 172 + printk("note: iq31244 board type has been selected\n"); 173 + printk("note: to select ep80219 operation:\n"); 174 + printk("\t1/ specify \"force_ep80219\" on the kernel" 175 + " command line\n"); 176 + printk("\t2/ update boot loader to pass" 177 + " the ep80219 id: %d\n", MACH_TYPE_EP80219); 186 178 } 179 + pci_common_init(&iq31244_pci); 187 180 } 188 181 189 182 return 0; ··· 296 277 platform_device_register(&iq31244_flash_device); 297 278 platform_device_register(&iq31244_serial_device); 298 279 299 - if (is_80219()) 280 + if (is_ep80219()) 300 281 pm_power_off = ep80219_power_off; 301 282 } 302 283 284 + static int __init force_ep80219_setup(char *str) 285 + { 286 + force_ep80219 = 1; 287 + return 1; 288 + } 289 + 290 + __setup("force_ep80219", force_ep80219_setup); 291 + 303 292 MACHINE_START(IQ31244, "Intel IQ31244") 293 + /* Maintainer: Intel Corp. */ 294 + .phys_io = IQ31244_UART, 295 + .io_pg_offst = ((IQ31244_UART) >> 18) & 0xfffc, 296 + .boot_params = 0xa0000100, 297 + .map_io = iq31244_map_io, 298 + .init_irq = iop32x_init_irq, 299 + .timer = &iq31244_timer, 300 + .init_machine = iq31244_init_machine, 301 + MACHINE_END 302 + 303 + /* There should have been an ep80219 machine identifier from the beginning. 304 + * Boot roms older than March 2007 do not know the ep80219 machine id. Pass 305 + * "force_ep80219" on the kernel command line, otherwise iq31244 operation 306 + * will be selected. 307 + */ 308 + MACHINE_START(EP80219, "Intel EP80219") 304 309 /* Maintainer: Intel Corp. */ 305 310 .phys_io = IQ31244_UART, 306 311 .io_pg_offst = ((IQ31244_UART) >> 18) & 0xfffc,
+2
arch/arm/mach-s3c2410/mach-h1940.c
··· 202 202 203 203 /* setup PM */ 204 204 205 + #ifdef CONFIG_PM_H1940 205 206 memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024); 207 + #endif 206 208 s3c2410_pm_init(); 207 209 } 208 210
+2
arch/arm/mach-s3c2440/mach-rx3715.c
··· 224 224 225 225 static void __init rx3715_init_machine(void) 226 226 { 227 + #ifdef CONFIG_PM_H1940 227 228 memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024); 229 + #endif 228 230 s3c2410_pm_init(); 229 231 230 232 s3c24xx_fb_set_platdata(&rx3715_lcdcfg);
+1 -1
arch/arm/mach-s3c2443/irq.c
··· 137 137 138 138 static void s3c2443_irq_demux_dma(unsigned int irq, struct irq_desc *desc) 139 139 { 140 - s3c2443_irq_demux(IRQ_S3C2443_DMA1, 6); 140 + s3c2443_irq_demux(IRQ_S3C2443_DMA0, 6); 141 141 } 142 142 143 143 #define INTMSK_DMA (1UL << (IRQ_S3C2443_DMA - IRQ_EINT0))
+7 -3
include/asm-arm/arch-ns9xxx/clock.h
··· 11 11 #ifndef __ASM_ARCH_CLOCK_H 12 12 #define __ASM_ARCH_CLOCK_H 13 13 14 + static inline u32 ns9xxx_systemclock(void) __attribute__((const)); 14 15 static inline u32 ns9xxx_systemclock(void) 15 16 { 16 17 /* ··· 20 19 return 353894400; 21 20 } 22 21 23 - static inline const u32 ns9xxx_cpuclock(void) 22 + static inline u32 ns9xxx_cpuclock(void) __attribute__((const)); 23 + static inline u32 ns9xxx_cpuclock(void) 24 24 { 25 25 return ns9xxx_systemclock() / 2; 26 26 } 27 27 28 - static inline const u32 ns9xxx_ahbclock(void) 28 + static inline u32 ns9xxx_ahbclock(void) __attribute__((const)); 29 + static inline u32 ns9xxx_ahbclock(void) 29 30 { 30 31 return ns9xxx_systemclock() / 4; 31 32 } 32 33 33 - static inline const u32 ns9xxx_bbusclock(void) 34 + static inline u32 ns9xxx_bbusclock(void) __attribute__((const)); 35 + static inline u32 ns9xxx_bbusclock(void) 34 36 { 35 37 return ns9xxx_systemclock() / 8; 36 38 }
+1 -1
include/asm-arm/arch-pxa/pxa-regs.h
··· 1476 1476 #define GPIO112_MMCCMD_MD (112 | GPIO_ALT_FN_1_OUT) 1477 1477 #define GPIO113_I2S_SYSCLK_MD (113 | GPIO_ALT_FN_1_OUT) 1478 1478 #define GPIO113_AC97_RESET_N_MD (113 | GPIO_ALT_FN_2_OUT) 1479 - #define GPIO117_I2CSCL_MD (117 | GPIO_ALT_FN_1_OUT) 1479 + #define GPIO117_I2CSCL_MD (117 | GPIO_ALT_FN_1_IN) 1480 1480 #define GPIO118_I2CSDA_MD (118 | GPIO_ALT_FN_1_IN) 1481 1481 1482 1482 /*