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drm/amdgpu: update VCN/JPEG RAS setting

Support VCN/JPEG RAS in both bare metal and SRIOV environment.

v2: update commit description.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Tao Zhou and committed by
Alex Deucher
3189501e 248c9635

+13 -11
+13 -11
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
··· 2348 2348 2349 2349 if (amdgpu_atomfirmware_sram_ecc_supported(adev)) { 2350 2350 dev_info(adev->dev, "SRAM ECC is active.\n"); 2351 - if (!amdgpu_sriov_vf(adev)) { 2351 + if (!amdgpu_sriov_vf(adev)) 2352 2352 adev->ras_hw_enabled |= ~(1 << AMDGPU_RAS_BLOCK__UMC | 2353 2353 1 << AMDGPU_RAS_BLOCK__DF); 2354 - 2355 - if (adev->ip_versions[VCN_HWIP][0] == IP_VERSION(2, 6, 0) || 2356 - adev->ip_versions[VCN_HWIP][0] == IP_VERSION(4, 0, 0)) 2357 - adev->ras_hw_enabled |= (1 << AMDGPU_RAS_BLOCK__VCN | 2358 - 1 << AMDGPU_RAS_BLOCK__JPEG); 2359 - else 2360 - adev->ras_hw_enabled &= ~(1 << AMDGPU_RAS_BLOCK__VCN | 2361 - 1 << AMDGPU_RAS_BLOCK__JPEG); 2362 - } else { 2354 + else 2363 2355 adev->ras_hw_enabled |= (1 << AMDGPU_RAS_BLOCK__PCIE_BIF | 2364 2356 1 << AMDGPU_RAS_BLOCK__SDMA | 2365 2357 1 << AMDGPU_RAS_BLOCK__GFX); 2366 - } 2358 + 2359 + /* VCN/JPEG RAS can be supported on both bare metal and 2360 + * SRIOV environment 2361 + */ 2362 + if (adev->ip_versions[VCN_HWIP][0] == IP_VERSION(2, 6, 0) || 2363 + adev->ip_versions[VCN_HWIP][0] == IP_VERSION(4, 0, 0)) 2364 + adev->ras_hw_enabled |= (1 << AMDGPU_RAS_BLOCK__VCN | 2365 + 1 << AMDGPU_RAS_BLOCK__JPEG); 2366 + else 2367 + adev->ras_hw_enabled &= ~(1 << AMDGPU_RAS_BLOCK__VCN | 2368 + 1 << AMDGPU_RAS_BLOCK__JPEG); 2367 2369 } else { 2368 2370 dev_info(adev->dev, "SRAM ECC is not presented.\n"); 2369 2371 }