tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 kexec fix from Thomas Gleixner:
"A single fix for the WBINVD issue introduced by the SME support which
causes kexec fails on non AMD/SME capable CPUs. Issue WBINVD only when
the CPU has SME and avoid doing so in a loop"

[ Side note: this patch fixes the problem, but it isn't entirely clear
why it is required. The wbinvd should just work regardless, but there
seems to be some system - as opposed to CPU - issue, since the wbinvd
causes more problems later in the shutdown sequence, but wbinvd
instructions while the system is still active are not problematic.

Possibly some SMI or pending machine check issue on the affected system ]

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/mm: Rework wbinvd, hlt operation in stop_this_cpu()

Linus Torvalds 319f1e04 66f81624

+15 -10
+15 -10
arch/x86/kernel/process.c
··· 380 380 disable_local_APIC(); 381 381 mcheck_cpu_clear(this_cpu_ptr(&cpu_info)); 382 382 383 + /* 384 + * Use wbinvd on processors that support SME. This provides support 385 + * for performing a successful kexec when going from SME inactive 386 + * to SME active (or vice-versa). The cache must be cleared so that 387 + * if there are entries with the same physical address, both with and 388 + * without the encryption bit, they don't race each other when flushed 389 + * and potentially end up with the wrong entry being committed to 390 + * memory. 391 + */ 392 + if (boot_cpu_has(X86_FEATURE_SME)) 393 + native_wbinvd(); 383 394 for (;;) { 384 395 /* 385 - * Use wbinvd followed by hlt to stop the processor. This 386 - * provides support for kexec on a processor that supports 387 - * SME. With kexec, going from SME inactive to SME active 388 - * requires clearing cache entries so that addresses without 389 - * the encryption bit set don't corrupt the same physical 390 - * address that has the encryption bit set when caches are 391 - * flushed. To achieve this a wbinvd is performed followed by 392 - * a hlt. Even if the processor is not in the kexec/SME 393 - * scenario this only adds a wbinvd to a halting processor. 396 + * Use native_halt() so that memory contents don't change 397 + * (stack usage and variables) after possibly issuing the 398 + * native_wbinvd() above. 394 399 */ 395 - asm volatile("wbinvd; hlt" : : : "memory"); 400 + native_halt(); 396 401 } 397 402 } 398 403