tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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clk: qcom: gcc-msm8998: get rid of test clock

The test clock apparently it's not used by anyone upstream. Remove it.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228185237.3111988-10-dmitry.baryshkov@linaro.org

authored by

Dmitry Baryshkov and committed by
Bjorn Andersson 32bde50f 62db82f9

-13
-13
drivers/clk/qcom/gcc-msm8998.c
··· 387 387 388 388 enum { 389 389 P_AUD_REF_CLK, 390 - P_CORE_BI_PLL_TEST_SE, 391 390 P_GPLL0_OUT_MAIN, 392 391 P_GPLL4_OUT_MAIN, 393 392 P_PLL0_EARLY_DIV_CLK_SRC, ··· 398 399 { P_XO, 0 }, 399 400 { P_GPLL0_OUT_MAIN, 1 }, 400 401 { P_PLL0_EARLY_DIV_CLK_SRC, 6 }, 401 - { P_CORE_BI_PLL_TEST_SE, 7 }, 402 402 }; 403 403 404 404 static const struct clk_parent_data gcc_parent_data_0[] = { 405 405 { .fw_name = "xo" }, 406 406 { .hw = &gpll0_out_main.clkr.hw }, 407 407 { .hw = &gpll0_out_main.clkr.hw }, 408 - { .fw_name = "core_bi_pll_test_se" }, 409 408 }; 410 409 411 410 static const struct parent_map gcc_parent_map_1[] = { 412 411 { P_XO, 0 }, 413 412 { P_GPLL0_OUT_MAIN, 1 }, 414 - { P_CORE_BI_PLL_TEST_SE, 7 }, 415 413 }; 416 414 417 415 static const struct clk_parent_data gcc_parent_data_1[] = { 418 416 { .fw_name = "xo" }, 419 417 { .hw = &gpll0_out_main.clkr.hw }, 420 - { .fw_name = "core_bi_pll_test_se" }, 421 418 }; 422 419 423 420 static const struct parent_map gcc_parent_map_2[] = { ··· 421 426 { P_GPLL0_OUT_MAIN, 1 }, 422 427 { P_SLEEP_CLK, 5 }, 423 428 { P_PLL0_EARLY_DIV_CLK_SRC, 6 }, 424 - { P_CORE_BI_PLL_TEST_SE, 7 }, 425 429 }; 426 430 427 431 static const struct clk_parent_data gcc_parent_data_2[] = { ··· 428 434 { .hw = &gpll0_out_main.clkr.hw }, 429 435 { .fw_name = "sleep_clk" }, 430 436 { .hw = &gpll0_out_main.clkr.hw }, 431 - { .fw_name = "core_bi_pll_test_se" }, 432 437 }; 433 438 434 439 static const struct parent_map gcc_parent_map_3[] = { 435 440 { P_XO, 0 }, 436 441 { P_SLEEP_CLK, 5 }, 437 - { P_CORE_BI_PLL_TEST_SE, 7 }, 438 442 }; 439 443 440 444 static const struct clk_parent_data gcc_parent_data_3[] = { 441 445 { .fw_name = "xo" }, 442 446 { .fw_name = "sleep_clk" }, 443 - { .fw_name = "core_bi_pll_test_se" }, 444 447 }; 445 448 446 449 static const struct parent_map gcc_parent_map_4[] = { 447 450 { P_XO, 0 }, 448 451 { P_GPLL0_OUT_MAIN, 1 }, 449 452 { P_GPLL4_OUT_MAIN, 5 }, 450 - { P_CORE_BI_PLL_TEST_SE, 7 }, 451 453 }; 452 454 453 455 static const struct clk_parent_data gcc_parent_data_4[] = { 454 456 { .fw_name = "xo" }, 455 457 { .hw = &gpll0_out_main.clkr.hw }, 456 458 { .hw = &gpll4_out_main.clkr.hw }, 457 - { .fw_name = "core_bi_pll_test_se" }, 458 459 }; 459 460 460 461 static const struct parent_map gcc_parent_map_5[] = { 461 462 { P_XO, 0 }, 462 463 { P_GPLL0_OUT_MAIN, 1 }, 463 464 { P_AUD_REF_CLK, 2 }, 464 - { P_CORE_BI_PLL_TEST_SE, 7 }, 465 465 }; 466 466 467 467 static const struct clk_parent_data gcc_parent_data_5[] = { 468 468 { .fw_name = "xo" }, 469 469 { .hw = &gpll0_out_main.clkr.hw }, 470 470 { .fw_name = "aud_ref_clk" }, 471 - { .fw_name = "core_bi_pll_test_se" }, 472 471 }; 473 472 474 473 static const struct freq_tbl ftbl_blsp1_qup1_i2c_apps_clk_src[] = {