tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'powerpc-5.10-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux

Pull powerpc fixes from Michael Ellerman:
"Some more powerpc fixes for 5.10:

- Three commits fixing possible missed TLB invalidations for
multi-threaded processes when CPUs are hotplugged in and out.

- A fix for a host crash triggerable by host userspace (qemu) in KVM
on Power9.

- A fix for a host crash in machine check handling when running HPT
guests on a HPT host.

- One commit fixing potential missed TLB invalidations when using the
hash MMU on Power9 or later.

- A regression fix for machines with CPUs on node 0 but no memory.

Thanks to Aneesh Kumar K.V, Cédric Le Goater, Greg Kurz, Milan
Mohanty, Milton Miller, Nicholas Piggin, Paul Mackerras, and Srikar
Dronamraju"

* tag 'powerpc-5.10-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
powerpc/64s/powernv: Fix memory corruption when saving SLB entries on MCE
KVM: PPC: Book3S HV: XIVE: Fix vCPU id sanity check
powerpc/numa: Fix a regression on memoryless node 0
powerpc/64s: Trim offlined CPUs from mm_cpumasks
kernel/cpu: add arch override for clear_tasks_mm_cpumask() mm handling
powerpc/64s/pseries: Fix hash tlbiel_all_isa300 for guest kernels
powerpc/64s: Fix hash ISA v3.0 TLBIEL instruction generation

Linus Torvalds 32f741b0 d4e90419

+70 -18
+12
arch/powerpc/include/asm/book3s/64/mmu.h
··· 242 242 static inline void radix_init_pseries(void) { }; 243 243 #endif 244 244 245 + #ifdef CONFIG_HOTPLUG_CPU 246 + #define arch_clear_mm_cpumask_cpu(cpu, mm) \ 247 + do { \ 248 + if (cpumask_test_cpu(cpu, mm_cpumask(mm))) { \ 249 + atomic_dec(&(mm)->context.active_cpus); \ 250 + cpumask_clear_cpu(cpu, mm_cpumask(mm)); \ 251 + } \ 252 + } while (0) 253 + 254 + void cleanup_cpu_mmu_context(void); 255 + #endif 256 + 245 257 static inline int get_user_context(mm_context_t *ctx, unsigned long ea) 246 258 { 247 259 int index = ea >> MAX_EA_BITS_PER_CONTEXT;
+2 -5
arch/powerpc/kvm/book3s_xive.c
··· 1214 1214 static bool kvmppc_xive_vcpu_id_valid(struct kvmppc_xive *xive, u32 cpu) 1215 1215 { 1216 1216 /* We have a block of xive->nr_servers VPs. We just need to check 1217 - * raw vCPU ids are below the expected limit for this guest's 1218 - * core stride ; kvmppc_pack_vcpu_id() will pack them down to an 1219 - * index that can be safely used to compute a VP id that belongs 1220 - * to the VP block. 1217 + * packed vCPU ids are below that. 1221 1218 */ 1222 - return cpu < xive->nr_servers * xive->kvm->arch.emul_smt_mode; 1219 + return kvmppc_pack_vcpu_id(xive->kvm, cpu) < xive->nr_servers; 1223 1220 } 1224 1221 1225 1222 int kvmppc_xive_compute_vp_id(struct kvmppc_xive *xive, u32 cpu, u32 *vp)
+15 -8
arch/powerpc/mm/book3s64/hash_native.c
··· 68 68 rs = ((unsigned long)pid << PPC_BITLSHIFT(31)); 69 69 70 70 asm volatile(PPC_TLBIEL(%0, %1, %2, %3, %4) 71 - : : "r"(rb), "r"(rs), "i"(ric), "i"(prs), "r"(r) 71 + : : "r"(rb), "r"(rs), "i"(ric), "i"(prs), "i"(r) 72 72 : "memory"); 73 73 } 74 74 ··· 92 92 asm volatile("ptesync": : :"memory"); 93 93 94 94 /* 95 - * Flush the first set of the TLB, and any caching of partition table 96 - * entries. Then flush the remaining sets of the TLB. Hash mode uses 97 - * partition scoped TLB translations. 95 + * Flush the partition table cache if this is HV mode. 98 96 */ 99 - tlbiel_hash_set_isa300(0, is, 0, 2, 0); 100 - for (set = 1; set < num_sets; set++) 101 - tlbiel_hash_set_isa300(set, is, 0, 0, 0); 97 + if (early_cpu_has_feature(CPU_FTR_HVMODE)) 98 + tlbiel_hash_set_isa300(0, is, 0, 2, 0); 102 99 103 100 /* 104 - * Now invalidate the process table cache. 101 + * Now invalidate the process table cache. UPRT=0 HPT modes (what 102 + * current hardware implements) do not use the process table, but 103 + * add the flushes anyway. 105 104 * 106 105 * From ISA v3.0B p. 1078: 107 106 * The following forms are invalid. ··· 108 109 * HPT caching is of the Process Table.) 109 110 */ 110 111 tlbiel_hash_set_isa300(0, is, 0, 2, 1); 112 + 113 + /* 114 + * Then flush the sets of the TLB proper. Hash mode uses 115 + * partition scoped TLB translations, which may be flushed 116 + * in !HV mode. 117 + */ 118 + for (set = 0; set < num_sets; set++) 119 + tlbiel_hash_set_isa300(set, is, 0, 0, 0); 111 120 112 121 ppc_after_tlbiel_barrier(); 113 122
+20
arch/powerpc/mm/book3s64/mmu_context.c
··· 17 17 #include <linux/export.h> 18 18 #include <linux/gfp.h> 19 19 #include <linux/slab.h> 20 + #include <linux/cpu.h> 20 21 21 22 #include <asm/mmu_context.h> 22 23 #include <asm/pgalloc.h> ··· 306 305 { 307 306 mtspr(SPRN_PID, next->context.id); 308 307 isync(); 308 + } 309 + #endif 310 + 311 + /** 312 + * cleanup_cpu_mmu_context - Clean up MMU details for this CPU (newly offlined) 313 + * 314 + * This clears the CPU from mm_cpumask for all processes, and then flushes the 315 + * local TLB to ensure TLB coherency in case the CPU is onlined again. 316 + * 317 + * KVM guest translations are not necessarily flushed here. If KVM started 318 + * using mm_cpumask or the Linux APIs which do, this would have to be resolved. 319 + */ 320 + #ifdef CONFIG_HOTPLUG_CPU 321 + void cleanup_cpu_mmu_context(void) 322 + { 323 + int cpu = smp_processor_id(); 324 + 325 + clear_tasks_mm_cpumask(cpu); 326 + tlbiel_all(); 309 327 } 310 328 #endif
+1 -2
arch/powerpc/mm/numa.c
··· 742 742 of_node_put(cpu); 743 743 } 744 744 745 - if (likely(nid > 0)) 746 - node_set_online(nid); 745 + node_set_online(nid); 747 746 } 748 747 749 748 get_n_mem_cells(&n_mem_addr_cells, &n_mem_size_cells);
+2
arch/powerpc/platforms/powermac/smp.c
··· 911 911 912 912 mpic_cpu_set_priority(0xf); 913 913 914 + cleanup_cpu_mmu_context(); 915 + 914 916 return 0; 915 917 } 916 918
+7 -2
arch/powerpc/platforms/powernv/setup.c
··· 211 211 add_preferred_console("hvc", 0, NULL); 212 212 213 213 if (!radix_enabled()) { 214 + size_t size = sizeof(struct slb_entry) * mmu_slb_size; 214 215 int i; 215 216 216 217 /* Allocate per cpu area to save old slb contents during MCE */ 217 - for_each_possible_cpu(i) 218 - paca_ptrs[i]->mce_faulty_slbs = memblock_alloc_node(mmu_slb_size, __alignof__(*paca_ptrs[i]->mce_faulty_slbs), cpu_to_node(i)); 218 + for_each_possible_cpu(i) { 219 + paca_ptrs[i]->mce_faulty_slbs = 220 + memblock_alloc_node(size, 221 + __alignof__(struct slb_entry), 222 + cpu_to_node(i)); 223 + } 219 224 } 220 225 } 221 226
+3
arch/powerpc/platforms/powernv/smp.c
··· 143 143 xive_smp_disable_cpu(); 144 144 else 145 145 xics_migrate_irqs_away(); 146 + 147 + cleanup_cpu_mmu_context(); 148 + 146 149 return 0; 147 150 } 148 151
+3
arch/powerpc/platforms/pseries/hotplug-cpu.c
··· 90 90 xive_smp_disable_cpu(); 91 91 else 92 92 xics_migrate_irqs_away(); 93 + 94 + cleanup_cpu_mmu_context(); 95 + 93 96 return 0; 94 97 } 95 98
+5 -1
kernel/cpu.c
··· 815 815 } 816 816 817 817 #ifdef CONFIG_HOTPLUG_CPU 818 + #ifndef arch_clear_mm_cpumask_cpu 819 + #define arch_clear_mm_cpumask_cpu(cpu, mm) cpumask_clear_cpu(cpu, mm_cpumask(mm)) 820 + #endif 821 + 818 822 /** 819 823 * clear_tasks_mm_cpumask - Safely clear tasks' mm_cpumask for a CPU 820 824 * @cpu: a CPU id ··· 854 850 t = find_lock_task_mm(p); 855 851 if (!t) 856 852 continue; 857 - cpumask_clear_cpu(cpu, mm_cpumask(t->mm)); 853 + arch_clear_mm_cpumask_cpu(cpu, t->mm); 858 854 task_unlock(t); 859 855 } 860 856 rcu_read_unlock();