Merge tag 'drm-next-2023-04-27' of git://anongit.freedesktop.org/drm/drm

-1

drivers/accel/qaic/Makefile

··· 7 7 8 8 qaic-y := \ 9 9 mhi_controller.o \ 10 - mhi_qaic_ctrl.o \ 11 10 qaic_control.o \ 12 11 qaic_data.o \ 13 12 qaic_drv.o

-569

drivers/accel/qaic/mhi_qaic_ctrl.c

··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ 3 - 4 - #include <linux/kernel.h> 5 - #include <linux/mhi.h> 6 - #include <linux/mod_devicetable.h> 7 - #include <linux/module.h> 8 - #include <linux/poll.h> 9 - #include <linux/xarray.h> 10 - #include <uapi/linux/eventpoll.h> 11 - 12 - #include "mhi_qaic_ctrl.h" 13 - #include "qaic.h" 14 - 15 - #define MHI_QAIC_CTRL_DRIVER_NAME "mhi_qaic_ctrl" 16 - #define MHI_QAIC_CTRL_MAX_MINORS 128 17 - #define MHI_MAX_MTU 0xffff 18 - static DEFINE_XARRAY_ALLOC(mqc_xa); 19 - static struct class *mqc_dev_class; 20 - static int mqc_dev_major; 21 - 22 - /** 23 - * struct mqc_buf - Buffer structure used to receive data from device 24 - * @data: Address of data to read from 25 - * @odata: Original address returned from *alloc() API. Used to free this buf. 26 - * @len: Length of data in byte 27 - * @node: This buffer will be part of list managed in struct mqc_dev 28 - */ 29 - struct mqc_buf { 30 - void *data; 31 - void *odata; 32 - size_t len; 33 - struct list_head node; 34 - }; 35 - 36 - /** 37 - * struct mqc_dev - MHI QAIC Control Device 38 - * @minor: MQC device node minor number 39 - * @mhi_dev: Associated mhi device object 40 - * @mtu: Max TRE buffer length 41 - * @enabled: Flag to track the state of the MQC device 42 - * @lock: Mutex lock to serialize access to open_count 43 - * @read_lock: Mutex lock to serialize readers 44 - * @write_lock: Mutex lock to serialize writers 45 - * @ul_wq: Wait queue for writers 46 - * @dl_wq: Wait queue for readers 47 - * @dl_queue_lock: Spin lock to serialize access to download queue 48 - * @dl_queue: Queue of downloaded buffers 49 - * @open_count: Track open counts 50 - * @ref_count: Reference count for this structure 51 - */ 52 - struct mqc_dev { 53 - u32 minor; 54 - struct mhi_device *mhi_dev; 55 - size_t mtu; 56 - bool enabled; 57 - struct mutex lock; 58 - struct mutex read_lock; 59 - struct mutex write_lock; 60 - wait_queue_head_t ul_wq; 61 - wait_queue_head_t dl_wq; 62 - spinlock_t dl_queue_lock; 63 - struct list_head dl_queue; 64 - unsigned int open_count; 65 - struct kref ref_count; 66 - }; 67 - 68 - static void mqc_dev_release(struct kref *ref) 69 - { 70 - struct mqc_dev *mqcdev = container_of(ref, struct mqc_dev, ref_count); 71 - 72 - mutex_destroy(&mqcdev->read_lock); 73 - mutex_destroy(&mqcdev->write_lock); 74 - mutex_destroy(&mqcdev->lock); 75 - kfree(mqcdev); 76 - } 77 - 78 - static int mhi_qaic_ctrl_fill_dl_queue(struct mqc_dev *mqcdev) 79 - { 80 - struct mhi_device *mhi_dev = mqcdev->mhi_dev; 81 - struct mqc_buf *ctrlbuf; 82 - int rx_budget; 83 - int ret = 0; 84 - void *data; 85 - 86 - rx_budget = mhi_get_free_desc_count(mhi_dev, DMA_FROM_DEVICE); 87 - if (rx_budget < 0) 88 - return -EIO; 89 - 90 - while (rx_budget--) { 91 - data = kzalloc(mqcdev->mtu + sizeof(*ctrlbuf), GFP_KERNEL); 92 - if (!data) 93 - return -ENOMEM; 94 - 95 - ctrlbuf = data + mqcdev->mtu; 96 - ctrlbuf->odata = data; 97 - 98 - ret = mhi_queue_buf(mhi_dev, DMA_FROM_DEVICE, data, mqcdev->mtu, MHI_EOT); 99 - if (ret) { 100 - kfree(data); 101 - dev_err(&mhi_dev->dev, "Failed to queue buffer\n"); 102 - return ret; 103 - } 104 - } 105 - 106 - return ret; 107 - } 108 - 109 - static int mhi_qaic_ctrl_dev_start_chan(struct mqc_dev *mqcdev) 110 - { 111 - struct device *dev = &mqcdev->mhi_dev->dev; 112 - int ret = 0; 113 - 114 - ret = mutex_lock_interruptible(&mqcdev->lock); 115 - if (ret) 116 - return ret; 117 - if (!mqcdev->enabled) { 118 - ret = -ENODEV; 119 - goto release_dev_lock; 120 - } 121 - if (!mqcdev->open_count) { 122 - ret = mhi_prepare_for_transfer(mqcdev->mhi_dev); 123 - if (ret) { 124 - dev_err(dev, "Error starting transfer channels\n"); 125 - goto release_dev_lock; 126 - } 127 - 128 - ret = mhi_qaic_ctrl_fill_dl_queue(mqcdev); 129 - if (ret) { 130 - dev_err(dev, "Error filling download queue.\n"); 131 - goto mhi_unprepare; 132 - } 133 - } 134 - mqcdev->open_count++; 135 - mutex_unlock(&mqcdev->lock); 136 - 137 - return 0; 138 - 139 - mhi_unprepare: 140 - mhi_unprepare_from_transfer(mqcdev->mhi_dev); 141 - release_dev_lock: 142 - mutex_unlock(&mqcdev->lock); 143 - return ret; 144 - } 145 - 146 - static struct mqc_dev *mqc_dev_get_by_minor(unsigned int minor) 147 - { 148 - struct mqc_dev *mqcdev; 149 - 150 - xa_lock(&mqc_xa); 151 - mqcdev = xa_load(&mqc_xa, minor); 152 - if (mqcdev) 153 - kref_get(&mqcdev->ref_count); 154 - xa_unlock(&mqc_xa); 155 - 156 - return mqcdev; 157 - } 158 - 159 - static int mhi_qaic_ctrl_open(struct inode *inode, struct file *filp) 160 - { 161 - struct mqc_dev *mqcdev; 162 - int ret; 163 - 164 - mqcdev = mqc_dev_get_by_minor(iminor(inode)); 165 - if (!mqcdev) { 166 - pr_debug("mqc: minor %d not found\n", iminor(inode)); 167 - return -EINVAL; 168 - } 169 - 170 - ret = mhi_qaic_ctrl_dev_start_chan(mqcdev); 171 - if (ret) { 172 - kref_put(&mqcdev->ref_count, mqc_dev_release); 173 - return ret; 174 - } 175 - 176 - filp->private_data = mqcdev; 177 - 178 - return 0; 179 - } 180 - 181 - static void mhi_qaic_ctrl_buf_free(struct mqc_buf *ctrlbuf) 182 - { 183 - list_del(&ctrlbuf->node); 184 - kfree(ctrlbuf->odata); 185 - } 186 - 187 - static void __mhi_qaic_ctrl_release(struct mqc_dev *mqcdev) 188 - { 189 - struct mqc_buf *ctrlbuf, *tmp; 190 - 191 - mhi_unprepare_from_transfer(mqcdev->mhi_dev); 192 - wake_up_interruptible(&mqcdev->ul_wq); 193 - wake_up_interruptible(&mqcdev->dl_wq); 194 - /* 195 - * Free the dl_queue. As we have already unprepared mhi transfers, we 196 - * do not expect any callback functions that update dl_queue hence no need 197 - * to grab dl_queue lock. 198 - */ 199 - mutex_lock(&mqcdev->read_lock); 200 - list_for_each_entry_safe(ctrlbuf, tmp, &mqcdev->dl_queue, node) 201 - mhi_qaic_ctrl_buf_free(ctrlbuf); 202 - mutex_unlock(&mqcdev->read_lock); 203 - } 204 - 205 - static int mhi_qaic_ctrl_release(struct inode *inode, struct file *file) 206 - { 207 - struct mqc_dev *mqcdev = file->private_data; 208 - 209 - mutex_lock(&mqcdev->lock); 210 - mqcdev->open_count--; 211 - if (!mqcdev->open_count && mqcdev->enabled) 212 - __mhi_qaic_ctrl_release(mqcdev); 213 - mutex_unlock(&mqcdev->lock); 214 - 215 - kref_put(&mqcdev->ref_count, mqc_dev_release); 216 - 217 - return 0; 218 - } 219 - 220 - static __poll_t mhi_qaic_ctrl_poll(struct file *file, poll_table *wait) 221 - { 222 - struct mqc_dev *mqcdev = file->private_data; 223 - struct mhi_device *mhi_dev; 224 - __poll_t mask = 0; 225 - 226 - mhi_dev = mqcdev->mhi_dev; 227 - 228 - poll_wait(file, &mqcdev->ul_wq, wait); 229 - poll_wait(file, &mqcdev->dl_wq, wait); 230 - 231 - mutex_lock(&mqcdev->lock); 232 - if (!mqcdev->enabled) { 233 - mutex_unlock(&mqcdev->lock); 234 - return EPOLLERR; 235 - } 236 - 237 - spin_lock_bh(&mqcdev->dl_queue_lock); 238 - if (!list_empty(&mqcdev->dl_queue)) 239 - mask |= EPOLLIN | EPOLLRDNORM; 240 - spin_unlock_bh(&mqcdev->dl_queue_lock); 241 - 242 - if (mutex_lock_interruptible(&mqcdev->write_lock)) { 243 - mutex_unlock(&mqcdev->lock); 244 - return EPOLLERR; 245 - } 246 - if (mhi_get_free_desc_count(mhi_dev, DMA_TO_DEVICE) > 0) 247 - mask |= EPOLLOUT | EPOLLWRNORM; 248 - mutex_unlock(&mqcdev->write_lock); 249 - mutex_unlock(&mqcdev->lock); 250 - 251 - dev_dbg(&mhi_dev->dev, "Client attempted to poll, returning mask 0x%x\n", mask); 252 - 253 - return mask; 254 - } 255 - 256 - static int mhi_qaic_ctrl_tx(struct mqc_dev *mqcdev) 257 - { 258 - int ret; 259 - 260 - ret = wait_event_interruptible(mqcdev->ul_wq, !mqcdev->enabled || 261 - mhi_get_free_desc_count(mqcdev->mhi_dev, DMA_TO_DEVICE) > 0); 262 - 263 - if (!mqcdev->enabled) 264 - return -ENODEV; 265 - 266 - return ret; 267 - } 268 - 269 - static ssize_t mhi_qaic_ctrl_write(struct file *file, const char __user *buf, size_t count, 270 - loff_t *offp) 271 - { 272 - struct mqc_dev *mqcdev = file->private_data; 273 - struct mhi_device *mhi_dev; 274 - size_t bytes_xfered = 0; 275 - struct device *dev; 276 - int ret, nr_desc; 277 - 278 - mhi_dev = mqcdev->mhi_dev; 279 - dev = &mhi_dev->dev; 280 - 281 - if (!mhi_dev->ul_chan) 282 - return -EOPNOTSUPP; 283 - 284 - if (!buf || !count) 285 - return -EINVAL; 286 - 287 - dev_dbg(dev, "Request to transfer %zu bytes\n", count); 288 - 289 - ret = mhi_qaic_ctrl_tx(mqcdev); 290 - if (ret) 291 - return ret; 292 - 293 - if (mutex_lock_interruptible(&mqcdev->write_lock)) 294 - return -EINTR; 295 - 296 - nr_desc = mhi_get_free_desc_count(mhi_dev, DMA_TO_DEVICE); 297 - if (nr_desc * mqcdev->mtu < count) { 298 - ret = -EMSGSIZE; 299 - dev_dbg(dev, "Buffer too big to transfer\n"); 300 - goto unlock_mutex; 301 - } 302 - 303 - while (count != bytes_xfered) { 304 - enum mhi_flags flags; 305 - size_t to_copy; 306 - void *kbuf; 307 - 308 - to_copy = min_t(size_t, count - bytes_xfered, mqcdev->mtu); 309 - kbuf = kmalloc(to_copy, GFP_KERNEL); 310 - if (!kbuf) { 311 - ret = -ENOMEM; 312 - goto unlock_mutex; 313 - } 314 - 315 - ret = copy_from_user(kbuf, buf + bytes_xfered, to_copy); 316 - if (ret) { 317 - kfree(kbuf); 318 - ret = -EFAULT; 319 - goto unlock_mutex; 320 - } 321 - 322 - if (bytes_xfered + to_copy == count) 323 - flags = MHI_EOT; 324 - else 325 - flags = MHI_CHAIN; 326 - 327 - ret = mhi_queue_buf(mhi_dev, DMA_TO_DEVICE, kbuf, to_copy, flags); 328 - if (ret) { 329 - kfree(kbuf); 330 - dev_err(dev, "Failed to queue buf of size %zu\n", to_copy); 331 - goto unlock_mutex; 332 - } 333 - 334 - bytes_xfered += to_copy; 335 - } 336 - 337 - mutex_unlock(&mqcdev->write_lock); 338 - dev_dbg(dev, "bytes xferred: %zu\n", bytes_xfered); 339 - 340 - return bytes_xfered; 341 - 342 - unlock_mutex: 343 - mutex_unlock(&mqcdev->write_lock); 344 - return ret; 345 - } 346 - 347 - static int mhi_qaic_ctrl_rx(struct mqc_dev *mqcdev) 348 - { 349 - int ret; 350 - 351 - ret = wait_event_interruptible(mqcdev->dl_wq, 352 - !mqcdev->enabled || !list_empty(&mqcdev->dl_queue)); 353 - 354 - if (!mqcdev->enabled) 355 - return -ENODEV; 356 - 357 - return ret; 358 - } 359 - 360 - static ssize_t mhi_qaic_ctrl_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) 361 - { 362 - struct mqc_dev *mqcdev = file->private_data; 363 - struct mqc_buf *ctrlbuf; 364 - size_t to_copy; 365 - int ret; 366 - 367 - if (!mqcdev->mhi_dev->dl_chan) 368 - return -EOPNOTSUPP; 369 - 370 - ret = mhi_qaic_ctrl_rx(mqcdev); 371 - if (ret) 372 - return ret; 373 - 374 - if (mutex_lock_interruptible(&mqcdev->read_lock)) 375 - return -EINTR; 376 - 377 - ctrlbuf = list_first_entry_or_null(&mqcdev->dl_queue, struct mqc_buf, node); 378 - if (!ctrlbuf) { 379 - mutex_unlock(&mqcdev->read_lock); 380 - ret = -ENODEV; 381 - goto error_out; 382 - } 383 - 384 - to_copy = min_t(size_t, count, ctrlbuf->len); 385 - if (copy_to_user(buf, ctrlbuf->data, to_copy)) { 386 - mutex_unlock(&mqcdev->read_lock); 387 - dev_dbg(&mqcdev->mhi_dev->dev, "Failed to copy data to user buffer\n"); 388 - ret = -EFAULT; 389 - goto error_out; 390 - } 391 - 392 - ctrlbuf->len -= to_copy; 393 - ctrlbuf->data += to_copy; 394 - 395 - if (!ctrlbuf->len) { 396 - spin_lock_bh(&mqcdev->dl_queue_lock); 397 - mhi_qaic_ctrl_buf_free(ctrlbuf); 398 - spin_unlock_bh(&mqcdev->dl_queue_lock); 399 - mhi_qaic_ctrl_fill_dl_queue(mqcdev); 400 - dev_dbg(&mqcdev->mhi_dev->dev, "Read buf freed\n"); 401 - } 402 - 403 - mutex_unlock(&mqcdev->read_lock); 404 - return to_copy; 405 - 406 - error_out: 407 - mutex_unlock(&mqcdev->read_lock); 408 - return ret; 409 - } 410 - 411 - static const struct file_operations mhidev_fops = { 412 - .owner = THIS_MODULE, 413 - .open = mhi_qaic_ctrl_open, 414 - .release = mhi_qaic_ctrl_release, 415 - .read = mhi_qaic_ctrl_read, 416 - .write = mhi_qaic_ctrl_write, 417 - .poll = mhi_qaic_ctrl_poll, 418 - }; 419 - 420 - static void mhi_qaic_ctrl_ul_xfer_cb(struct mhi_device *mhi_dev, struct mhi_result *mhi_result) 421 - { 422 - struct mqc_dev *mqcdev = dev_get_drvdata(&mhi_dev->dev); 423 - 424 - dev_dbg(&mhi_dev->dev, "%s: status: %d xfer_len: %zu\n", __func__, 425 - mhi_result->transaction_status, mhi_result->bytes_xferd); 426 - 427 - kfree(mhi_result->buf_addr); 428 - 429 - if (!mhi_result->transaction_status) 430 - wake_up_interruptible(&mqcdev->ul_wq); 431 - } 432 - 433 - static void mhi_qaic_ctrl_dl_xfer_cb(struct mhi_device *mhi_dev, struct mhi_result *mhi_result) 434 - { 435 - struct mqc_dev *mqcdev = dev_get_drvdata(&mhi_dev->dev); 436 - struct mqc_buf *ctrlbuf; 437 - 438 - dev_dbg(&mhi_dev->dev, "%s: status: %d receive_len: %zu\n", __func__, 439 - mhi_result->transaction_status, mhi_result->bytes_xferd); 440 - 441 - if (mhi_result->transaction_status && 442 - mhi_result->transaction_status != -EOVERFLOW) { 443 - kfree(mhi_result->buf_addr); 444 - return; 445 - } 446 - 447 - ctrlbuf = mhi_result->buf_addr + mqcdev->mtu; 448 - ctrlbuf->data = mhi_result->buf_addr; 449 - ctrlbuf->len = mhi_result->bytes_xferd; 450 - spin_lock_bh(&mqcdev->dl_queue_lock); 451 - list_add_tail(&ctrlbuf->node, &mqcdev->dl_queue); 452 - spin_unlock_bh(&mqcdev->dl_queue_lock); 453 - 454 - wake_up_interruptible(&mqcdev->dl_wq); 455 - } 456 - 457 - static int mhi_qaic_ctrl_probe(struct mhi_device *mhi_dev, const struct mhi_device_id *id) 458 - { 459 - struct mqc_dev *mqcdev; 460 - struct device *dev; 461 - int ret; 462 - 463 - mqcdev = kzalloc(sizeof(*mqcdev), GFP_KERNEL); 464 - if (!mqcdev) 465 - return -ENOMEM; 466 - 467 - kref_init(&mqcdev->ref_count); 468 - mutex_init(&mqcdev->lock); 469 - mqcdev->mhi_dev = mhi_dev; 470 - 471 - ret = xa_alloc(&mqc_xa, &mqcdev->minor, mqcdev, XA_LIMIT(0, MHI_QAIC_CTRL_MAX_MINORS), 472 - GFP_KERNEL); 473 - if (ret) { 474 - kfree(mqcdev); 475 - return ret; 476 - } 477 - 478 - init_waitqueue_head(&mqcdev->ul_wq); 479 - init_waitqueue_head(&mqcdev->dl_wq); 480 - mutex_init(&mqcdev->read_lock); 481 - mutex_init(&mqcdev->write_lock); 482 - spin_lock_init(&mqcdev->dl_queue_lock); 483 - INIT_LIST_HEAD(&mqcdev->dl_queue); 484 - mqcdev->mtu = min_t(size_t, id->driver_data, MHI_MAX_MTU); 485 - mqcdev->enabled = true; 486 - mqcdev->open_count = 0; 487 - dev_set_drvdata(&mhi_dev->dev, mqcdev); 488 - 489 - dev = device_create(mqc_dev_class, &mhi_dev->dev, MKDEV(mqc_dev_major, mqcdev->minor), 490 - mqcdev, "%s", dev_name(&mhi_dev->dev)); 491 - if (IS_ERR(dev)) { 492 - xa_erase(&mqc_xa, mqcdev->minor); 493 - dev_set_drvdata(&mhi_dev->dev, NULL); 494 - kfree(mqcdev); 495 - return PTR_ERR(dev); 496 - } 497 - 498 - return 0; 499 - }; 500 - 501 - static void mhi_qaic_ctrl_remove(struct mhi_device *mhi_dev) 502 - { 503 - struct mqc_dev *mqcdev = dev_get_drvdata(&mhi_dev->dev); 504 - 505 - device_destroy(mqc_dev_class, MKDEV(mqc_dev_major, mqcdev->minor)); 506 - 507 - mutex_lock(&mqcdev->lock); 508 - mqcdev->enabled = false; 509 - if (mqcdev->open_count) 510 - __mhi_qaic_ctrl_release(mqcdev); 511 - mutex_unlock(&mqcdev->lock); 512 - 513 - xa_erase(&mqc_xa, mqcdev->minor); 514 - kref_put(&mqcdev->ref_count, mqc_dev_release); 515 - } 516 - 517 - /* .driver_data stores max mtu */ 518 - static const struct mhi_device_id mhi_qaic_ctrl_match_table[] = { 519 - { .chan = "QAIC_SAHARA", .driver_data = SZ_32K}, 520 - {}, 521 - }; 522 - MODULE_DEVICE_TABLE(mhi, mhi_qaic_ctrl_match_table); 523 - 524 - static struct mhi_driver mhi_qaic_ctrl_driver = { 525 - .id_table = mhi_qaic_ctrl_match_table, 526 - .remove = mhi_qaic_ctrl_remove, 527 - .probe = mhi_qaic_ctrl_probe, 528 - .ul_xfer_cb = mhi_qaic_ctrl_ul_xfer_cb, 529 - .dl_xfer_cb = mhi_qaic_ctrl_dl_xfer_cb, 530 - .driver = { 531 - .name = MHI_QAIC_CTRL_DRIVER_NAME, 532 - }, 533 - }; 534 - 535 - int mhi_qaic_ctrl_init(void) 536 - { 537 - int ret; 538 - 539 - ret = register_chrdev(0, MHI_QAIC_CTRL_DRIVER_NAME, &mhidev_fops); 540 - if (ret < 0) 541 - return ret; 542 - 543 - mqc_dev_major = ret; 544 - mqc_dev_class = class_create(THIS_MODULE, MHI_QAIC_CTRL_DRIVER_NAME); 545 - if (IS_ERR(mqc_dev_class)) { 546 - ret = PTR_ERR(mqc_dev_class); 547 - goto unregister_chrdev; 548 - } 549 - 550 - ret = mhi_driver_register(&mhi_qaic_ctrl_driver); 551 - if (ret) 552 - goto destroy_class; 553 - 554 - return 0; 555 - 556 - destroy_class: 557 - class_destroy(mqc_dev_class); 558 - unregister_chrdev: 559 - unregister_chrdev(mqc_dev_major, MHI_QAIC_CTRL_DRIVER_NAME); 560 - return ret; 561 - } 562 - 563 - void mhi_qaic_ctrl_deinit(void) 564 - { 565 - mhi_driver_unregister(&mhi_qaic_ctrl_driver); 566 - class_destroy(mqc_dev_class); 567 - unregister_chrdev(mqc_dev_major, MHI_QAIC_CTRL_DRIVER_NAME); 568 - xa_destroy(&mqc_xa); 569 - }

-12

drivers/accel/qaic/mhi_qaic_ctrl.h

··· 1 - /* SPDX-License-Identifier: GPL-2.0-only 2 - * 3 - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. 4 - */ 5 - 6 - #ifndef __MHI_QAIC_CTRL_H__ 7 - #define __MHI_QAIC_CTRL_H__ 8 - 9 - int mhi_qaic_ctrl_init(void); 10 - void mhi_qaic_ctrl_deinit(void); 11 - 12 - #endif /* __MHI_QAIC_CTRL_H__ */

-10

drivers/accel/qaic/qaic_drv.c

··· 25 25 #include <uapi/drm/qaic_accel.h> 26 26 27 27 #include "mhi_controller.h" 28 - #include "mhi_qaic_ctrl.h" 29 28 #include "qaic.h" 30 29 31 30 MODULE_IMPORT_NS(DMA_BUF); ··· 600 601 goto free_mhi; 601 602 } 602 603 603 - ret = mhi_qaic_ctrl_init(); 604 - if (ret) { 605 - pr_debug("qaic: mhi_qaic_ctrl_init failed %d\n", ret); 606 - goto free_pci; 607 - } 608 - 609 604 return 0; 610 605 611 - free_pci: 612 - pci_unregister_driver(&qaic_pci_driver); 613 606 free_mhi: 614 607 mhi_driver_unregister(&qaic_mhi_driver); 615 608 return ret; ··· 625 634 * reinitializing the link_up state after the cleanup is done. 626 635 */ 627 636 link_up = true; 628 - mhi_qaic_ctrl_deinit(); 629 637 pci_unregister_driver(&qaic_pci_driver); 630 638 mhi_driver_unregister(&qaic_mhi_driver); 631 639 }

+9 -1

drivers/gpu/drm/panel/panel-novatek-nt35950.c

··· 585 585 DRM_MODE_CONNECTOR_DSI); 586 586 587 587 ret = drm_panel_of_backlight(&nt->panel); 588 - if (ret) 588 + if (ret) { 589 + if (num_dsis == 2) 590 + mipi_dsi_device_unregister(nt->dsi[1]); 591 + 589 592 return dev_err_probe(dev, ret, "Failed to get backlight\n"); 593 + } 590 594 591 595 drm_panel_add(&nt->panel); 592 596 ··· 606 602 607 603 ret = mipi_dsi_attach(nt->dsi[i]); 608 604 if (ret < 0) { 605 + /* If we fail to attach to either host, we're done */ 606 + if (num_dsis == 2) 607 + mipi_dsi_device_unregister(nt->dsi[1]); 608 + 609 609 return dev_err_probe(dev, ret, 610 610 "Cannot attach to DSI%d host.\n", i); 611 611 }

+1 -1

drivers/gpu/drm/panel/panel-orisetech-otm8009a.c

··· 471 471 DRM_MODE_CONNECTOR_DSI); 472 472 473 473 ctx->bl_dev = devm_backlight_device_register(dev, dev_name(dev), 474 - dsi->host->dev, ctx, 474 + dev, ctx, 475 475 &otm8009a_backlight_ops, 476 476 NULL); 477 477 if (IS_ERR(ctx->bl_dev)) {

+11 -19

drivers/gpu/drm/ttm/ttm_pool.c

··· 47 47 48 48 #include "ttm_module.h" 49 49 50 - #define TTM_MAX_ORDER (PMD_SHIFT - PAGE_SHIFT) 51 - #define __TTM_DIM_ORDER (TTM_MAX_ORDER + 1) 52 - /* Some architectures have a weird PMD_SHIFT */ 53 - #define TTM_DIM_ORDER (__TTM_DIM_ORDER <= MAX_ORDER ? __TTM_DIM_ORDER : MAX_ORDER) 54 - 55 50 /** 56 51 * struct ttm_pool_dma - Helper object for coherent DMA mappings 57 52 * ··· 65 70 66 71 static atomic_long_t allocated_pages; 67 72 68 - static struct ttm_pool_type global_write_combined[TTM_DIM_ORDER]; 69 - static struct ttm_pool_type global_uncached[TTM_DIM_ORDER]; 73 + static struct ttm_pool_type global_write_combined[MAX_ORDER]; 74 + static struct ttm_pool_type global_uncached[MAX_ORDER]; 70 75 71 - static struct ttm_pool_type global_dma32_write_combined[TTM_DIM_ORDER]; 72 - static struct ttm_pool_type global_dma32_uncached[TTM_DIM_ORDER]; 76 + static struct ttm_pool_type global_dma32_write_combined[MAX_ORDER]; 77 + static struct ttm_pool_type global_dma32_uncached[MAX_ORDER]; 73 78 74 79 static spinlock_t shrinker_lock; 75 80 static struct list_head shrinker_list; ··· 444 449 else 445 450 gfp_flags |= GFP_HIGHUSER; 446 451 447 - for (order = min_t(unsigned int, TTM_MAX_ORDER, __fls(num_pages)); 452 + for (order = min_t(unsigned int, MAX_ORDER - 1, __fls(num_pages)); 448 453 num_pages; 449 454 order = min_t(unsigned int, order, __fls(num_pages))) { 450 455 struct ttm_pool_type *pt; ··· 563 568 564 569 if (use_dma_alloc) { 565 570 for (i = 0; i < TTM_NUM_CACHING_TYPES; ++i) 566 - for (j = 0; j < TTM_DIM_ORDER; ++j) 571 + for (j = 0; j < MAX_ORDER; ++j) 567 572 ttm_pool_type_init(&pool->caching[i].orders[j], 568 573 pool, i, j); 569 574 } ··· 583 588 584 589 if (pool->use_dma_alloc) { 585 590 for (i = 0; i < TTM_NUM_CACHING_TYPES; ++i) 586 - for (j = 0; j < TTM_DIM_ORDER; ++j) 591 + for (j = 0; j < MAX_ORDER; ++j) 587 592 ttm_pool_type_fini(&pool->caching[i].orders[j]); 588 593 } 589 594 ··· 637 642 unsigned int i; 638 643 639 644 seq_puts(m, "\t "); 640 - for (i = 0; i < TTM_DIM_ORDER; ++i) 645 + for (i = 0; i < MAX_ORDER; ++i) 641 646 seq_printf(m, " ---%2u---", i); 642 647 seq_puts(m, "\n"); 643 648 } ··· 648 653 { 649 654 unsigned int i; 650 655 651 - for (i = 0; i < TTM_DIM_ORDER; ++i) 656 + for (i = 0; i < MAX_ORDER; ++i) 652 657 seq_printf(m, " %8u", ttm_pool_type_count(&pt[i])); 653 658 seq_puts(m, "\n"); 654 659 } ··· 751 756 { 752 757 unsigned int i; 753 758 754 - BUILD_BUG_ON(TTM_DIM_ORDER > MAX_ORDER); 755 - BUILD_BUG_ON(TTM_DIM_ORDER < 1); 756 - 757 759 if (!page_pool_size) 758 760 page_pool_size = num_pages; 759 761 760 762 spin_lock_init(&shrinker_lock); 761 763 INIT_LIST_HEAD(&shrinker_list); 762 764 763 - for (i = 0; i < TTM_DIM_ORDER; ++i) { 765 + for (i = 0; i < MAX_ORDER; ++i) { 764 766 ttm_pool_type_init(&global_write_combined[i], NULL, 765 767 ttm_write_combined, i); 766 768 ttm_pool_type_init(&global_uncached[i], NULL, ttm_uncached, i); ··· 790 798 { 791 799 unsigned int i; 792 800 793 - for (i = 0; i < TTM_DIM_ORDER; ++i) { 801 + for (i = 0; i < MAX_ORDER; ++i) { 794 802 ttm_pool_type_fini(&global_write_combined[i]); 795 803 ttm_pool_type_fini(&global_uncached[i]); 796 804

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