tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

net: stmmac: sun8i: drop unneeded default syscon value

For some odd reason we were very jealous about the value of the EMAC
clock register from the syscon block, insisting on a reset value and
only doing read-modify-write operations on that register, even though we
pretty much know the register layout.
This already led to a basically redundant entry for the H6, which only
differs by that value. We seem to have the same situation with the new
A523 SoC, which again is compatible to the A64, but has a different
syscon reset value.

Drop any assumptions about that value, and set or clear the bits that we
want to program, from scratch (starting with a value of 0). For the
remove() implementation, we just turn on the POWERDOWN bit, and deselect
the internal PHY, which mimics the existing code.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Corentin LABBE <clabbe.montjoie@gmail.com>
Tested-by: Corentin LABBE <clabbe.montjoie@gmail.com>
Tested-by: Paul Kocialkowski <paulk@sys-base.io>
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Link: https://patch.msgid.link/20250825172055.19794-1-andre.przywara@arm.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

authored by

Andre Przywara and committed by
Jakub Kicinski 33035519 40fb9751

+4 -43
+4 -43
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
··· 31 31 */ 32 32 33 33 /* struct emac_variant - Describe dwmac-sun8i hardware variant 34 - * @default_syscon_value: The default value of the EMAC register in syscon 35 - * This value is used for disabling properly EMAC 36 - * and used as a good starting value in case of the 37 - * boot process(uboot) leave some stuff. 38 34 * @syscon_field reg_field for the syscon's gmac register 39 35 * @soc_has_internal_phy: Does the MAC embed an internal PHY 40 36 * @support_mii: Does the MAC handle MII ··· 44 48 * value of zero indicates this is not supported. 45 49 */ 46 50 struct emac_variant { 47 - u32 default_syscon_value; 48 51 const struct reg_field *syscon_field; 49 52 bool soc_has_internal_phy; 50 53 bool support_mii; ··· 89 94 }; 90 95 91 96 static const struct emac_variant emac_variant_h3 = { 92 - .default_syscon_value = 0x58000, 93 97 .syscon_field = &sun8i_syscon_reg_field, 94 98 .soc_has_internal_phy = true, 95 99 .support_mii = true, ··· 99 105 }; 100 106 101 107 static const struct emac_variant emac_variant_v3s = { 102 - .default_syscon_value = 0x38000, 103 108 .syscon_field = &sun8i_syscon_reg_field, 104 109 .soc_has_internal_phy = true, 105 110 .support_mii = true 106 111 }; 107 112 108 113 static const struct emac_variant emac_variant_a83t = { 109 - .default_syscon_value = 0, 110 114 .syscon_field = &sun8i_syscon_reg_field, 111 115 .soc_has_internal_phy = false, 112 116 .support_mii = true, ··· 114 122 }; 115 123 116 124 static const struct emac_variant emac_variant_r40 = { 117 - .default_syscon_value = 0, 118 125 .syscon_field = &sun8i_ccu_reg_field, 119 126 .support_mii = true, 120 127 .support_rgmii = true, ··· 121 130 }; 122 131 123 132 static const struct emac_variant emac_variant_a64 = { 124 - .default_syscon_value = 0, 125 133 .syscon_field = &sun8i_syscon_reg_field, 126 134 .soc_has_internal_phy = false, 127 135 .support_mii = true, ··· 131 141 }; 132 142 133 143 static const struct emac_variant emac_variant_h6 = { 134 - .default_syscon_value = 0x50000, 135 144 .syscon_field = &sun8i_syscon_reg_field, 136 145 /* The "Internal PHY" of H6 is not on the die. It's on the 137 146 * co-packaged AC200 chip instead. ··· 922 933 struct sunxi_priv_data *gmac = plat->bsp_priv; 923 934 struct device_node *node = dev->of_node; 924 935 int ret; 925 - u32 reg, val; 926 - 927 - ret = regmap_field_read(gmac->regmap_field, &val); 928 - if (ret) { 929 - dev_err(dev, "Fail to read from regmap field.\n"); 930 - return ret; 931 - } 932 - 933 - reg = gmac->variant->default_syscon_value; 934 - if (reg != val) 935 - dev_warn(dev, 936 - "Current syscon value is not the default %x (expect %x)\n", 937 - val, reg); 936 + u32 reg = 0, val; 938 937 939 938 if (gmac->variant->soc_has_internal_phy) { 940 939 if (of_property_read_bool(node, "allwinner,leds-active-low")) 941 940 reg |= H3_EPHY_LED_POL; 942 - else 943 - reg &= ~H3_EPHY_LED_POL; 944 941 945 942 /* Force EPHY xtal frequency to 24MHz. */ 946 943 reg |= H3_EPHY_CLK_SEL; ··· 940 965 * address. No need to mask it again. 941 966 */ 942 967 reg |= ret << H3_EPHY_ADDR_SHIFT; 943 - } else { 944 - /* For SoCs without internal PHY the PHY selection bit should be 945 - * set to 0 (external PHY). 946 - */ 947 - reg &= ~H3_EPHY_SELECT; 948 968 } 949 969 950 970 if (!of_property_read_u32(node, "allwinner,tx-delay-ps", &val)) { ··· 950 980 val /= 100; 951 981 dev_dbg(dev, "set tx-delay to %x\n", val); 952 982 if (val <= gmac->variant->tx_delay_max) { 953 - reg &= ~(gmac->variant->tx_delay_max << 954 - SYSCON_ETXDC_SHIFT); 955 983 reg |= (val << SYSCON_ETXDC_SHIFT); 956 984 } else { 957 985 dev_err(dev, "Invalid TX clock delay: %d\n", ··· 966 998 val /= 100; 967 999 dev_dbg(dev, "set rx-delay to %x\n", val); 968 1000 if (val <= gmac->variant->rx_delay_max) { 969 - reg &= ~(gmac->variant->rx_delay_max << 970 - SYSCON_ERXDC_SHIFT); 971 1001 reg |= (val << SYSCON_ERXDC_SHIFT); 972 1002 } else { 973 1003 dev_err(dev, "Invalid RX clock delay: %d\n", ··· 973 1007 return -EINVAL; 974 1008 } 975 1009 } 976 - 977 - /* Clear interface mode bits */ 978 - reg &= ~(SYSCON_ETCS_MASK | SYSCON_EPIT); 979 - if (gmac->variant->support_rmii) 980 - reg &= ~SYSCON_RMII_EN; 981 1010 982 1011 switch (plat->mac_interface) { 983 1012 case PHY_INTERFACE_MODE_MII: ··· 1000 1039 1001 1040 static void sun8i_dwmac_unset_syscon(struct sunxi_priv_data *gmac) 1002 1041 { 1003 - u32 reg = gmac->variant->default_syscon_value; 1004 - 1005 - regmap_field_write(gmac->regmap_field, reg); 1042 + if (gmac->variant->soc_has_internal_phy) 1043 + regmap_field_write(gmac->regmap_field, 1044 + (H3_EPHY_SHUTDOWN | H3_EPHY_SELECT)); 1006 1045 } 1007 1046 1008 1047 static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv)