Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'for-6.19/cxl-prm' into cxl-for-next
- Simplify cxl_rd_ops allocation
- Group xor arithmetric setup code
- Remove local variable @inc in cxl_port_setup_targets()
+12
-31
+4
-11
drivers/cxl/acpi.c
+4
-11
drivers/cxl/acpi.c
···
469
469
ig = CXL_DECODER_MIN_GRANULARITY;
470
470
cxld->interleave_granularity = ig;
471
471
472
-
cxl_setup_extended_linear_cache(cxlrd);
473
-
474
472
if (cfmws->interleave_arithmetic == ACPI_CEDT_CFMWS_ARITHMETIC_XOR) {
475
473
if (ways != 1 && ways != 3) {
476
474
cxims_ctx = (struct cxl_cxims_context) {
···
484
486
return -EINVAL;
485
487
}
486
488
}
489
+
cxlrd->ops.hpa_to_spa = cxl_apply_xor_maps;
490
+
cxlrd->ops.spa_to_hpa = cxl_apply_xor_maps;
487
491
}
492
+
493
+
cxl_setup_extended_linear_cache(cxlrd);
488
494
489
495
cxlrd->qos_class = cfmws->qtg_id;
490
-
491
-
if (cfmws->interleave_arithmetic == ACPI_CEDT_CFMWS_ARITHMETIC_XOR) {
492
-
cxlrd->ops = kzalloc(sizeof(*cxlrd->ops), GFP_KERNEL);
493
-
if (!cxlrd->ops)
494
-
return -ENOMEM;
495
-
496
-
cxlrd->ops->hpa_to_spa = cxl_apply_xor_maps;
497
-
cxlrd->ops->spa_to_hpa = cxl_apply_xor_maps;
498
-
}
499
496
500
497
rc = cxl_decoder_add(cxld);
501
498
if (rc)
-1
drivers/cxl/core/port.c
-1
drivers/cxl/core/port.c
+7
-18
drivers/cxl/core/region.c
+7
-18
drivers/cxl/core/region.c
···
1371
1371
struct cxl_endpoint_decoder *cxled)
1372
1372
{
1373
1373
struct cxl_root_decoder *cxlrd = to_cxl_root_decoder(cxlr->dev.parent);
1374
-
int parent_iw, parent_ig, ig, iw, rc, inc = 0, pos = cxled->pos;
1374
+
int parent_iw, parent_ig, ig, iw, rc, pos = cxled->pos;
1375
1375
struct cxl_port *parent_port = to_cxl_port(port->dev.parent);
1376
1376
struct cxl_region_ref *cxl_rr = cxl_rr_load(port, cxlr);
1377
1377
struct cxl_memdev *cxlmd = cxled_to_memdev(cxled);
···
1563
1563
cxlsd->target[cxl_rr->nr_targets_set] = ep->dport;
1564
1564
cxlsd->cxld.target_map[cxl_rr->nr_targets_set] = ep->dport->port_id;
1565
1565
}
1566
-
inc = 1;
1566
+
cxl_rr->nr_targets_set++;
1567
1567
out_target_set:
1568
-
cxl_rr->nr_targets_set += inc;
1569
1568
dev_dbg(&cxlr->dev, "%s:%s target[%d] = %s for %s:%s @ %d\n",
1570
1569
dev_name(port->uport_dev), dev_name(&port->dev),
1571
1570
cxl_rr->nr_targets_set - 1, dev_name(ep->dport->dport_dev),
···
2967
2968
return false;
2968
2969
}
2969
2970
2970
-
static bool has_hpa_to_spa(struct cxl_root_decoder *cxlrd)
2971
-
{
2972
-
return cxlrd->ops && cxlrd->ops->hpa_to_spa;
2973
-
}
2974
-
2975
-
static bool has_spa_to_hpa(struct cxl_root_decoder *cxlrd)
2976
-
{
2977
-
return cxlrd->ops && cxlrd->ops->spa_to_hpa;
2978
-
}
2979
-
2980
2971
#define CXL_POS_ZERO 0
2981
2972
/**
2982
2973
* cxl_validate_translation_params
···
3140
3151
hpa = hpa_offset + p->res->start + p->cache_size;
3141
3152
3142
3153
/* Root decoder translation overrides typical modulo decode */
3143
-
if (has_hpa_to_spa(cxlrd))
3144
-
hpa = cxlrd->ops->hpa_to_spa(cxlrd, hpa);
3154
+
if (cxlrd->ops.hpa_to_spa)
3155
+
hpa = cxlrd->ops.hpa_to_spa(cxlrd, hpa);
3145
3156
3146
3157
if (!cxl_resource_contains_addr(p->res, hpa)) {
3147
3158
dev_dbg(&cxlr->dev,
···
3150
3161
}
3151
3162
3152
3163
/* Simple chunk check, by pos & gran, only applies to modulo decodes */
3153
-
if (!has_hpa_to_spa(cxlrd) && (!cxl_is_hpa_in_chunk(hpa, cxlr, pos)))
3164
+
if (!cxlrd->ops.hpa_to_spa && !cxl_is_hpa_in_chunk(hpa, cxlr, pos))
3154
3165
return ULLONG_MAX;
3155
3166
3156
3167
return hpa;
···
3183
3194
* If the root decoder has SPA to CXL HPA callback, use it. Otherwise
3184
3195
* CXL HPA is assumed to equal SPA.
3185
3196
*/
3186
-
if (has_spa_to_hpa(cxlrd)) {
3187
-
hpa = cxlrd->ops->spa_to_hpa(cxlrd, p->res->start + offset);
3197
+
if (cxlrd->ops.spa_to_hpa) {
3198
+
hpa = cxlrd->ops.spa_to_hpa(cxlrd, p->res->start + offset);
3188
3199
hpa_offset = hpa - p->res->start;
3189
3200
} else {
3190
3201
hpa_offset = offset;