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drm/rockchip: dw_hdmi_qp: Provide ref clock rate in dw_hdmi_qp_plat_data

In order to support correct initialization of the timer base in the HDMI
QP IP block, setup platform data to include the required reference clock
rate.

While at it, ensure plat_data is zero-initialized in
dw_hdmi_qp_rockchip_bind().

Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250903-rk3588-hdmi-cec-v4-5-fa25163c4b08@collabora.com

authored by

Cristian Ciocaltea and committed by
Heiko Stuebner 33ea4d52 9baa0232

+10 -1
+10 -1
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
··· 429 429 void *data) 430 430 { 431 431 struct platform_device *pdev = to_platform_device(dev); 432 + struct dw_hdmi_qp_plat_data plat_data = {}; 432 433 const struct rockchip_hdmi_qp_cfg *cfg; 433 - struct dw_hdmi_qp_plat_data plat_data; 434 434 struct drm_device *drm = data; 435 435 struct drm_connector *connector; 436 436 struct drm_encoder *encoder; 437 437 struct rockchip_hdmi_qp *hdmi; 438 438 struct resource *res; 439 439 struct clk_bulk_data *clks; 440 + struct clk *ref_clk; 440 441 int ret, irq, i; 441 442 442 443 if (!pdev->dev.of_node) ··· 506 505 ret = devm_clk_bulk_get_all_enabled(hdmi->dev, &clks); 507 506 if (ret < 0) 508 507 return dev_err_probe(hdmi->dev, ret, "Failed to get clocks\n"); 508 + 509 + ref_clk = clk_get(hdmi->dev, "ref"); 510 + if (IS_ERR(ref_clk)) 511 + return dev_err_probe(hdmi->dev, PTR_ERR(ref_clk), 512 + "Failed to get ref clock\n"); 513 + 514 + plat_data.ref_clk_rate = clk_get_rate(ref_clk); 515 + clk_put(ref_clk); 509 516 510 517 hdmi->enable_gpio = devm_gpiod_get_optional(hdmi->dev, "enable", 511 518 GPIOD_OUT_HIGH);