Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'i2c-embedded/for-current' of git://git.pengutronix.de/git/wsa/linux
Pull i2c fixes from Wolfram Sang:
"Bugfixes for the i2c subsystem.
Except for a few one-liners, there is mainly one revert because of an
overlooked dependency. Since there is no linux-next at the moment, I
did some extra testing, and all was fine for me."
* 'i2c-embedded/for-current' of git://git.pengutronix.de/git/wsa/linux:
i2c: mxs: Handle i2c DMA failure properly
i2c: s3c2410: Fix code to free gpios
i2c: omap: ensure writes to dev->buf_len are ordered
Revert "ARM: OMAP: convert I2C driver to PM QoS for MPU latency constraints"
i2c: at91: fix SMBus quick command
+48
-20
+21
arch/arm/plat-omap/i2c.c
+21
arch/arm/plat-omap/i2c.c
···
26
26
#include <linux/kernel.h>
27
27
#include <linux/platform_device.h>
28
28
#include <linux/i2c.h>
29
+
#include <linux/i2c-omap.h>
29
30
#include <linux/slab.h>
30
31
#include <linux/err.h>
31
32
#include <linux/clk.h>
32
33
33
34
#include <mach/irqs.h>
34
35
#include <plat/i2c.h>
36
+
#include <plat/omap-pm.h>
35
37
#include <plat/omap_device.h>
36
38
37
39
#define OMAP_I2C_SIZE 0x3f
···
129
127
130
128
131
129
#ifdef CONFIG_ARCH_OMAP2PLUS
130
+
/*
131
+
* XXX This function is a temporary compatibility wrapper - only
132
+
* needed until the I2C driver can be converted to call
133
+
* omap_pm_set_max_dev_wakeup_lat() and handle a return code.
134
+
*/
135
+
static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
136
+
{
137
+
omap_pm_set_max_mpu_wakeup_lat(dev, t);
138
+
}
139
+
132
140
static inline int omap2_i2c_add_bus(int bus_id)
133
141
{
134
142
int l;
···
170
158
dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
171
159
pdata->flags = dev_attr->flags;
172
160
161
+
/*
162
+
* When waiting for completion of a i2c transfer, we need to
163
+
* set a wake up latency constraint for the MPU. This is to
164
+
* ensure quick enough wakeup from idle, when transfer
165
+
* completes.
166
+
* Only omap3 has support for constraints
167
+
*/
168
+
if (cpu_is_omap34xx())
169
+
pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
173
170
pdev = omap_device_build(name, bus_id, oh, pdata,
174
171
sizeof(struct omap_i2c_bus_platform_data),
175
172
NULL, 0, 0);
+6
-1
drivers/i2c/busses/i2c-at91.c
+6
-1
drivers/i2c/busses/i2c-at91.c
···
39
39
#define AT91_TWI_STOP 0x0002 /* Send a Stop Condition */
40
40
#define AT91_TWI_MSEN 0x0004 /* Master Transfer Enable */
41
41
#define AT91_TWI_SVDIS 0x0020 /* Slave Transfer Disable */
42
+
#define AT91_TWI_QUICK 0x0040 /* SMBus quick command */
42
43
#define AT91_TWI_SWRST 0x0080 /* Software Reset */
43
44
44
45
#define AT91_TWI_MMR 0x0004 /* Master Mode Register */
···
213
212
214
213
INIT_COMPLETION(dev->cmd_complete);
215
214
dev->transfer_status = 0;
216
-
if (dev->msg->flags & I2C_M_RD) {
215
+
216
+
if (!dev->buf_len) {
217
+
at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_QUICK);
218
+
at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_TXCOMP);
219
+
} else if (dev->msg->flags & I2C_M_RD) {
217
220
unsigned start_flags = AT91_TWI_START;
218
221
219
222
if (at91_twi_read(dev, AT91_TWI_SR) & AT91_TWI_RXRDY) {
+2
drivers/i2c/busses/i2c-mxs.c
+2
drivers/i2c/busses/i2c-mxs.c
···
287
287
select_init_dma_fail:
288
288
dma_unmap_sg(i2c->dev, &i2c->sg_io[0], 1, DMA_TO_DEVICE);
289
289
select_init_pio_fail:
290
+
dmaengine_terminate_all(i2c->dmach);
290
291
return -EINVAL;
291
292
292
293
/* Write failpath. */
293
294
write_init_dma_fail:
294
295
dma_unmap_sg(i2c->dev, i2c->sg_io, 2, DMA_TO_DEVICE);
295
296
write_init_pio_fail:
297
+
dmaengine_terminate_all(i2c->dmach);
296
298
return -EINVAL;
297
299
}
298
300
+17
-19
drivers/i2c/busses/i2c-omap.c
+17
-19
drivers/i2c/busses/i2c-omap.c
···
43
43
#include <linux/slab.h>
44
44
#include <linux/i2c-omap.h>
45
45
#include <linux/pm_runtime.h>
46
-
#include <linux/pm_qos.h>
47
46
48
47
/* I2C controller revisions */
49
48
#define OMAP_I2C_OMAP1_REV_2 0x20
···
186
187
int reg_shift; /* bit shift for I2C register addresses */
187
188
struct completion cmd_complete;
188
189
struct resource *ioarea;
189
-
u32 latency; /* maximum MPU wkup latency */
190
-
struct pm_qos_request pm_qos_request;
190
+
u32 latency; /* maximum mpu wkup latency */
191
+
void (*set_mpu_wkup_lat)(struct device *dev,
192
+
long latency);
191
193
u32 speed; /* Speed of bus in kHz */
192
194
u32 dtrev; /* extra revision from DT */
193
195
u32 flags;
···
494
494
dev->b_hw = 1; /* Enable hardware fixes */
495
495
496
496
/* calculate wakeup latency constraint for MPU */
497
-
dev->latency = (1000000 * dev->threshold) / (1000 * dev->speed / 8);
497
+
if (dev->set_mpu_wkup_lat != NULL)
498
+
dev->latency = (1000000 * dev->threshold) /
499
+
(1000 * dev->speed / 8);
498
500
}
499
501
500
502
/*
···
523
521
/* REVISIT: Could the STB bit of I2C_CON be used with probing? */
524
522
dev->buf = msg->buf;
525
523
dev->buf_len = msg->len;
524
+
525
+
/* make sure writes to dev->buf_len are ordered */
526
+
barrier();
526
527
527
528
omap_i2c_write_reg(dev, OMAP_I2C_CNT_REG, dev->buf_len);
528
529
···
584
579
*/
585
580
timeout = wait_for_completion_timeout(&dev->cmd_complete,
586
581
OMAP_I2C_TIMEOUT);
587
-
dev->buf_len = 0;
588
582
if (timeout == 0) {
589
583
dev_err(dev->dev, "controller timed out\n");
590
584
omap_i2c_init(dev);
···
633
629
if (r < 0)
634
630
goto out;
635
631
636
-
/*
637
-
* When waiting for completion of a i2c transfer, we need to
638
-
* set a wake up latency constraint for the MPU. This is to
639
-
* ensure quick enough wakeup from idle, when transfer
640
-
* completes.
641
-
*/
642
-
if (dev->latency)
643
-
pm_qos_add_request(&dev->pm_qos_request,
644
-
PM_QOS_CPU_DMA_LATENCY,
645
-
dev->latency);
632
+
if (dev->set_mpu_wkup_lat != NULL)
633
+
dev->set_mpu_wkup_lat(dev->dev, dev->latency);
646
634
647
635
for (i = 0; i < num; i++) {
648
636
r = omap_i2c_xfer_msg(adap, &msgs[i], (i == (num - 1)));
···
642
646
break;
643
647
}
644
648
645
-
if (dev->latency)
646
-
pm_qos_remove_request(&dev->pm_qos_request);
649
+
if (dev->set_mpu_wkup_lat != NULL)
650
+
dev->set_mpu_wkup_lat(dev->dev, -1);
647
651
648
652
if (r == 0)
649
653
r = num;
···
1100
1104
} else if (pdata != NULL) {
1101
1105
dev->speed = pdata->clkrate;
1102
1106
dev->flags = pdata->flags;
1107
+
dev->set_mpu_wkup_lat = pdata->set_mpu_wkup_lat;
1103
1108
dev->dtrev = pdata->rev;
1104
1109
}
1105
1110
···
1156
1159
dev->b_hw = 1; /* Enable hardware fixes */
1157
1160
1158
1161
/* calculate wakeup latency constraint for MPU */
1159
-
dev->latency = (1000000 * dev->fifo_size) /
1160
-
(1000 * dev->speed / 8);
1162
+
if (dev->set_mpu_wkup_lat != NULL)
1163
+
dev->latency = (1000000 * dev->fifo_size) /
1164
+
(1000 * dev->speed / 8);
1161
1165
}
1162
1166
1163
1167
/* reset ASAP, clearing any IRQs */
+1
drivers/i2c/busses/i2c-s3c2410.c
+1
drivers/i2c/busses/i2c-s3c2410.c