Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
powerpc/kvm: Fix build failure with HV KVM and CBE
powerpc/ps3: Fix lv1_gpu_attribute hcall
powerpc/ps3: Fix PS3 repository build warnings
powerpc/ps3: irq: Remove IRQF_DISABLED
powerpc/irq: Remove IRQF_DISABLED
powerpc/numa: NUMA topology support for PowerNV
powerpc: Add System RAM to /proc/iomem
powerpc: Add KVM as module to defconfigs
powerpc/kvm: Fix build with older toolchains
powerpc, tqm5200: update tqm5200_defconfig to fit for charon board.
powerpc/5200: add support for charon board
+346
-65
+236
arch/powerpc/boot/dts/charon.dts
+236
arch/powerpc/boot/dts/charon.dts
···
1
+
/*
2
+
* charon board Device Tree Source
3
+
*
4
+
* Copyright (C) 2007 Semihalf
5
+
* Marian Balakowicz <m8@semihalf.com>
6
+
*
7
+
* Copyright (C) 2010 DENX Software Engineering GmbH
8
+
* Heiko Schocher <hs@denx.de>
9
+
*
10
+
* This program is free software; you can redistribute it and/or modify it
11
+
* under the terms of the GNU General Public License as published by the
12
+
* Free Software Foundation; either version 2 of the License, or (at your
13
+
* option) any later version.
14
+
*/
15
+
16
+
/dts-v1/;
17
+
18
+
/ {
19
+
model = "anon,charon";
20
+
compatible = "anon,charon";
21
+
#address-cells = <1>;
22
+
#size-cells = <1>;
23
+
interrupt-parent = <&mpc5200_pic>;
24
+
25
+
cpus {
26
+
#address-cells = <1>;
27
+
#size-cells = <0>;
28
+
29
+
PowerPC,5200@0 {
30
+
device_type = "cpu";
31
+
reg = <0>;
32
+
d-cache-line-size = <32>;
33
+
i-cache-line-size = <32>;
34
+
d-cache-size = <0x4000>; // L1, 16K
35
+
i-cache-size = <0x4000>; // L1, 16K
36
+
timebase-frequency = <0>; // from bootloader
37
+
bus-frequency = <0>; // from bootloader
38
+
clock-frequency = <0>; // from bootloader
39
+
};
40
+
};
41
+
42
+
memory {
43
+
device_type = "memory";
44
+
reg = <0x00000000 0x08000000>; // 128MB
45
+
};
46
+
47
+
soc5200@f0000000 {
48
+
#address-cells = <1>;
49
+
#size-cells = <1>;
50
+
compatible = "fsl,mpc5200-immr";
51
+
ranges = <0 0xf0000000 0x0000c000>;
52
+
reg = <0xf0000000 0x00000100>;
53
+
bus-frequency = <0>; // from bootloader
54
+
system-frequency = <0>; // from bootloader
55
+
56
+
cdm@200 {
57
+
compatible = "fsl,mpc5200-cdm";
58
+
reg = <0x200 0x38>;
59
+
};
60
+
61
+
mpc5200_pic: interrupt-controller@500 {
62
+
// 5200 interrupts are encoded into two levels;
63
+
interrupt-controller;
64
+
#interrupt-cells = <3>;
65
+
compatible = "fsl,mpc5200-pic";
66
+
reg = <0x500 0x80>;
67
+
};
68
+
69
+
timer@600 { // General Purpose Timer
70
+
compatible = "fsl,mpc5200-gpt";
71
+
reg = <0x600 0x10>;
72
+
interrupts = <1 9 0>;
73
+
fsl,has-wdt;
74
+
};
75
+
76
+
can@900 {
77
+
compatible = "fsl,mpc5200-mscan";
78
+
interrupts = <2 17 0>;
79
+
reg = <0x900 0x80>;
80
+
};
81
+
82
+
can@980 {
83
+
compatible = "fsl,mpc5200-mscan";
84
+
interrupts = <2 18 0>;
85
+
reg = <0x980 0x80>;
86
+
};
87
+
88
+
gpio_simple: gpio@b00 {
89
+
compatible = "fsl,mpc5200-gpio";
90
+
reg = <0xb00 0x40>;
91
+
interrupts = <1 7 0>;
92
+
gpio-controller;
93
+
#gpio-cells = <2>;
94
+
};
95
+
96
+
usb@1000 {
97
+
compatible = "fsl,mpc5200-ohci","ohci-be";
98
+
reg = <0x1000 0xff>;
99
+
interrupts = <2 6 0>;
100
+
};
101
+
102
+
dma-controller@1200 {
103
+
device_type = "dma-controller";
104
+
compatible = "fsl,mpc5200-bestcomm";
105
+
reg = <0x1200 0x80>;
106
+
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
107
+
3 4 0 3 5 0 3 6 0 3 7 0
108
+
3 8 0 3 9 0 3 10 0 3 11 0
109
+
3 12 0 3 13 0 3 14 0 3 15 0>;
110
+
};
111
+
112
+
xlb@1f00 {
113
+
compatible = "fsl,mpc5200-xlb";
114
+
reg = <0x1f00 0x100>;
115
+
};
116
+
117
+
serial@2000 { // PSC1
118
+
compatible = "fsl,mpc5200-psc-uart";
119
+
reg = <0x2000 0x100>;
120
+
interrupts = <2 1 0>;
121
+
};
122
+
123
+
serial@2400 { // PSC3
124
+
compatible = "fsl,mpc5200-psc-uart";
125
+
reg = <0x2400 0x100>;
126
+
interrupts = <2 3 0>;
127
+
};
128
+
129
+
ethernet@3000 {
130
+
compatible = "fsl,mpc5200-fec";
131
+
reg = <0x3000 0x400>;
132
+
local-mac-address = [ 00 00 00 00 00 00 ];
133
+
interrupts = <2 5 0>;
134
+
fixed-link = <1 1 100 0 0>;
135
+
};
136
+
137
+
mdio@3000 {
138
+
#address-cells = <1>;
139
+
#size-cells = <0>;
140
+
compatible = "fsl,mpc5200-mdio";
141
+
reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
142
+
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
143
+
};
144
+
145
+
ata@3a00 {
146
+
compatible = "fsl,mpc5200-ata";
147
+
reg = <0x3a00 0x100>;
148
+
interrupts = <2 7 0>;
149
+
};
150
+
151
+
i2c@3d00 {
152
+
#address-cells = <1>;
153
+
#size-cells = <0>;
154
+
compatible = "fsl,mpc5200-i2c","fsl-i2c";
155
+
reg = <0x3d00 0x40>;
156
+
interrupts = <2 15 0>;
157
+
};
158
+
159
+
160
+
i2c@3d40 {
161
+
#address-cells = <1>;
162
+
#size-cells = <0>;
163
+
compatible = "fsl,mpc5200-i2c","fsl-i2c";
164
+
reg = <0x3d40 0x40>;
165
+
interrupts = <2 16 0>;
166
+
167
+
dtt@28 {
168
+
compatible = "national,lm80";
169
+
reg = <0x28>;
170
+
};
171
+
172
+
rtc@68 {
173
+
compatible = "dallas,ds1374";
174
+
reg = <0x68>;
175
+
};
176
+
};
177
+
178
+
sram@8000 {
179
+
compatible = "fsl,mpc5200-sram";
180
+
reg = <0x8000 0x4000>;
181
+
};
182
+
};
183
+
184
+
localbus {
185
+
compatible = "fsl,mpc5200-lpb","simple-bus";
186
+
#address-cells = <2>;
187
+
#size-cells = <1>;
188
+
ranges = < 0 0 0xfc000000 0x02000000
189
+
1 0 0xe0000000 0x04000000 // CS1 range, SM501
190
+
3 0 0xe8000000 0x00080000>;
191
+
192
+
flash@0,0 {
193
+
compatible = "cfi-flash";
194
+
reg = <0 0 0x02000000>;
195
+
bank-width = <4>;
196
+
device-width = <2>;
197
+
#size-cells = <1>;
198
+
#address-cells = <1>;
199
+
};
200
+
201
+
display@1,0 {
202
+
compatible = "smi,sm501";
203
+
reg = <1 0x00000000 0x00800000
204
+
1 0x03e00000 0x00200000>;
205
+
mode = "640x480-32@60";
206
+
interrupts = <1 1 3>;
207
+
little-endian;
208
+
};
209
+
210
+
mram0@3,0 {
211
+
compatible = "mtd-ram";
212
+
reg = <3 0x00000 0x80000>;
213
+
bank-width = <1>;
214
+
};
215
+
};
216
+
217
+
pci@f0000d00 {
218
+
#interrupt-cells = <1>;
219
+
#size-cells = <2>;
220
+
#address-cells = <3>;
221
+
device_type = "pci";
222
+
compatible = "fsl,mpc5200-pci";
223
+
reg = <0xf0000d00 0x100>;
224
+
interrupt-map-mask = <0xf800 0 0 7>;
225
+
interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3
226
+
0xc000 0 0 2 &mpc5200_pic 0 0 3
227
+
0xc000 0 0 3 &mpc5200_pic 0 0 3
228
+
0xc000 0 0 4 &mpc5200_pic 0 0 3>;
229
+
clock-frequency = <0>; // From boot loader
230
+
interrupts = <2 8 0 2 9 0 2 10 0>;
231
+
bus-range = <0 0>;
232
+
ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000
233
+
0x02000000 0 0x90000000 0x90000000 0 0x10000000
234
+
0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
235
+
};
236
+
};
+12
-8
arch/powerpc/configs/52xx/tqm5200_defconfig
+12
-8
arch/powerpc/configs/52xx/tqm5200_defconfig
···
1
1
CONFIG_EXPERIMENTAL=y
2
2
CONFIG_SYSVIPC=y
3
+
CONFIG_SPARSE_IRQ=y
3
4
CONFIG_LOG_BUF_SHIFT=14
4
5
CONFIG_BLK_DEV_INITRD=y
5
6
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
6
-
CONFIG_EXPERT=y
7
+
CONFIG_EMBEDDED=y
7
8
# CONFIG_SYSCTL_SYSCALL is not set
8
9
# CONFIG_KALLSYMS is not set
9
10
# CONFIG_EPOLL is not set
···
18
17
CONFIG_PPC_MPC5200_BUGFIX=y
19
18
# CONFIG_PPC_PMAC is not set
20
19
CONFIG_PPC_BESTCOMM=y
21
-
CONFIG_SPARSE_IRQ=y
22
20
CONFIG_PM=y
23
21
# CONFIG_PCI is not set
24
22
CONFIG_NET=y
···
38
38
CONFIG_MTD_CONCAT=y
39
39
CONFIG_MTD_PARTITIONS=y
40
40
CONFIG_MTD_CMDLINE_PARTS=y
41
+
CONFIG_MTD_OF_PARTS=y
41
42
CONFIG_MTD_CHAR=y
42
43
CONFIG_MTD_BLOCK=y
43
44
CONFIG_MTD_CFI=y
44
45
CONFIG_MTD_CFI_AMDSTD=y
45
46
CONFIG_MTD_ROM=y
46
47
CONFIG_MTD_PHYSMAP_OF=y
48
+
CONFIG_MTD_PLATRAM=y
47
49
CONFIG_PROC_DEVICETREE=y
48
50
CONFIG_BLK_DEV_LOOP=y
49
51
CONFIG_BLK_DEV_RAM=y
50
52
CONFIG_BLK_DEV_RAM_SIZE=32768
51
-
# CONFIG_MISC_DEVICES is not set
52
53
CONFIG_BLK_DEV_SD=y
53
54
CONFIG_CHR_DEV_SG=y
54
55
CONFIG_ATA=y
···
57
56
CONFIG_PATA_PLATFORM=y
58
57
CONFIG_NETDEVICES=y
59
58
CONFIG_LXT_PHY=y
59
+
CONFIG_FIXED_PHY=y
60
60
CONFIG_NET_ETHERNET=y
61
61
CONFIG_FEC_MPC52xx=y
62
62
# CONFIG_NETDEV_1000 is not set
63
63
# CONFIG_NETDEV_10000 is not set
64
-
# CONFIG_INPUT is not set
65
-
# CONFIG_SERIO is not set
66
-
# CONFIG_VT is not set
67
64
CONFIG_SERIAL_MPC52xx=y
68
65
CONFIG_SERIAL_MPC52xx_CONSOLE=y
69
66
CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD=115200
···
69
70
CONFIG_I2C=y
70
71
CONFIG_I2C_CHARDEV=y
71
72
CONFIG_I2C_MPC=y
73
+
CONFIG_SENSORS_LM80=y
72
74
CONFIG_WATCHDOG=y
75
+
CONFIG_MFD_SM501=y
76
+
CONFIG_FB=y
77
+
CONFIG_FB_FOREIGN_ENDIAN=y
78
+
CONFIG_FB_SM501=y
79
+
CONFIG_FRAMEBUFFER_CONSOLE=y
73
80
CONFIG_USB=y
74
81
CONFIG_USB_DEVICEFS=y
75
82
# CONFIG_USB_DEVICE_CLASS is not set
···
85
80
CONFIG_USB_STORAGE=y
86
81
CONFIG_RTC_CLASS=y
87
82
CONFIG_RTC_DRV_DS1307=y
83
+
CONFIG_RTC_DRV_DS1374=y
88
84
CONFIG_EXT2_FS=y
89
85
CONFIG_EXT3_FS=y
90
86
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
91
-
CONFIG_INOTIFY=y
92
87
CONFIG_MSDOS_FS=y
93
88
CONFIG_VFAT_FS=y
94
89
CONFIG_PROC_KCORE=y
···
107
102
CONFIG_DETECT_HUNG_TASK=y
108
103
# CONFIG_DEBUG_BUGVERBOSE is not set
109
104
CONFIG_DEBUG_INFO=y
110
-
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
111
105
CONFIG_CRYPTO_ECB=y
112
106
CONFIG_CRYPTO_PCBC=y
113
107
# CONFIG_CRYPTO_ANSI_CPRNG is not set
+4
arch/powerpc/configs/ppc64_defconfig
+4
arch/powerpc/configs/ppc64_defconfig
+4
arch/powerpc/configs/pseries_defconfig
+4
arch/powerpc/configs/pseries_defconfig
+2
-2
arch/powerpc/include/asm/floppy.h
+2
-2
arch/powerpc/include/asm/floppy.h
···
108
108
{
109
109
if (can_use_virtual_dma)
110
110
return request_irq(FLOPPY_IRQ, floppy_hardint,
111
-
IRQF_DISABLED, "floppy", NULL);
111
+
0, "floppy", NULL);
112
112
else
113
113
return request_irq(FLOPPY_IRQ, floppy_interrupt,
114
-
IRQF_DISABLED, "floppy", NULL);
114
+
0, "floppy", NULL);
115
115
}
116
116
117
117
static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io)
+1
-1
arch/powerpc/include/asm/lv1call.h
+1
-1
arch/powerpc/include/asm/lv1call.h
···
316
316
LV1_CALL(gpu_context_iomap, 5, 0, 221 )
317
317
LV1_CALL(gpu_context_attribute, 6, 0, 225 )
318
318
LV1_CALL(gpu_context_intr, 1, 1, 227 )
319
-
LV1_CALL(gpu_attribute, 5, 0, 228 )
319
+
LV1_CALL(gpu_attribute, 3, 0, 228 )
320
320
LV1_CALL(get_rtc, 0, 2, 232 )
321
321
LV1_CALL(set_ppe_periodic_tracer_frequency, 1, 0, 240 )
322
322
LV1_CALL(start_ppe_periodic_tracer, 5, 0, 241 )
+2
-2
arch/powerpc/include/asm/xics.h
+2
-2
arch/powerpc/include/asm/xics.h
···
15
15
#define DEFAULT_PRIORITY 5
16
16
17
17
/*
18
-
* Mark IPIs as higher priority so we can take them inside interrupts that
19
-
* arent marked IRQF_DISABLED
18
+
* Mark IPIs as higher priority so we can take them inside interrupts
19
+
* FIXME: still true now?
20
20
*/
21
21
#define IPI_PRIORITY 4
22
22
+3
-3
arch/powerpc/kernel/exceptions-64s.S
+3
-3
arch/powerpc/kernel/exceptions-64s.S
···
267
267
268
268
#ifdef CONFIG_CBE_RAS
269
269
STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
270
-
KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
270
+
KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
271
271
#endif /* CONFIG_CBE_RAS */
272
272
273
273
STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
···
275
275
276
276
#ifdef CONFIG_CBE_RAS
277
277
STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
278
-
KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
278
+
KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
279
279
#endif /* CONFIG_CBE_RAS */
280
280
281
281
STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
···
283
283
284
284
#ifdef CONFIG_CBE_RAS
285
285
STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
286
-
KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
286
+
KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
287
287
#endif /* CONFIG_CBE_RAS */
288
288
289
289
. = 0x3000
+1
-1
arch/powerpc/kernel/smp.c
+1
-1
arch/powerpc/kernel/smp.c
···
187
187
return 1;
188
188
}
189
189
#endif
190
-
err = request_irq(virq, smp_ipi_action[msg], IRQF_DISABLED|IRQF_PERCPU,
190
+
err = request_irq(virq, smp_ipi_action[msg], IRQF_PERCPU,
191
191
smp_ipi_name[msg], 0);
192
192
WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n",
193
193
virq, smp_ipi_name[msg], err);
+1
-1
arch/powerpc/kvm/book3s_hv_rmhandlers.S
+1
-1
arch/powerpc/kvm/book3s_hv_rmhandlers.S
+30
arch/powerpc/mm/mem.c
+30
arch/powerpc/mm/mem.c
···
34
34
#include <linux/suspend.h>
35
35
#include <linux/memblock.h>
36
36
#include <linux/hugetlb.h>
37
+
#include <linux/slab.h>
37
38
38
39
#include <asm/pgalloc.h>
39
40
#include <asm/prom.h>
···
556
555
book3e_hugetlb_preload(vma->vm_mm, address, *ptep);
557
556
#endif
558
557
}
558
+
559
+
/*
560
+
* System memory should not be in /proc/iomem but various tools expect it
561
+
* (eg kdump).
562
+
*/
563
+
static int add_system_ram_resources(void)
564
+
{
565
+
struct memblock_region *reg;
566
+
567
+
for_each_memblock(memory, reg) {
568
+
struct resource *res;
569
+
unsigned long base = reg->base;
570
+
unsigned long size = reg->size;
571
+
572
+
res = kzalloc(sizeof(struct resource), GFP_KERNEL);
573
+
WARN_ON(!res);
574
+
575
+
if (res) {
576
+
res->name = "System RAM";
577
+
res->start = base;
578
+
res->end = base + size - 1;
579
+
res->flags = IORESOURCE_MEM;
580
+
WARN_ON(request_resource(&iomem_resource, res) < 0);
581
+
}
582
+
}
583
+
584
+
return 0;
585
+
}
586
+
subsys_initcall(add_system_ram_resources);
+17
-7
arch/powerpc/mm/numa.c
+17
-7
arch/powerpc/mm/numa.c
···
315
315
struct device_node *root;
316
316
const char *vec5;
317
317
318
-
root = of_find_node_by_path("/rtas");
318
+
if (firmware_has_feature(FW_FEATURE_OPAL))
319
+
root = of_find_node_by_path("/ibm,opal");
320
+
else
321
+
root = of_find_node_by_path("/rtas");
319
322
if (!root)
320
323
root = of_find_node_by_path("/");
321
324
···
347
344
348
345
#define VEC5_AFFINITY_BYTE 5
349
346
#define VEC5_AFFINITY 0x80
350
-
chosen = of_find_node_by_path("/chosen");
351
-
if (chosen) {
352
-
vec5 = of_get_property(chosen, "ibm,architecture-vec-5", NULL);
353
-
if (vec5 && (vec5[VEC5_AFFINITY_BYTE] & VEC5_AFFINITY)) {
354
-
dbg("Using form 1 affinity\n");
355
-
form1_affinity = 1;
347
+
348
+
if (firmware_has_feature(FW_FEATURE_OPAL))
349
+
form1_affinity = 1;
350
+
else {
351
+
chosen = of_find_node_by_path("/chosen");
352
+
if (chosen) {
353
+
vec5 = of_get_property(chosen,
354
+
"ibm,architecture-vec-5", NULL);
355
+
if (vec5 && (vec5[VEC5_AFFINITY_BYTE] &
356
+
VEC5_AFFINITY)) {
357
+
dbg("Using form 1 affinity\n");
358
+
form1_affinity = 1;
359
+
}
356
360
}
357
361
}
358
362
+1
arch/powerpc/platforms/52xx/mpc5200_simple.c
+1
arch/powerpc/platforms/52xx/mpc5200_simple.c
+1
-1
arch/powerpc/platforms/cell/beat.c
+1
-1
arch/powerpc/platforms/cell/beat.c
+1
-1
arch/powerpc/platforms/cell/celleb_scc_pciex.c
+1
-1
arch/powerpc/platforms/cell/celleb_scc_pciex.c
···
514
514
virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
515
515
oirq.size);
516
516
if (request_irq(virq, pciex_handle_internal_irq,
517
-
IRQF_DISABLED, "pciex", (void *)phb)) {
517
+
0, "pciex", (void *)phb)) {
518
518
pr_err("PCIEXC:Failed to request irq\n");
519
519
goto error;
520
520
}
+1
-2
arch/powerpc/platforms/cell/iommu.c
+1
-2
arch/powerpc/platforms/cell/iommu.c
···
412
412
IIC_IRQ_IOEX_ATI | (iommu->nid << IIC_IRQ_NODE_SHIFT));
413
413
BUG_ON(virq == NO_IRQ);
414
414
415
-
ret = request_irq(virq, ioc_interrupt, IRQF_DISABLED,
416
-
iommu->name, iommu);
415
+
ret = request_irq(virq, ioc_interrupt, 0, iommu->name, iommu);
417
416
BUG_ON(ret);
418
417
419
418
/* set the IOC segment table origin register (and turn on the iommu) */
+1
-1
arch/powerpc/platforms/cell/pmu.c
+1
-1
arch/powerpc/platforms/cell/pmu.c
+3
-6
arch/powerpc/platforms/cell/spu_base.c
+3
-6
arch/powerpc/platforms/cell/spu_base.c
···
442
442
snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
443
443
spu->number);
444
444
ret = request_irq(spu->irqs[0], spu_irq_class_0,
445
-
IRQF_DISABLED,
446
-
spu->irq_c0, spu);
445
+
0, spu->irq_c0, spu);
447
446
if (ret)
448
447
goto bail0;
449
448
}
···
450
451
snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
451
452
spu->number);
452
453
ret = request_irq(spu->irqs[1], spu_irq_class_1,
453
-
IRQF_DISABLED,
454
-
spu->irq_c1, spu);
454
+
0, spu->irq_c1, spu);
455
455
if (ret)
456
456
goto bail1;
457
457
}
···
458
460
snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
459
461
spu->number);
460
462
ret = request_irq(spu->irqs[2], spu_irq_class_2,
461
-
IRQF_DISABLED,
462
-
spu->irq_c2, spu);
463
+
0, spu->irq_c2, spu);
463
464
if (ret)
464
465
goto bail2;
465
466
}
-1
arch/powerpc/platforms/powermac/pic.c
-1
arch/powerpc/platforms/powermac/pic.c
+2
-2
arch/powerpc/platforms/powermac/smp.c
+2
-2
arch/powerpc/platforms/powermac/smp.c
···
200
200
201
201
if (psurge_secondary_virq)
202
202
rc = request_irq(psurge_secondary_virq, psurge_ipi_intr,
203
-
IRQF_DISABLED|IRQF_PERCPU, "IPI", NULL);
203
+
IRQF_PERCPU, "IPI", NULL);
204
204
205
205
if (rc)
206
206
pr_err("Failed to setup secondary cpu IPI\n");
···
408
408
409
409
static struct irqaction psurge_irqaction = {
410
410
.handler = psurge_ipi_intr,
411
-
.flags = IRQF_DISABLED|IRQF_PERCPU,
411
+
.flags = IRQF_PERCPU,
412
412
.name = "primary IPI",
413
413
};
414
414
+1
-1
arch/powerpc/platforms/ps3/device-init.c
+1
-1
arch/powerpc/platforms/ps3/device-init.c
···
825
825
826
826
spin_lock_init(&dev.lock);
827
827
828
-
res = request_irq(irq, ps3_notification_interrupt, IRQF_DISABLED,
828
+
res = request_irq(irq, ps3_notification_interrupt, 0,
829
829
"ps3_notification", &dev);
830
830
if (res) {
831
831
pr_err("%s:%u: request_irq failed %d\n", __func__, __LINE__,
+16
-16
arch/powerpc/platforms/ps3/repository.c
+16
-16
arch/powerpc/platforms/ps3/repository.c
···
184
184
enum ps3_bus_type *bus_type)
185
185
{
186
186
int result;
187
-
u64 v1;
187
+
u64 v1 = 0;
188
188
189
189
result = read_node(PS3_LPAR_ID_PME,
190
190
make_first_field("bus", bus_index),
···
199
199
unsigned int *num_dev)
200
200
{
201
201
int result;
202
-
u64 v1;
202
+
u64 v1 = 0;
203
203
204
204
result = read_node(PS3_LPAR_ID_PME,
205
205
make_first_field("bus", bus_index),
···
239
239
unsigned int dev_index, enum ps3_dev_type *dev_type)
240
240
{
241
241
int result;
242
-
u64 v1;
242
+
u64 v1 = 0;
243
243
244
244
result = read_node(PS3_LPAR_ID_PME,
245
245
make_first_field("bus", bus_index),
···
256
256
enum ps3_interrupt_type *intr_type, unsigned int *interrupt_id)
257
257
{
258
258
int result;
259
-
u64 v1;
260
-
u64 v2;
259
+
u64 v1 = 0;
260
+
u64 v2 = 0;
261
261
262
262
result = read_node(PS3_LPAR_ID_PME,
263
263
make_first_field("bus", bus_index),
···
275
275
enum ps3_reg_type *reg_type)
276
276
{
277
277
int result;
278
-
u64 v1;
278
+
u64 v1 = 0;
279
279
280
280
result = read_node(PS3_LPAR_ID_PME,
281
281
make_first_field("bus", bus_index),
···
615
615
unsigned int dev_index, unsigned int *num_regions)
616
616
{
617
617
int result;
618
-
u64 v1;
618
+
u64 v1 = 0;
619
619
620
620
result = read_node(PS3_LPAR_ID_PME,
621
621
make_first_field("bus", bus_index),
···
631
631
unsigned int *region_id)
632
632
{
633
633
int result;
634
-
u64 v1;
634
+
u64 v1 = 0;
635
635
636
636
result = read_node(PS3_LPAR_ID_PME,
637
637
make_first_field("bus", bus_index),
···
786
786
int ps3_repository_read_num_spu_reserved(unsigned int *num_spu_reserved)
787
787
{
788
788
int result;
789
-
u64 v1;
789
+
u64 v1 = 0;
790
790
791
791
result = read_node(PS3_LPAR_ID_CURRENT,
792
792
make_first_field("bi", 0),
···
805
805
int ps3_repository_read_num_spu_resource_id(unsigned int *num_resource_id)
806
806
{
807
807
int result;
808
-
u64 v1;
808
+
u64 v1 = 0;
809
809
810
810
result = read_node(PS3_LPAR_ID_CURRENT,
811
811
make_first_field("bi", 0),
···
827
827
enum ps3_spu_resource_type *resource_type, unsigned int *resource_id)
828
828
{
829
829
int result;
830
-
u64 v1;
831
-
u64 v2;
830
+
u64 v1 = 0;
831
+
u64 v2 = 0;
832
832
833
833
result = read_node(PS3_LPAR_ID_CURRENT,
834
834
make_first_field("bi", 0),
···
854
854
int ps3_repository_read_boot_dat_size(unsigned int *size)
855
855
{
856
856
int result;
857
-
u64 v1;
857
+
u64 v1 = 0;
858
858
859
859
result = read_node(PS3_LPAR_ID_CURRENT,
860
860
make_first_field("bi", 0),
···
869
869
int ps3_repository_read_vuart_av_port(unsigned int *port)
870
870
{
871
871
int result;
872
-
u64 v1;
872
+
u64 v1 = 0;
873
873
874
874
result = read_node(PS3_LPAR_ID_CURRENT,
875
875
make_first_field("bi", 0),
···
884
884
int ps3_repository_read_vuart_sysmgr_port(unsigned int *port)
885
885
{
886
886
int result;
887
-
u64 v1;
887
+
u64 v1 = 0;
888
888
889
889
result = read_node(PS3_LPAR_ID_CURRENT,
890
890
make_first_field("bi", 0),
···
919
919
int ps3_repository_read_num_be(unsigned int *num_be)
920
920
{
921
921
int result;
922
-
u64 v1;
922
+
u64 v1 = 0;
923
923
924
924
result = read_node(PS3_LPAR_ID_PME,
925
925
make_first_field("ben", 0),
-2
arch/powerpc/sysdev/mpic.c
-2
arch/powerpc/sysdev/mpic.c
···
800
800
* IPIs are marked IRQ_PER_CPU. This has the side effect of
801
801
* preventing the IRQ_PENDING/IRQ_INPROGRESS logic from
802
802
* applying to them. We EOI them late to avoid re-entering.
803
-
* We mark IPI's with IRQF_DISABLED as they must run with
804
-
* irqs disabled.
805
803
*/
806
804
mpic_eoi(mpic);
807
805
}
+1
-1
arch/powerpc/sysdev/ppc4xx_soc.c
+1
-1
arch/powerpc/sysdev/ppc4xx_soc.c
···
115
115
}
116
116
117
117
/* Install error handler */
118
-
if (request_irq(irq, l2c_error_handler, IRQF_DISABLED, "L2C", 0) < 0) {
118
+
if (request_irq(irq, l2c_error_handler, 0, "L2C", 0) < 0) {
119
119
printk(KERN_ERR "Cannot install L2C error handler"
120
120
", cache is not enabled\n");
121
121
of_node_put(np);
+2
-3
arch/powerpc/sysdev/xics/xics-common.c
+2
-3
arch/powerpc/sysdev/xics/xics-common.c
···
134
134
BUG_ON(ipi == NO_IRQ);
135
135
136
136
/*
137
-
* IPIs are marked IRQF_DISABLED as they must run with irqs
138
-
* disabled, and PERCPU. The handler was set in map.
137
+
* IPIs are marked IRQF_PERCPU. The handler was set in map.
139
138
*/
140
139
BUG_ON(request_irq(ipi, icp_ops->ipi_action,
141
-
IRQF_DISABLED|IRQF_PERCPU, "IPI", NULL));
140
+
IRQF_PERCPU, "IPI", NULL));
142
141
}
143
142
144
143
int __init xics_smp_probe(void)
+1
-1
drivers/ps3/ps3-vuart.c
+1
-1
drivers/ps3/ps3-vuart.c
+1
-1
drivers/ps3/ps3stor_lib.c
+1
-1
drivers/ps3/ps3stor_lib.c