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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
iio: adc: ad7944: Add support for "3-wire mode"
This adds support for AD7944 ADCs wired in "3-wire mode". (NOTE: 3-wire
is the datasheet name for this wiring configuration and has nothing to
do with SPI_3WIRE.)
In the 3-wire mode, the SPI controller CS line can be wired to the CNV
line on the ADC and used to trigger conversions rather that using a
separate GPIO line.
The turbo/chain mode compatibility check at the end of the probe
function is technically can't be triggered right now but adding it now
anyway so that we don't forget to add it later when support for
daisy-chaining is added.
Reviewed-by: Nuno Sa <nuno.sa@analog.com>
Signed-off-by: David Lechner <dlechner@baylibre.com>
Link: https://lore.kernel.org/r/20240314-mainline-ad7944-3-wire-mode-v2-1-d469da0705d2@baylibre.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
authored by
David Lechner
and committed by
Jonathan Cameron
346ae0e8
fcdb03e4
+139
-18
+139
-18
drivers/iio/adc/ad7944.c
+139
-18
drivers/iio/adc/ad7944.c
···
32
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unsigned int turbo_conv_ns;
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};
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+
enum ad7944_spi_mode {
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+
/* datasheet calls this "4-wire mode" */
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AD7944_SPI_MODE_DEFAULT,
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+
/* datasheet calls this "3-wire mode" (not related to SPI_3WIRE!) */
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AD7944_SPI_MODE_SINGLE,
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/* datasheet calls this "chain mode" */
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AD7944_SPI_MODE_CHAIN,
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};
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+
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/* maps adi,spi-mode property value to enum */
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static const char * const ad7944_spi_modes[] = {
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[AD7944_SPI_MODE_DEFAULT] = "",
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[AD7944_SPI_MODE_SINGLE] = "single",
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[AD7944_SPI_MODE_CHAIN] = "chain",
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};
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+
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struct ad7944_adc {
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struct spi_device *spi;
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enum ad7944_spi_mode spi_mode;
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/* Chip-specific timing specifications. */
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const struct ad7944_timing_spec *timing_spec;
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/* GPIO connected to CNV pin. */
···
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u64 timestamp __aligned(8);
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} sample __aligned(IIO_DMA_MINALIGN);
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};
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+
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/* quite time before CNV rising edge */
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#define T_QUIET_NS 20
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static const struct ad7944_timing_spec ad7944_timing_spec = {
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.conv_ns = 420,
···
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AD7944_DEFINE_CHIP_INFO(ad7985, ad7944, 16, 0);
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/* fully differential */
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AD7944_DEFINE_CHIP_INFO(ad7986, ad7986, 18, 1);
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+
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/*
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* ad7944_3wire_cs_mode_conversion - Perform a 3-wire CS mode conversion and
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* acquisition
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* @adc: The ADC device structure
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* @chan: The channel specification
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* Return: 0 on success, a negative error code on failure
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*
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* This performs a conversion and reads data when the chip is wired in 3-wire
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* mode with the CNV line on the ADC tied to the CS line on the SPI controller.
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*
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* Upon successful return adc->sample.raw will contain the conversion result.
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*/
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static int ad7944_3wire_cs_mode_conversion(struct ad7944_adc *adc,
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const struct iio_chan_spec *chan)
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+
{
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unsigned int t_conv_ns = adc->always_turbo ? adc->timing_spec->turbo_conv_ns
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+
: adc->timing_spec->conv_ns;
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+
struct spi_transfer xfers[] = {
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{
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/*
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* NB: can get better performance from some SPI
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* controllers if we use the same bits_per_word
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* in every transfer.
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*/
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.bits_per_word = chan->scan_type.realbits,
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/*
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* CS is tied to CNV and we need a low to high
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* transition to start the conversion, so place CNV
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* low for t_QUIET to prepare for this.
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*/
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.delay = {
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.value = T_QUIET_NS,
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.unit = SPI_DELAY_UNIT_NSECS,
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},
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+
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},
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{
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.bits_per_word = chan->scan_type.realbits,
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/*
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* CS has to be high for full conversion time to avoid
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* triggering the busy indication.
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*/
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.cs_off = 1,
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.delay = {
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.value = t_conv_ns,
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.unit = SPI_DELAY_UNIT_NSECS,
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},
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},
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{
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/* Then we can read the data during the acquisition phase */
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.rx_buf = &adc->sample.raw,
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.len = BITS_TO_BYTES(chan->scan_type.storagebits),
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.bits_per_word = chan->scan_type.realbits,
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},
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};
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+
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return spi_sync_transfer(adc->spi, xfers, ARRAY_SIZE(xfers));
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+
}
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/*
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* ad7944_4wire_mode_conversion - Perform a 4-wire mode conversion and acquisition
···
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{
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int ret;
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-
ret = ad7944_4wire_mode_conversion(adc, chan);
250
-
if (ret)
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-
return ret;
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+
switch (adc->spi_mode) {
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+
case AD7944_SPI_MODE_DEFAULT:
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ret = ad7944_4wire_mode_conversion(adc, chan);
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if (ret)
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return ret;
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+
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break;
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case AD7944_SPI_MODE_SINGLE:
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ret = ad7944_3wire_cs_mode_conversion(adc, chan);
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if (ret)
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return ret;
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+
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break;
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+
default:
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return -EOPNOTSUPP;
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+
}
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if (chan->scan_type.storagebits > 16)
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*val = adc->sample.raw.u32;
···
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struct ad7944_adc *adc = iio_priv(indio_dev);
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int ret;
324
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-
ret = ad7944_4wire_mode_conversion(adc, &indio_dev->channels[0]);
326
-
if (ret)
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+
switch (adc->spi_mode) {
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case AD7944_SPI_MODE_DEFAULT:
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ret = ad7944_4wire_mode_conversion(adc, &indio_dev->channels[0]);
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if (ret)
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goto out;
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+
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break;
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case AD7944_SPI_MODE_SINGLE:
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ret = ad7944_3wire_cs_mode_conversion(adc, &indio_dev->channels[0]);
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if (ret)
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+
goto out;
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+
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break;
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+
default:
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+
/* not supported */
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goto out;
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+
}
328
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iio_push_to_buffers_with_timestamp(indio_dev, &adc->sample.raw,
330
252
pf->timestamp);
···
366
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struct ad7944_adc *adc;
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bool have_refin = false;
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struct regulator *ref;
263
+
const char *str_val;
369
264
int ret;
370
-
371
-
/*
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* driver currently only supports the conventional "4-wire" mode and
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-
* not other special wiring configurations.
374
-
*/
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-
if (device_property_present(dev, "adi,spi-mode"))
376
-
return dev_err_probe(dev, -EINVAL,
377
-
"adi,spi-mode is not currently supported\n");
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indio_dev = devm_iio_device_alloc(dev, sizeof(*adc));
380
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if (!indio_dev)
···
381
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return dev_err_probe(dev, -EINVAL, "no chip info\n");
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adc->timing_spec = chip_info->timing_spec;
285
+
286
+
if (device_property_read_string(dev, "adi,spi-mode", &str_val) == 0) {
287
+
ret = sysfs_match_string(ad7944_spi_modes, str_val);
288
+
if (ret < 0)
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return dev_err_probe(dev, -EINVAL,
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"unsupported adi,spi-mode\n");
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+
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+
adc->spi_mode = ret;
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+
} else {
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/* absence of adi,spi-mode property means default mode */
295
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adc->spi_mode = AD7944_SPI_MODE_DEFAULT;
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+
}
297
+
298
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if (adc->spi_mode == AD7944_SPI_MODE_CHAIN)
299
+
return dev_err_probe(dev, -EINVAL,
300
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"chain mode is not implemented\n");
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/*
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* Some chips use unusual word sizes, so check now instead of waiting
···
464
349
adc->ref_mv = AD7944_INTERNAL_REF_MV;
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}
466
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467
-
/*
468
-
* CNV gpio is required in 4-wire mode which is the only currently
469
-
* supported mode.
470
-
*/
471
-
adc->cnv = devm_gpiod_get(dev, "cnv", GPIOD_OUT_LOW);
352
+
adc->cnv = devm_gpiod_get_optional(dev, "cnv", GPIOD_OUT_LOW);
472
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if (IS_ERR(adc->cnv))
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return dev_err_probe(dev, PTR_ERR(adc->cnv),
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"failed to get CNV GPIO\n");
356
+
357
+
if (!adc->cnv && adc->spi_mode == AD7944_SPI_MODE_DEFAULT)
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+
return dev_err_probe(&spi->dev, -EINVAL, "CNV GPIO is required\n");
359
+
if (adc->cnv && adc->spi_mode != AD7944_SPI_MODE_DEFAULT)
360
+
return dev_err_probe(&spi->dev, -EINVAL,
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+
"CNV GPIO in single and chain mode is not currently supported\n");
475
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476
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adc->turbo = devm_gpiod_get_optional(dev, "turbo", GPIOD_OUT_LOW);
477
364
if (IS_ERR(adc->turbo))
···
485
368
if (adc->turbo && adc->always_turbo)
486
369
return dev_err_probe(dev, -EINVAL,
487
370
"cannot have both turbo-gpios and adi,always-turbo\n");
371
+
372
+
if (adc->spi_mode == AD7944_SPI_MODE_CHAIN && adc->always_turbo)
373
+
return dev_err_probe(dev, -EINVAL,
374
+
"cannot have both chain mode and always turbo\n");
488
375
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indio_dev->name = chip_info->name;
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indio_dev->modes = INDIO_DIRECT_MODE;