···10501050 return -ENODEV;10511051 }1052105210531053- if (ADI_AXI_PCORE_VER_MINOR(version) >= 1) {10531053+ if (adi_axi_pcore_ver_gteq(version, 1, 1)) {10541054 unsigned int sizes = readl(spi_engine->base +10551055 SPI_ENGINE_REG_OFFLOAD_MEM_ADDR_WIDTH);10561056···10641064 }1065106510661066 /* IP v1.5 dropped the requirement for SYNC in offload messages. */10671067- spi_engine->offload_requires_sync = ADI_AXI_PCORE_VER_MINOR(version) < 5;10671067+ spi_engine->offload_requires_sync = !adi_axi_pcore_ver_gteq(version, 1, 5);1068106810691069 writel_relaxed(0x00, spi_engine->base + SPI_ENGINE_REG_RESET);10701070 writel_relaxed(0xff, spi_engine->base + SPI_ENGINE_REG_INT_PENDING);···10911091 host->put_offload = spi_engine_put_offload;10921092 host->num_chipselect = 8;1093109310941094- /* Some features depend of the IP core version. */10951095- if (ADI_AXI_PCORE_VER_MAJOR(version) >= 1) {10961096- if (ADI_AXI_PCORE_VER_MINOR(version) >= 2) {10971097- host->mode_bits |= SPI_CS_HIGH;10981098- host->setup = spi_engine_setup;10991099- }11001100- if (ADI_AXI_PCORE_VER_MINOR(version) >= 3)11011101- host->mode_bits |= SPI_MOSI_IDLE_LOW | SPI_MOSI_IDLE_HIGH;10941094+ if (adi_axi_pcore_ver_gteq(version, 1, 2)) {10951095+ host->mode_bits |= SPI_CS_HIGH;10961096+ host->setup = spi_engine_setup;11021097 }10981098+ if (adi_axi_pcore_ver_gteq(version, 1, 3))10991099+ host->mode_bits |= SPI_MOSI_IDLE_LOW | SPI_MOSI_IDLE_HIGH;1103110011041101 if (host->max_speed_hz == 0)11051102 return dev_err_probe(&pdev->dev, -EINVAL, "spi_clk rate is 0");
+21
include/linux/adi-axi-common.h
···88 * https://wiki.analog.com/resources/fpga/docs/hdl/regmap99 */10101111+#include <linux/types.h>1212+1113#ifndef ADI_AXI_COMMON_H_1214#define ADI_AXI_COMMON_H_1315···2220#define ADI_AXI_PCORE_VER_MAJOR(version) (((version) >> 16) & 0xff)2321#define ADI_AXI_PCORE_VER_MINOR(version) (((version) >> 8) & 0xff)2422#define ADI_AXI_PCORE_VER_PATCH(version) ((version) & 0xff)2323+2424+/**2525+ * adi_axi_pcore_ver_gteq() - check if a version is satisfied2626+ * @version: the full version read from the hardware2727+ * @major: the major version to compare against2828+ * @minor: the minor version to compare against2929+ *3030+ * ADI AXI IP Cores use semantic versioning, so this can be used to check for3131+ * feature availability.3232+ *3333+ * Return: true if the version is greater than or equal to the specified3434+ * major and minor version, false otherwise.3535+ */3636+static inline bool adi_axi_pcore_ver_gteq(u32 version, u32 major, u32 minor)3737+{3838+ return ADI_AXI_PCORE_VER_MAJOR(version) > (major) ||3939+ (ADI_AXI_PCORE_VER_MAJOR(version) == (major) &&4040+ ADI_AXI_PCORE_VER_MINOR(version) >= (minor));4141+}25422643#define ADI_AXI_INFO_FPGA_TECH(info) (((info) >> 24) & 0xff)2744#define ADI_AXI_INFO_FPGA_FAMILY(info) (((info) >> 16) & 0xff)