Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'agp-patches' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/agp-2.6
* 'agp-patches' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/agp-2.6:
agp/intel: cleanup some serious whitespace badness
[AGP] intel_agp: Add support for Intel 4 series chipsets
[AGP] intel_agp: extra stolen mem size available for IGD_GM chipset
agp: more boolean conversions.
drivers/char/agp - use bool
agp: two-stage page destruction issue
agp/via: fixup pci ids
+235
-168
+3
-3
drivers/char/agp/agp.h
+3
-3
drivers/char/agp/agp.h
···
99
99
const void *aperture_sizes;
100
100
int num_aperture_sizes;
101
101
enum aper_size_type size_type;
102
-
int cant_use_aperture;
103
-
int needs_scratch_page;
102
+
bool cant_use_aperture;
103
+
bool needs_scratch_page;
104
104
const struct gatt_mask *masks;
105
105
int (*fetch_size)(void);
106
106
int (*configure)(void);
···
278
278
void agp_free_key(int key);
279
279
int agp_num_entries(void);
280
280
u32 agp_collect_device_status(struct agp_bridge_data *bridge, u32 mode, u32 command);
281
-
void agp_device_command(u32 command, int agp_v3);
281
+
void agp_device_command(u32 command, bool agp_v3);
282
282
int agp_3_5_enable(struct agp_bridge_data *bridge);
283
283
void global_cache_flush(void);
284
284
void get_agp_version(struct agp_bridge_data *bridge);
+2
-2
drivers/char/agp/alpha-agp.c
+2
-2
drivers/char/agp/alpha-agp.c
···
80
80
agp->mode.bits.enable = 1;
81
81
agp->ops->configure(agp);
82
82
83
-
agp_device_command(agp->mode.lw, 0);
83
+
agp_device_command(agp->mode.lw, false);
84
84
}
85
85
86
86
static int alpha_core_agp_insert_memory(struct agp_memory *mem, off_t pg_start,
···
126
126
.aperture_sizes = alpha_core_agp_sizes,
127
127
.num_aperture_sizes = 1,
128
128
.size_type = FIXED_APER_SIZE,
129
-
.cant_use_aperture = 1,
129
+
.cant_use_aperture = true,
130
130
.masks = NULL,
131
131
132
132
.fetch_size = alpha_core_agp_fetch_size,
+2
-2
drivers/char/agp/amd-k7-agp.c
+2
-2
drivers/char/agp/amd-k7-agp.c
+2
-2
drivers/char/agp/amd64-agp.c
+2
-2
drivers/char/agp/amd64-agp.c
+2
-2
drivers/char/agp/ati-agp.c
+2
-2
drivers/char/agp/ati-agp.c
···
287
287
j++;
288
288
}
289
289
290
-
if (mem->is_flushed == FALSE) {
290
+
if (!mem->is_flushed) {
291
291
/*CACHE_FLUSH(); */
292
292
global_cache_flush();
293
-
mem->is_flushed = TRUE;
293
+
mem->is_flushed = true;
294
294
}
295
295
296
296
for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
+8
-8
drivers/char/agp/backend.c
+8
-8
drivers/char/agp/backend.c
···
188
188
189
189
err_out:
190
190
if (bridge->driver->needs_scratch_page) {
191
-
bridge->driver->agp_destroy_page(gart_to_virt(bridge->scratch_page_real),
192
-
AGP_PAGE_DESTROY_UNMAP);
193
-
bridge->driver->agp_destroy_page(gart_to_virt(bridge->scratch_page_real),
194
-
AGP_PAGE_DESTROY_FREE);
191
+
void *va = gart_to_virt(bridge->scratch_page_real);
192
+
193
+
bridge->driver->agp_destroy_page(va, AGP_PAGE_DESTROY_UNMAP);
194
+
bridge->driver->agp_destroy_page(va, AGP_PAGE_DESTROY_FREE);
195
195
}
196
196
if (got_gatt)
197
197
bridge->driver->free_gatt_table(bridge);
···
215
215
216
216
if (bridge->driver->agp_destroy_page &&
217
217
bridge->driver->needs_scratch_page) {
218
-
bridge->driver->agp_destroy_page(gart_to_virt(bridge->scratch_page_real),
219
-
AGP_PAGE_DESTROY_UNMAP);
220
-
bridge->driver->agp_destroy_page(gart_to_virt(bridge->scratch_page_real),
221
-
AGP_PAGE_DESTROY_FREE);
218
+
void *va = gart_to_virt(bridge->scratch_page_real);
219
+
220
+
bridge->driver->agp_destroy_page(va, AGP_PAGE_DESTROY_UNMAP);
221
+
bridge->driver->agp_destroy_page(va, AGP_PAGE_DESTROY_FREE);
222
222
}
223
223
}
224
224
+1
-1
drivers/char/agp/compat_ioctl.c
+1
-1
drivers/char/agp/compat_ioctl.c
+3
-3
drivers/char/agp/efficeon-agp.c
+3
-3
drivers/char/agp/efficeon-agp.c
···
249
249
if (type != 0 || mem->type != 0)
250
250
return -EINVAL;
251
251
252
-
if (mem->is_flushed == FALSE) {
252
+
if (!mem->is_flushed) {
253
253
global_cache_flush();
254
-
mem->is_flushed = TRUE;
254
+
mem->is_flushed = true;
255
255
}
256
256
257
257
last_page = NULL;
···
329
329
.free_gatt_table = efficeon_free_gatt_table,
330
330
.insert_memory = efficeon_insert_memory,
331
331
.remove_memory = efficeon_remove_memory,
332
-
.cant_use_aperture = 0, // 1 might be faster?
332
+
.cant_use_aperture = false, // true might be faster?
333
333
334
334
// Generic
335
335
.alloc_by_type = agp_generic_alloc_by_type,
+6
-6
drivers/char/agp/frontend.c
+6
-6
drivers/char/agp/frontend.c
···
395
395
396
396
if (agp_fe.current_controller == controller) {
397
397
agp_fe.current_controller = NULL;
398
-
agp_fe.backend_acquired = FALSE;
398
+
agp_fe.backend_acquired = false;
399
399
agp_backend_release(agp_bridge);
400
400
}
401
401
kfree(controller);
···
443
443
}
444
444
445
445
agp_fe.current_controller = NULL;
446
-
agp_fe.used_by_controller = FALSE;
446
+
agp_fe.used_by_controller = false;
447
447
agp_backend_release(agp_bridge);
448
448
}
449
449
···
573
573
574
574
mutex_lock(&(agp_fe.agp_mutex));
575
575
576
-
if (agp_fe.backend_acquired != TRUE)
576
+
if (agp_fe.backend_acquired != true)
577
577
goto out_eperm;
578
578
579
579
if (!(test_bit(AGP_FF_IS_VALID, &priv->access_flags)))
···
768
768
769
769
atomic_inc(&agp_bridge->agp_in_use);
770
770
771
-
agp_fe.backend_acquired = TRUE;
771
+
agp_fe.backend_acquired = true;
772
772
773
773
controller = agp_find_controller_by_pid(priv->my_pid);
774
774
···
778
778
controller = agp_create_controller(priv->my_pid);
779
779
780
780
if (controller == NULL) {
781
-
agp_fe.backend_acquired = FALSE;
781
+
agp_fe.backend_acquired = false;
782
782
agp_backend_release(agp_bridge);
783
783
return -ENOMEM;
784
784
}
···
981
981
ret_val = -EINVAL;
982
982
goto ioctl_out;
983
983
}
984
-
if ((agp_fe.backend_acquired != TRUE) &&
984
+
if ((agp_fe.backend_acquired != true) &&
985
985
(cmd != AGPIOC_ACQUIRE)) {
986
986
ret_val = -EBUSY;
987
987
goto ioctl_out;
+19
-16
drivers/char/agp/generic.c
+19
-16
drivers/char/agp/generic.c
···
96
96
void agp_alloc_page_array(size_t size, struct agp_memory *mem)
97
97
{
98
98
mem->memory = NULL;
99
-
mem->vmalloc_flag = 0;
99
+
mem->vmalloc_flag = false;
100
100
101
101
if (size <= 2*PAGE_SIZE)
102
102
mem->memory = kmalloc(size, GFP_KERNEL | __GFP_NORETRY);
103
103
if (mem->memory == NULL) {
104
104
mem->memory = vmalloc(size);
105
-
mem->vmalloc_flag = 1;
105
+
mem->vmalloc_flag = true;
106
106
}
107
107
}
108
108
EXPORT_SYMBOL(agp_alloc_page_array);
···
188
188
if (curr == NULL)
189
189
return;
190
190
191
-
if (curr->is_bound == TRUE)
191
+
if (curr->is_bound)
192
192
agp_unbind_memory(curr);
193
193
194
194
if (curr->type >= AGP_USER_TYPES) {
···
202
202
}
203
203
if (curr->page_count != 0) {
204
204
for (i = 0; i < curr->page_count; i++) {
205
-
curr->bridge->driver->agp_destroy_page(gart_to_virt(curr->memory[i]), AGP_PAGE_DESTROY_UNMAP);
205
+
curr->memory[i] = (unsigned long)gart_to_virt(curr->memory[i]);
206
+
curr->bridge->driver->agp_destroy_page((void *)curr->memory[i],
207
+
AGP_PAGE_DESTROY_UNMAP);
206
208
}
207
209
for (i = 0; i < curr->page_count; i++) {
208
-
curr->bridge->driver->agp_destroy_page(gart_to_virt(curr->memory[i]), AGP_PAGE_DESTROY_FREE);
210
+
curr->bridge->driver->agp_destroy_page((void *)curr->memory[i],
211
+
AGP_PAGE_DESTROY_FREE);
209
212
}
210
213
}
211
214
agp_free_key(curr->key);
···
414
411
if (curr == NULL)
415
412
return -EINVAL;
416
413
417
-
if (curr->is_bound == TRUE) {
414
+
if (curr->is_bound) {
418
415
printk(KERN_INFO PFX "memory %p is already bound!\n", curr);
419
416
return -EINVAL;
420
417
}
421
-
if (curr->is_flushed == FALSE) {
418
+
if (!curr->is_flushed) {
422
419
curr->bridge->driver->cache_flush();
423
-
curr->is_flushed = TRUE;
420
+
curr->is_flushed = true;
424
421
}
425
422
ret_val = curr->bridge->driver->insert_memory(curr, pg_start, curr->type);
426
423
427
424
if (ret_val != 0)
428
425
return ret_val;
429
426
430
-
curr->is_bound = TRUE;
427
+
curr->is_bound = true;
431
428
curr->pg_start = pg_start;
432
429
return 0;
433
430
}
···
449
446
if (curr == NULL)
450
447
return -EINVAL;
451
448
452
-
if (curr->is_bound != TRUE) {
449
+
if (!curr->is_bound) {
453
450
printk(KERN_INFO PFX "memory %p was not bound!\n", curr);
454
451
return -EINVAL;
455
452
}
···
459
456
if (ret_val != 0)
460
457
return ret_val;
461
458
462
-
curr->is_bound = FALSE;
459
+
curr->is_bound = false;
463
460
curr->pg_start = 0;
464
461
return 0;
465
462
}
···
757
754
EXPORT_SYMBOL(agp_collect_device_status);
758
755
759
756
760
-
void agp_device_command(u32 bridge_agpstat, int agp_v3)
757
+
void agp_device_command(u32 bridge_agpstat, bool agp_v3)
761
758
{
762
759
struct pci_dev *device = NULL;
763
760
int mode;
···
821
818
/* If we have 3.5, we can do the isoch stuff. */
822
819
if (bridge->minor_version >= 5)
823
820
agp_3_5_enable(bridge);
824
-
agp_device_command(bridge_agpstat, TRUE);
821
+
agp_device_command(bridge_agpstat, true);
825
822
return;
826
823
} else {
827
824
/* Disable calibration cycle in RX91<1> when not in AGP3.0 mode of operation.*/
···
838
835
}
839
836
840
837
/* AGP v<3 */
841
-
agp_device_command(bridge_agpstat, FALSE);
838
+
agp_device_command(bridge_agpstat, false);
842
839
}
843
840
EXPORT_SYMBOL(agp_generic_enable);
844
841
···
1086
1083
j++;
1087
1084
}
1088
1085
1089
-
if (mem->is_flushed == FALSE) {
1086
+
if (!mem->is_flushed) {
1090
1087
bridge->driver->cache_flush();
1091
-
mem->is_flushed = TRUE;
1088
+
mem->is_flushed = true;
1092
1089
}
1093
1090
1094
1091
for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
+3
-3
drivers/char/agp/hp-agp.c
+3
-3
drivers/char/agp/hp-agp.c
···
353
353
j++;
354
354
}
355
355
356
-
if (mem->is_flushed == FALSE) {
356
+
if (!mem->is_flushed) {
357
357
global_cache_flush();
358
-
mem->is_flushed = TRUE;
358
+
mem->is_flushed = true;
359
359
}
360
360
361
361
for (i = 0, j = io_pg_start; i < mem->page_count; i++) {
···
437
437
.agp_alloc_page = agp_generic_alloc_page,
438
438
.agp_destroy_page = agp_generic_destroy_page,
439
439
.agp_type_to_mask_type = agp_generic_type_to_mask_type,
440
-
.cant_use_aperture = 1,
440
+
.cant_use_aperture = true,
441
441
};
442
442
443
443
static int __init
+1
-1
drivers/char/agp/i460-agp.c
+1
-1
drivers/char/agp/i460-agp.c
···
580
580
.alloc_by_type = agp_generic_alloc_by_type,
581
581
.free_by_type = agp_generic_free_by_type,
582
582
.agp_type_to_mask_type = agp_generic_type_to_mask_type,
583
-
.cant_use_aperture = 1,
583
+
.cant_use_aperture = true,
584
584
};
585
585
586
586
static int __devinit agp_intel_i460_probe(struct pci_dev *pdev,
+149
-86
drivers/char/agp/intel-agp.c
+149
-86
drivers/char/agp/intel-agp.c
···
34
34
#define PCI_DEVICE_ID_INTEL_Q33_IG 0x29D2
35
35
#define PCI_DEVICE_ID_INTEL_IGD_HB 0x2A40
36
36
#define PCI_DEVICE_ID_INTEL_IGD_IG 0x2A42
37
+
#define PCI_DEVICE_ID_INTEL_IGD_E_HB 0x2E00
38
+
#define PCI_DEVICE_ID_INTEL_IGD_E_IG 0x2E02
39
+
#define PCI_DEVICE_ID_INTEL_Q45_HB 0x2E10
40
+
#define PCI_DEVICE_ID_INTEL_Q45_IG 0x2E12
41
+
#define PCI_DEVICE_ID_INTEL_G45_HB 0x2E20
42
+
#define PCI_DEVICE_ID_INTEL_G45_IG 0x2E22
37
43
38
44
/* cover 915 and 945 variants */
39
45
#define IS_I915 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_E7221_HB || \
···
60
54
#define IS_G33 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G33_HB || \
61
55
agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q35_HB || \
62
56
agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q33_HB)
57
+
58
+
#define IS_G4X (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGD_E_HB || \
59
+
agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q45_HB || \
60
+
agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G45_HB)
63
61
64
62
extern int agp_memory_reserved;
65
63
···
90
80
#define I915_PTEADDR 0x1C
91
81
#define I915_GMCH_GMS_STOLEN_48M (0x6 << 4)
92
82
#define I915_GMCH_GMS_STOLEN_64M (0x7 << 4)
93
-
#define G33_GMCH_GMS_STOLEN_128M (0x8 << 4)
94
-
#define G33_GMCH_GMS_STOLEN_256M (0x9 << 4)
83
+
#define G33_GMCH_GMS_STOLEN_128M (0x8 << 4)
84
+
#define G33_GMCH_GMS_STOLEN_256M (0x9 << 4)
85
+
#define INTEL_GMCH_GMS_STOLEN_96M (0xa << 4)
86
+
#define INTEL_GMCH_GMS_STOLEN_160M (0xb << 4)
87
+
#define INTEL_GMCH_GMS_STOLEN_224M (0xc << 4)
88
+
#define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4)
89
+
95
90
#define I915_IFPADDR 0x60
96
91
97
92
/* Intel 965G registers */
···
340
325
out:
341
326
ret = 0;
342
327
out_err:
343
-
mem->is_flushed = 1;
328
+
mem->is_flushed = true;
344
329
return ret;
345
330
}
346
331
···
433
418
if (curr->page_count == 4)
434
419
i8xx_destroy_pages(gart_to_virt(curr->memory[0]));
435
420
else {
436
-
agp_bridge->driver->agp_destroy_page(gart_to_virt(curr->memory[0]),
421
+
void *va = gart_to_virt(curr->memory[0]);
422
+
423
+
agp_bridge->driver->agp_destroy_page(va,
437
424
AGP_PAGE_DESTROY_UNMAP);
438
-
agp_bridge->driver->agp_destroy_page(gart_to_virt(curr->memory[0]),
425
+
agp_bridge->driver->agp_destroy_page(va,
439
426
AGP_PAGE_DESTROY_FREE);
440
427
}
441
428
agp_free_page_array(curr);
···
521
504
size = 512;
522
505
}
523
506
size += 4;
507
+
} else if (IS_G4X) {
508
+
/* On 4 series hardware, GTT stolen is separate from graphics
509
+
* stolen, ignore it in stolen gtt entries counting */
510
+
size = 0;
524
511
} else {
525
512
/* On previous hardware, the GTT size was just what was
526
513
* required to map the aperture.
···
573
552
break;
574
553
case I915_GMCH_GMS_STOLEN_48M:
575
554
/* Check it's really I915G */
576
-
if (IS_I915 || IS_I965 || IS_G33)
555
+
if (IS_I915 || IS_I965 || IS_G33 || IS_G4X)
577
556
gtt_entries = MB(48) - KB(size);
578
557
else
579
558
gtt_entries = 0;
580
559
break;
581
560
case I915_GMCH_GMS_STOLEN_64M:
582
561
/* Check it's really I915G */
583
-
if (IS_I915 || IS_I965 || IS_G33)
562
+
if (IS_I915 || IS_I965 || IS_G33 || IS_G4X)
584
563
gtt_entries = MB(64) - KB(size);
585
564
else
586
565
gtt_entries = 0;
587
566
break;
588
567
case G33_GMCH_GMS_STOLEN_128M:
589
-
if (IS_G33)
568
+
if (IS_G33 || IS_I965 || IS_G4X)
590
569
gtt_entries = MB(128) - KB(size);
591
570
else
592
571
gtt_entries = 0;
593
572
break;
594
573
case G33_GMCH_GMS_STOLEN_256M:
595
-
if (IS_G33)
574
+
if (IS_G33 || IS_I965 || IS_G4X)
596
575
gtt_entries = MB(256) - KB(size);
576
+
else
577
+
gtt_entries = 0;
578
+
break;
579
+
case INTEL_GMCH_GMS_STOLEN_96M:
580
+
if (IS_I965 || IS_G4X)
581
+
gtt_entries = MB(96) - KB(size);
582
+
else
583
+
gtt_entries = 0;
584
+
break;
585
+
case INTEL_GMCH_GMS_STOLEN_160M:
586
+
if (IS_I965 || IS_G4X)
587
+
gtt_entries = MB(160) - KB(size);
588
+
else
589
+
gtt_entries = 0;
590
+
break;
591
+
case INTEL_GMCH_GMS_STOLEN_224M:
592
+
if (IS_I965 || IS_G4X)
593
+
gtt_entries = MB(224) - KB(size);
594
+
else
595
+
gtt_entries = 0;
596
+
break;
597
+
case INTEL_GMCH_GMS_STOLEN_352M:
598
+
if (IS_I965 || IS_G4X)
599
+
gtt_entries = MB(352) - KB(size);
597
600
else
598
601
gtt_entries = 0;
599
602
break;
···
838
793
out:
839
794
ret = 0;
840
795
out_err:
841
-
mem->is_flushed = 1;
796
+
mem->is_flushed = true;
842
797
return ret;
843
798
}
844
799
···
1065
1020
out:
1066
1021
ret = 0;
1067
1022
out_err:
1068
-
mem->is_flushed = 1;
1023
+
mem->is_flushed = true;
1069
1024
return ret;
1070
1025
}
1071
1026
···
1179
1134
return addr | bridge->driver->masks[type].mask;
1180
1135
}
1181
1136
1137
+
static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size)
1138
+
{
1139
+
switch (agp_bridge->dev->device) {
1140
+
case PCI_DEVICE_ID_INTEL_IGD_HB:
1141
+
case PCI_DEVICE_ID_INTEL_IGD_E_HB:
1142
+
case PCI_DEVICE_ID_INTEL_Q45_HB:
1143
+
case PCI_DEVICE_ID_INTEL_G45_HB:
1144
+
*gtt_offset = *gtt_size = MB(2);
1145
+
break;
1146
+
default:
1147
+
*gtt_offset = *gtt_size = KB(512);
1148
+
}
1149
+
}
1150
+
1182
1151
/* The intel i965 automatically initializes the agp aperture during POST.
1183
1152
* Use the memory already set aside for in the GTT.
1184
1153
*/
1185
1154
static int intel_i965_create_gatt_table(struct agp_bridge_data *bridge)
1186
1155
{
1187
-
int page_order;
1188
-
struct aper_size_info_fixed *size;
1189
-
int num_entries;
1190
-
u32 temp;
1191
-
int gtt_offset, gtt_size;
1156
+
int page_order;
1157
+
struct aper_size_info_fixed *size;
1158
+
int num_entries;
1159
+
u32 temp;
1160
+
int gtt_offset, gtt_size;
1192
1161
1193
-
size = agp_bridge->current_size;
1194
-
page_order = size->page_order;
1195
-
num_entries = size->num_entries;
1196
-
agp_bridge->gatt_table_real = NULL;
1162
+
size = agp_bridge->current_size;
1163
+
page_order = size->page_order;
1164
+
num_entries = size->num_entries;
1165
+
agp_bridge->gatt_table_real = NULL;
1197
1166
1198
-
pci_read_config_dword(intel_private.pcidev, I915_MMADDR, &temp);
1167
+
pci_read_config_dword(intel_private.pcidev, I915_MMADDR, &temp);
1199
1168
1200
-
temp &= 0xfff00000;
1169
+
temp &= 0xfff00000;
1201
1170
1202
-
if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGD_HB)
1203
-
gtt_offset = gtt_size = MB(2);
1204
-
else
1205
-
gtt_offset = gtt_size = KB(512);
1171
+
intel_i965_get_gtt_range(>t_offset, >t_size);
1206
1172
1207
-
intel_private.gtt = ioremap((temp + gtt_offset) , gtt_size);
1173
+
intel_private.gtt = ioremap((temp + gtt_offset) , gtt_size);
1208
1174
1209
-
if (!intel_private.gtt)
1210
-
return -ENOMEM;
1175
+
if (!intel_private.gtt)
1176
+
return -ENOMEM;
1211
1177
1212
-
intel_private.registers = ioremap(temp, 128 * 4096);
1213
-
if (!intel_private.registers) {
1178
+
intel_private.registers = ioremap(temp, 128 * 4096);
1179
+
if (!intel_private.registers) {
1214
1180
iounmap(intel_private.gtt);
1215
1181
return -ENOMEM;
1216
1182
}
1217
1183
1218
-
temp = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000;
1219
-
global_cache_flush(); /* FIXME: ? */
1184
+
temp = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000;
1185
+
global_cache_flush(); /* FIXME: ? */
1220
1186
1221
-
/* we have to call this as early as possible after the MMIO base address is known */
1222
-
intel_i830_init_gtt_entries();
1187
+
/* we have to call this as early as possible after the MMIO base address is known */
1188
+
intel_i830_init_gtt_entries();
1223
1189
1224
-
agp_bridge->gatt_table = NULL;
1190
+
agp_bridge->gatt_table = NULL;
1225
1191
1226
-
agp_bridge->gatt_bus_addr = temp;
1192
+
agp_bridge->gatt_bus_addr = temp;
1227
1193
1228
-
return 0;
1194
+
return 0;
1229
1195
}
1230
1196
1231
1197
···
1712
1656
.aperture_sizes = intel_i810_sizes,
1713
1657
.size_type = FIXED_APER_SIZE,
1714
1658
.num_aperture_sizes = 2,
1715
-
.needs_scratch_page = TRUE,
1659
+
.needs_scratch_page = true,
1716
1660
.configure = intel_i810_configure,
1717
1661
.fetch_size = intel_i810_fetch_size,
1718
1662
.cleanup = intel_i810_cleanup,
···
1753
1697
.free_by_type = agp_generic_free_by_type,
1754
1698
.agp_alloc_page = agp_generic_alloc_page,
1755
1699
.agp_destroy_page = agp_generic_destroy_page,
1756
-
.agp_type_to_mask_type = agp_generic_type_to_mask_type,
1700
+
.agp_type_to_mask_type = agp_generic_type_to_mask_type,
1757
1701
};
1758
1702
1759
1703
static const struct agp_bridge_driver intel_830_driver = {
···
1761
1705
.aperture_sizes = intel_i830_sizes,
1762
1706
.size_type = FIXED_APER_SIZE,
1763
1707
.num_aperture_sizes = 4,
1764
-
.needs_scratch_page = TRUE,
1708
+
.needs_scratch_page = true,
1765
1709
.configure = intel_i830_configure,
1766
1710
.fetch_size = intel_i830_fetch_size,
1767
1711
.cleanup = intel_i830_cleanup,
···
1932
1876
.aperture_sizes = intel_i830_sizes,
1933
1877
.size_type = FIXED_APER_SIZE,
1934
1878
.num_aperture_sizes = 4,
1935
-
.needs_scratch_page = TRUE,
1879
+
.needs_scratch_page = true,
1936
1880
.configure = intel_i915_configure,
1937
1881
.fetch_size = intel_i9xx_fetch_size,
1938
1882
.cleanup = intel_i915_cleanup,
···
1954
1898
};
1955
1899
1956
1900
static const struct agp_bridge_driver intel_i965_driver = {
1957
-
.owner = THIS_MODULE,
1958
-
.aperture_sizes = intel_i830_sizes,
1959
-
.size_type = FIXED_APER_SIZE,
1960
-
.num_aperture_sizes = 4,
1961
-
.needs_scratch_page = TRUE,
1962
-
.configure = intel_i915_configure,
1963
-
.fetch_size = intel_i9xx_fetch_size,
1964
-
.cleanup = intel_i915_cleanup,
1965
-
.tlb_flush = intel_i810_tlbflush,
1966
-
.mask_memory = intel_i965_mask_memory,
1967
-
.masks = intel_i810_masks,
1968
-
.agp_enable = intel_i810_agp_enable,
1969
-
.cache_flush = global_cache_flush,
1970
-
.create_gatt_table = intel_i965_create_gatt_table,
1971
-
.free_gatt_table = intel_i830_free_gatt_table,
1972
-
.insert_memory = intel_i915_insert_entries,
1973
-
.remove_memory = intel_i915_remove_entries,
1974
-
.alloc_by_type = intel_i830_alloc_by_type,
1975
-
.free_by_type = intel_i810_free_by_type,
1976
-
.agp_alloc_page = agp_generic_alloc_page,
1977
-
.agp_destroy_page = agp_generic_destroy_page,
1978
-
.agp_type_to_mask_type = intel_i830_type_to_mask_type,
1901
+
.owner = THIS_MODULE,
1902
+
.aperture_sizes = intel_i830_sizes,
1903
+
.size_type = FIXED_APER_SIZE,
1904
+
.num_aperture_sizes = 4,
1905
+
.needs_scratch_page = true,
1906
+
.cleanup = intel_i915_cleanup,
1907
+
.tlb_flush = intel_i810_tlbflush,
1908
+
.mask_memory = intel_i965_mask_memory,
1909
+
.masks = intel_i810_masks,
1910
+
.agp_enable = intel_i810_agp_enable,
1911
+
.cache_flush = global_cache_flush,
1912
+
.create_gatt_table = intel_i965_create_gatt_table,
1913
+
.free_gatt_table = intel_i830_free_gatt_table,
1914
+
.insert_memory = intel_i915_insert_entries,
1915
+
.remove_memory = intel_i915_remove_entries,
1916
+
.alloc_by_type = intel_i830_alloc_by_type,
1917
+
.free_by_type = intel_i810_free_by_type,
1918
+
.agp_alloc_page = agp_generic_alloc_page,
1919
+
.agp_destroy_page = agp_generic_destroy_page,
1920
+
.agp_type_to_mask_type = intel_i830_type_to_mask_type,
1979
1921
.chipset_flush = intel_i915_chipset_flush,
1980
1922
};
1981
1923
···
2002
1948
};
2003
1949
2004
1950
static const struct agp_bridge_driver intel_g33_driver = {
2005
-
.owner = THIS_MODULE,
2006
-
.aperture_sizes = intel_i830_sizes,
2007
-
.size_type = FIXED_APER_SIZE,
2008
-
.num_aperture_sizes = 4,
2009
-
.needs_scratch_page = TRUE,
2010
-
.configure = intel_i915_configure,
2011
-
.fetch_size = intel_i9xx_fetch_size,
2012
-
.cleanup = intel_i915_cleanup,
2013
-
.tlb_flush = intel_i810_tlbflush,
2014
-
.mask_memory = intel_i965_mask_memory,
2015
-
.masks = intel_i810_masks,
2016
-
.agp_enable = intel_i810_agp_enable,
2017
-
.cache_flush = global_cache_flush,
2018
-
.create_gatt_table = intel_i915_create_gatt_table,
2019
-
.free_gatt_table = intel_i830_free_gatt_table,
2020
-
.insert_memory = intel_i915_insert_entries,
2021
-
.remove_memory = intel_i915_remove_entries,
2022
-
.alloc_by_type = intel_i830_alloc_by_type,
2023
-
.free_by_type = intel_i810_free_by_type,
2024
-
.agp_alloc_page = agp_generic_alloc_page,
2025
-
.agp_destroy_page = agp_generic_destroy_page,
2026
-
.agp_type_to_mask_type = intel_i830_type_to_mask_type,
1951
+
.owner = THIS_MODULE,
1952
+
.aperture_sizes = intel_i830_sizes,
1953
+
.size_type = FIXED_APER_SIZE,
1954
+
.num_aperture_sizes = 4,
1955
+
.needs_scratch_page = true,
1956
+
.configure = intel_i915_configure,
1957
+
.fetch_size = intel_i9xx_fetch_size,
1958
+
.cleanup = intel_i915_cleanup,
1959
+
.tlb_flush = intel_i810_tlbflush,
1960
+
.mask_memory = intel_i965_mask_memory,
1961
+
.masks = intel_i810_masks,
1962
+
.agp_enable = intel_i810_agp_enable,
1963
+
.cache_flush = global_cache_flush,
1964
+
.create_gatt_table = intel_i915_create_gatt_table,
1965
+
.free_gatt_table = intel_i830_free_gatt_table,
1966
+
.insert_memory = intel_i915_insert_entries,
1967
+
.remove_memory = intel_i915_remove_entries,
1968
+
.alloc_by_type = intel_i830_alloc_by_type,
1969
+
.free_by_type = intel_i810_free_by_type,
1970
+
.agp_alloc_page = agp_generic_alloc_page,
1971
+
.agp_destroy_page = agp_generic_destroy_page,
1972
+
.agp_type_to_mask_type = intel_i830_type_to_mask_type,
2027
1973
.chipset_flush = intel_i915_chipset_flush,
2028
1974
};
2029
1975
···
2117
2063
NULL, &intel_g33_driver },
2118
2064
{ PCI_DEVICE_ID_INTEL_IGD_HB, PCI_DEVICE_ID_INTEL_IGD_IG, 0,
2119
2065
"Intel Integrated Graphics Device", NULL, &intel_i965_driver },
2066
+
{ PCI_DEVICE_ID_INTEL_IGD_E_HB, PCI_DEVICE_ID_INTEL_IGD_E_IG, 0,
2067
+
"Intel Integrated Graphics Device", NULL, &intel_i965_driver },
2068
+
{ PCI_DEVICE_ID_INTEL_Q45_HB, PCI_DEVICE_ID_INTEL_Q45_IG, 0,
2069
+
"Q45/Q43", NULL, &intel_i965_driver },
2070
+
{ PCI_DEVICE_ID_INTEL_G45_HB, PCI_DEVICE_ID_INTEL_G45_IG, 0,
2071
+
"G45/G43", NULL, &intel_i965_driver },
2120
2072
{ 0, 0, 0, NULL, NULL, NULL }
2121
2073
};
2122
2074
···
2314
2254
ID(PCI_DEVICE_ID_INTEL_Q35_HB),
2315
2255
ID(PCI_DEVICE_ID_INTEL_Q33_HB),
2316
2256
ID(PCI_DEVICE_ID_INTEL_IGD_HB),
2257
+
ID(PCI_DEVICE_ID_INTEL_IGD_E_HB),
2258
+
ID(PCI_DEVICE_ID_INTEL_Q45_HB),
2259
+
ID(PCI_DEVICE_ID_INTEL_G45_HB),
2317
2260
{ }
2318
2261
};
2319
2262
+2
-2
drivers/char/agp/nvidia-agp.c
+2
-2
drivers/char/agp/nvidia-agp.c
···
214
214
return -EBUSY;
215
215
}
216
216
217
-
if (mem->is_flushed == FALSE) {
217
+
if (!mem->is_flushed) {
218
218
global_cache_flush();
219
-
mem->is_flushed = TRUE;
219
+
mem->is_flushed = true;
220
220
}
221
221
for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
222
222
writel(agp_bridge->driver->mask_memory(agp_bridge,
+3
-3
drivers/char/agp/parisc-agp.c
+3
-3
drivers/char/agp/parisc-agp.c
···
141
141
j++;
142
142
}
143
143
144
-
if (mem->is_flushed == FALSE) {
144
+
if (!mem->is_flushed) {
145
145
global_cache_flush();
146
-
mem->is_flushed = TRUE;
146
+
mem->is_flushed = true;
147
147
}
148
148
149
149
for (i = 0, j = io_pg_start; i < mem->page_count; i++) {
···
226
226
.agp_alloc_page = agp_generic_alloc_page,
227
227
.agp_destroy_page = agp_generic_destroy_page,
228
228
.agp_type_to_mask_type = agp_generic_type_to_mask_type,
229
-
.cant_use_aperture = 1,
229
+
.cant_use_aperture = true,
230
230
};
231
231
232
232
static int __init
+4
-4
drivers/char/agp/sgi-agp.c
+4
-4
drivers/char/agp/sgi-agp.c
···
182
182
j++;
183
183
}
184
184
185
-
if (mem->is_flushed == FALSE) {
185
+
if (!mem->is_flushed) {
186
186
bridge->driver->cache_flush();
187
-
mem->is_flushed = TRUE;
187
+
mem->is_flushed = true;
188
188
}
189
189
190
190
for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
···
264
264
.agp_alloc_page = sgi_tioca_alloc_page,
265
265
.agp_destroy_page = agp_generic_destroy_page,
266
266
.agp_type_to_mask_type = agp_generic_type_to_mask_type,
267
-
.cant_use_aperture = 1,
268
-
.needs_scratch_page = 0,
267
+
.cant_use_aperture = true,
268
+
.needs_scratch_page = false,
269
269
.num_aperture_sizes = 1,
270
270
};
271
271
+3
-3
drivers/char/agp/sworks-agp.c
+3
-3
drivers/char/agp/sworks-agp.c
···
339
339
j++;
340
340
}
341
341
342
-
if (mem->is_flushed == FALSE) {
342
+
if (!mem->is_flushed) {
343
343
global_cache_flush();
344
-
mem->is_flushed = TRUE;
344
+
mem->is_flushed = true;
345
345
}
346
346
347
347
for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
···
412
412
bridge->capndx + PCI_AGP_COMMAND,
413
413
command);
414
414
415
-
agp_device_command(command, 0);
415
+
agp_device_command(command, false);
416
416
}
417
417
418
418
static const struct agp_bridge_driver sworks_driver = {
+5
-5
drivers/char/agp/uninorth-agp.c
+5
-5
drivers/char/agp/uninorth-agp.c
···
281
281
282
282
if (uninorth_rev >= 0x30) {
283
283
/* This is an AGP V3 */
284
-
agp_device_command(command, (status & AGPSTAT_MODE_3_0));
284
+
agp_device_command(command, (status & AGPSTAT_MODE_3_0) != 0);
285
285
} else {
286
286
/* AGP V2 */
287
-
agp_device_command(command, 0);
287
+
agp_device_command(command, false);
288
288
}
289
289
290
290
uninorth_tlbflush(NULL);
···
511
511
.agp_alloc_page = agp_generic_alloc_page,
512
512
.agp_destroy_page = agp_generic_destroy_page,
513
513
.agp_type_to_mask_type = agp_generic_type_to_mask_type,
514
-
.cant_use_aperture = 1,
514
+
.cant_use_aperture = true,
515
515
};
516
516
517
517
const struct agp_bridge_driver u3_agp_driver = {
···
536
536
.agp_alloc_page = agp_generic_alloc_page,
537
537
.agp_destroy_page = agp_generic_destroy_page,
538
538
.agp_type_to_mask_type = agp_generic_type_to_mask_type,
539
-
.cant_use_aperture = 1,
540
-
.needs_scratch_page = 1,
539
+
.cant_use_aperture = true,
540
+
.needs_scratch_page = true,
541
541
};
542
542
543
543
static struct agp_device_ids uninorth_agp_device_ids[] __devinitdata = {
+11
-2
drivers/char/agp/via-agp.c
+11
-2
drivers/char/agp/via-agp.c
···
389
389
.device_id = PCI_DEVICE_ID_VIA_VT3324,
390
390
.chipset_name = "CX700",
391
391
},
392
-
/* VT3336 */
392
+
/* VT3336 - this is a chipset for AMD Athlon/K8 CPU. Due to K8's unique
393
+
* architecture, the AGP resource and behavior are different from
394
+
* the traditional AGP which resides only in chipset. AGP is used
395
+
* by 3D driver which wasn't available for the VT3336 and VT3364
396
+
* generation until now. Unfortunately, by testing, VT3364 works
397
+
* but VT3336 doesn't. - explaination from via, just leave this as
398
+
* as a placeholder to avoid future patches adding it back in.
399
+
*/
400
+
#if 0
393
401
{
394
402
.device_id = PCI_DEVICE_ID_VIA_VT3336,
395
403
.chipset_name = "VT3336",
396
404
},
405
+
#endif
397
406
/* P4M890 */
398
407
{
399
408
.device_id = PCI_DEVICE_ID_VIA_P4M890,
···
555
546
ID(PCI_DEVICE_ID_VIA_3296_0),
556
547
ID(PCI_DEVICE_ID_VIA_P4M800CE),
557
548
ID(PCI_DEVICE_ID_VIA_VT3324),
558
-
ID(PCI_DEVICE_ID_VIA_VT3336),
559
549
ID(PCI_DEVICE_ID_VIA_P4M890),
550
+
ID(PCI_DEVICE_ID_VIA_VT3364),
560
551
{ }
561
552
};
562
553
+4
-12
include/linux/agp_backend.h
+4
-12
include/linux/agp_backend.h
···
30
30
#ifndef _AGP_BACKEND_H
31
31
#define _AGP_BACKEND_H 1
32
32
33
-
#ifndef TRUE
34
-
#define TRUE 1
35
-
#endif
36
-
37
-
#ifndef FALSE
38
-
#define FALSE 0
39
-
#endif
40
-
41
33
enum chipset_type {
42
34
NOT_SUPPORTED,
43
35
SUPPORTED,
···
49
57
size_t aper_size;
50
58
int max_memory; /* In pages */
51
59
int current_memory;
52
-
int cant_use_aperture;
60
+
bool cant_use_aperture;
53
61
unsigned long page_mask;
54
62
struct vm_operations_struct *vm_ops;
55
63
};
···
75
83
off_t pg_start;
76
84
u32 type;
77
85
u32 physical;
78
-
u8 is_bound;
79
-
u8 is_flushed;
80
-
u8 vmalloc_flag;
86
+
bool is_bound;
87
+
bool is_flushed;
88
+
bool vmalloc_flag;
81
89
};
82
90
83
91
#define AGP_NORMAL_MEMORY 0
+2
-2
include/linux/agpgart.h
+2
-2
include/linux/agpgart.h
···
206
206
struct agp_controller *current_controller;
207
207
struct agp_controller *controllers;
208
208
struct agp_file_private *file_priv_list;
209
-
u8 used_by_controller;
210
-
u8 backend_acquired;
209
+
bool used_by_controller;
210
+
bool backend_acquired;
211
211
};
212
212
213
213
#endif /* __KERNEL__ */