+7 -1

drivers/gpu/drm/i915/display/intel_display.c

reviewed

··· 4602 4602 struct intel_crtc_state *crtc_state = 4603 4603 intel_atomic_get_new_crtc_state(state, crtc); 4604 4604 struct intel_crtc_state *saved_state; 4605 4605 + int err; 4605 4606 4606 4607 saved_state = intel_crtc_state_alloc(crtc); 4607 4608 if (!saved_state) ··· 4611 4610 /* free the old crtc_state->hw members */ 4612 4611 intel_crtc_free_hw_state(crtc_state); 4613 4612 4614 4614 - intel_dp_tunnel_atomic_clear_stream_bw(state, crtc_state); 4613 4613 + err = intel_dp_tunnel_atomic_clear_stream_bw(state, crtc_state); 4614 4614 + if (err) { 4615 4615 + kfree(saved_state); 4616 4616 + 4617 4617 + return err; 4618 4618 + } 4615 4619 4616 4620 /* FIXME: before the switch to atomic started, a new pipe_config was 4617 4621 * kzalloc'd. Code that depends on any field being zero should be

+14 -6

drivers/gpu/drm/i915/display/intel_dp_tunnel.c

reviewed

··· 621 621 * 622 622 * Clear any DP tunnel stream BW requirement set by 623 623 * intel_dp_tunnel_atomic_compute_stream_bw(). 624 624 + * 625 625 + * Returns 0 in case of success, a negative error code otherwise. 624 626 */ 625 625 - void intel_dp_tunnel_atomic_clear_stream_bw(struct intel_atomic_state *state, 626 626 - struct intel_crtc_state *crtc_state) 627 627 + int intel_dp_tunnel_atomic_clear_stream_bw(struct intel_atomic_state *state, 628 628 + struct intel_crtc_state *crtc_state) 627 629 { 628 630 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 631 631 + int err; 629 632 630 633 if (!crtc_state->dp_tunnel_ref.tunnel) 631 631 - return; 634 634 + return 0; 632 635 633 633 - drm_dp_tunnel_atomic_set_stream_bw(&state->base, 634 634 - crtc_state->dp_tunnel_ref.tunnel, 635 635 - crtc->pipe, 0); 636 636 + err = drm_dp_tunnel_atomic_set_stream_bw(&state->base, 637 637 + crtc_state->dp_tunnel_ref.tunnel, 638 638 + crtc->pipe, 0); 639 639 + if (err) 640 640 + return err; 641 641 + 636 642 drm_dp_tunnel_ref_put(&crtc_state->dp_tunnel_ref); 643 643 + 644 644 + return 0; 637 645 } 638 646 639 647 /**

+7 -4

drivers/gpu/drm/i915/display/intel_dp_tunnel.h

reviewed

··· 40 40 struct intel_dp *intel_dp, 41 41 const struct intel_connector *connector, 42 42 struct intel_crtc_state *crtc_state); 43 43 - void intel_dp_tunnel_atomic_clear_stream_bw(struct intel_atomic_state *state, 44 44 - struct intel_crtc_state *crtc_state); 43 43 + int intel_dp_tunnel_atomic_clear_stream_bw(struct intel_atomic_state *state, 44 44 + struct intel_crtc_state *crtc_state); 45 45 46 46 int intel_dp_tunnel_atomic_add_state_for_crtc(struct intel_atomic_state *state, 47 47 struct intel_crtc *crtc); ··· 88 88 return 0; 89 89 } 90 90 91 91 - static inline void 91 91 + static inline int 92 92 intel_dp_tunnel_atomic_clear_stream_bw(struct intel_atomic_state *state, 93 93 - struct intel_crtc_state *crtc_state) {} 93 93 + struct intel_crtc_state *crtc_state) 94 94 + { 95 95 + return 0; 96 96 + } 94 97 95 98 static inline int 96 99 intel_dp_tunnel_atomic_add_state_for_crtc(struct intel_atomic_state *state,

+3 -1

drivers/gpu/drm/i915/display/intel_gmbus.c

reviewed

··· 496 496 497 497 val = intel_de_read_fw(display, GMBUS3(display)); 498 498 do { 499 499 - if (extra_byte_added && len == 1) 499 499 + if (extra_byte_added && len == 1) { 500 500 + len--; 500 501 break; 502 502 + } 501 503 502 504 *buf++ = val & 0xff; 503 505 val >>= 8;

+9 -2

drivers/gpu/drm/i915/display/intel_plane.c

reviewed

··· 436 436 drm_framebuffer_get(plane_state->hw.fb); 437 437 } 438 438 439 439 + static void unlink_nv12_plane(struct intel_crtc_state *crtc_state, 440 440 + struct intel_plane_state *plane_state); 441 441 + 439 442 void intel_plane_set_invisible(struct intel_crtc_state *crtc_state, 440 443 struct intel_plane_state *plane_state) 441 444 { 442 445 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); 446 446 + 447 447 + unlink_nv12_plane(crtc_state, plane_state); 443 448 444 449 crtc_state->active_planes &= ~BIT(plane->id); 445 450 crtc_state->scaled_planes &= ~BIT(plane->id); ··· 1518 1513 struct intel_display *display = to_intel_display(plane_state); 1519 1514 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); 1520 1515 1516 1516 + if (!plane_state->planar_linked_plane) 1517 1517 + return; 1518 1518 + 1521 1519 plane_state->planar_linked_plane = NULL; 1522 1520 1523 1521 if (!plane_state->is_y_plane) ··· 1558 1550 if (plane->pipe != crtc->pipe) 1559 1551 continue; 1560 1552 1561 1561 - if (plane_state->planar_linked_plane) 1562 1562 - unlink_nv12_plane(crtc_state, plane_state); 1553 1553 + unlink_nv12_plane(crtc_state, plane_state); 1563 1554 } 1564 1555 1565 1556 if (!crtc_state->nv12_planes)

+1 -1

drivers/gpu/drm/i915/i915_wait_util.h

reviewed

··· 25 25 might_sleep(); \ 26 26 for (;;) { \ 27 27 const bool expired__ = ktime_after(ktime_get_raw(), end__); \ 28 28 - OP; \ 29 28 /* Guarantee COND check prior to timeout */ \ 30 29 barrier(); \ 30 30 + OP; \ 31 31 if (COND) { \ 32 32 ret__ = 0; \ 33 33 break; \