Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf fixes from Ingo Molnar:
"Misc fixes: an ABI fix for a reserved field, AMD IBS fixes, an Intel
uncore PMU driver fix and a header typo fix"
* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf/headers: Fix spelling s/EACCESS/EACCES/, s/privilidge/privilege/
perf/x86/uncore: Fix event group support
perf/x86/amd/ibs: Handle erratum #420 only on the affected CPU family (10h)
perf/x86/amd/ibs: Fix reading of the IBS OpData register and thus precise RIP validity
perf/core: Start rejecting the syscall with attr.__reserved_2 set
+45
-23
+5
-3
arch/x86/events/amd/ibs.c
+5
-3
arch/x86/events/amd/ibs.c
···
377
377
struct hw_perf_event *hwc, u64 config)
378
378
{
379
379
config &= ~perf_ibs->cnt_mask;
380
-
wrmsrl(hwc->config_base, config);
380
+
if (boot_cpu_data.x86 == 0x10)
381
+
wrmsrl(hwc->config_base, config);
381
382
config &= ~perf_ibs->enable_mask;
382
383
wrmsrl(hwc->config_base, config);
383
384
}
···
554
553
},
555
554
.msr = MSR_AMD64_IBSOPCTL,
556
555
.config_mask = IBS_OP_CONFIG_MASK,
557
-
.cnt_mask = IBS_OP_MAX_CNT,
556
+
.cnt_mask = IBS_OP_MAX_CNT | IBS_OP_CUR_CNT |
557
+
IBS_OP_CUR_CNT_RAND,
558
558
.enable_mask = IBS_OP_ENABLE,
559
559
.valid_mask = IBS_OP_VAL,
560
560
.max_period = IBS_OP_MAX_CNT << 4,
···
616
614
if (event->attr.sample_type & PERF_SAMPLE_RAW)
617
615
offset_max = perf_ibs->offset_max;
618
616
else if (check_rip)
619
-
offset_max = 2;
617
+
offset_max = 3;
620
618
else
621
619
offset_max = 1;
622
620
do {
+38
-6
arch/x86/events/intel/uncore.c
+38
-6
arch/x86/events/intel/uncore.c
···
502
502
local64_set(&event->hw.prev_count, uncore_read_counter(box, event));
503
503
uncore_enable_event(box, event);
504
504
505
-
if (box->n_active == 1) {
506
-
uncore_enable_box(box);
505
+
if (box->n_active == 1)
507
506
uncore_pmu_start_hrtimer(box);
508
-
}
509
507
}
510
508
511
509
void uncore_pmu_event_stop(struct perf_event *event, int flags)
···
527
529
WARN_ON_ONCE(hwc->state & PERF_HES_STOPPED);
528
530
hwc->state |= PERF_HES_STOPPED;
529
531
530
-
if (box->n_active == 0) {
531
-
uncore_disable_box(box);
532
+
if (box->n_active == 0)
532
533
uncore_pmu_cancel_hrtimer(box);
533
-
}
534
534
}
535
535
536
536
if ((flags & PERF_EF_UPDATE) && !(hwc->state & PERF_HES_UPTODATE)) {
···
774
778
return ret;
775
779
}
776
780
781
+
static void uncore_pmu_enable(struct pmu *pmu)
782
+
{
783
+
struct intel_uncore_pmu *uncore_pmu;
784
+
struct intel_uncore_box *box;
785
+
786
+
uncore_pmu = container_of(pmu, struct intel_uncore_pmu, pmu);
787
+
if (!uncore_pmu)
788
+
return;
789
+
790
+
box = uncore_pmu_to_box(uncore_pmu, smp_processor_id());
791
+
if (!box)
792
+
return;
793
+
794
+
if (uncore_pmu->type->ops->enable_box)
795
+
uncore_pmu->type->ops->enable_box(box);
796
+
}
797
+
798
+
static void uncore_pmu_disable(struct pmu *pmu)
799
+
{
800
+
struct intel_uncore_pmu *uncore_pmu;
801
+
struct intel_uncore_box *box;
802
+
803
+
uncore_pmu = container_of(pmu, struct intel_uncore_pmu, pmu);
804
+
if (!uncore_pmu)
805
+
return;
806
+
807
+
box = uncore_pmu_to_box(uncore_pmu, smp_processor_id());
808
+
if (!box)
809
+
return;
810
+
811
+
if (uncore_pmu->type->ops->disable_box)
812
+
uncore_pmu->type->ops->disable_box(box);
813
+
}
814
+
777
815
static ssize_t uncore_get_attr_cpumask(struct device *dev,
778
816
struct device_attribute *attr, char *buf)
779
817
{
···
833
803
pmu->pmu = (struct pmu) {
834
804
.attr_groups = pmu->type->attr_groups,
835
805
.task_ctx_nr = perf_invalid_context,
806
+
.pmu_enable = uncore_pmu_enable,
807
+
.pmu_disable = uncore_pmu_disable,
836
808
.event_init = uncore_pmu_event_init,
837
809
.add = uncore_pmu_event_add,
838
810
.del = uncore_pmu_event_del,
-12
arch/x86/events/intel/uncore.h
-12
arch/x86/events/intel/uncore.h
···
441
441
return -EINVAL;
442
442
}
443
443
444
-
static inline void uncore_disable_box(struct intel_uncore_box *box)
445
-
{
446
-
if (box->pmu->type->ops->disable_box)
447
-
box->pmu->type->ops->disable_box(box);
448
-
}
449
-
450
-
static inline void uncore_enable_box(struct intel_uncore_box *box)
451
-
{
452
-
if (box->pmu->type->ops->enable_box)
453
-
box->pmu->type->ops->enable_box(box);
454
-
}
455
-
456
444
static inline void uncore_disable_event(struct intel_uncore_box *box,
457
445
struct perf_event *event)
458
446
{
+1
-1
include/linux/perf_event.h
+1
-1
include/linux/perf_event.h
···
292
292
* -EBUSY -- @event is for this PMU but PMU temporarily unavailable
293
293
* -EINVAL -- @event is for this PMU but @event is not valid
294
294
* -EOPNOTSUPP -- @event is for this PMU, @event is valid, but not supported
295
-
* -EACCESS -- @event is for this PMU, @event is valid, but no privilidges
295
+
* -EACCES -- @event is for this PMU, @event is valid, but no privileges
296
296
*
297
297
* 0 -- @event is for this PMU and valid
298
298
*