tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

clk: qcom: gcc-sc8180x: Add missing GDSCs

There are 5 more GDSCs that we were ignoring and not putting to sleep,
which are listed in downstream DTS. Add them.

Fixes: 4433594bbe5d ("clk: qcom: gcc: Add global clock controller driver for SC8180x")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Val Packett <val@packett.cool>
Link: https://lore.kernel.org/r/20260312112321.370983-3-val@packett.cool
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

authored by

Val Packett and committed by
Bjorn Andersson 3565741e 76404ffb

+50
+50
drivers/clk/qcom/gcc-sc8180x.c
··· 4266 4266 .flags = POLL_CFG_GDSCR, 4267 4267 }; 4268 4268 4269 + static struct gdsc hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc = { 4270 + .gdscr = 0x7d050, 4271 + .pd = { 4272 + .name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc", 4273 + }, 4274 + .pwrsts = PWRSTS_OFF_ON, 4275 + .flags = VOTABLE, 4276 + }; 4277 + 4278 + static struct gdsc hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc = { 4279 + .gdscr = 0x7d058, 4280 + .pd = { 4281 + .name = "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc", 4282 + }, 4283 + .pwrsts = PWRSTS_OFF_ON, 4284 + .flags = VOTABLE, 4285 + }; 4286 + 4287 + static struct gdsc hlos1_vote_mmnoc_mmu_tbu_sf_gdsc = { 4288 + .gdscr = 0x7d054, 4289 + .pd = { 4290 + .name = "hlos1_vote_mmnoc_mmu_tbu_sf_gdsc", 4291 + }, 4292 + .pwrsts = PWRSTS_OFF_ON, 4293 + .flags = VOTABLE, 4294 + }; 4295 + 4296 + static struct gdsc hlos1_vote_turing_mmu_tbu0_gdsc = { 4297 + .gdscr = 0x7d05c, 4298 + .pd = { 4299 + .name = "hlos1_vote_turing_mmu_tbu0_gdsc", 4300 + }, 4301 + .pwrsts = PWRSTS_OFF_ON, 4302 + .flags = VOTABLE, 4303 + }; 4304 + 4305 + static struct gdsc hlos1_vote_turing_mmu_tbu1_gdsc = { 4306 + .gdscr = 0x7d060, 4307 + .pd = { 4308 + .name = "hlos1_vote_turing_mmu_tbu1_gdsc", 4309 + }, 4310 + .pwrsts = PWRSTS_OFF_ON, 4311 + .flags = VOTABLE, 4312 + }; 4313 + 4269 4314 static struct clk_regmap *gcc_sc8180x_clocks[] = { 4270 4315 [GCC_AGGRE_NOC_PCIE_TBU_CLK] = &gcc_aggre_noc_pcie_tbu_clk.clkr, 4271 4316 [GCC_AGGRE_UFS_CARD_AXI_CLK] = &gcc_aggre_ufs_card_axi_clk.clkr, ··· 4640 4595 [USB30_MP_GDSC] = &usb30_mp_gdsc, 4641 4596 [USB30_PRIM_GDSC] = &usb30_prim_gdsc, 4642 4597 [USB30_SEC_GDSC] = &usb30_sec_gdsc, 4598 + [HLOS1_VOTE_MMNOC_MMU_TBU_HF0_GDSC] = &hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc, 4599 + [HLOS1_VOTE_MMNOC_MMU_TBU_HF1_GDSC] = &hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc, 4600 + [HLOS1_VOTE_MMNOC_MMU_TBU_SF_GDSC] = &hlos1_vote_mmnoc_mmu_tbu_sf_gdsc, 4601 + [HLOS1_VOTE_TURING_MMU_TBU0_GDSC] = &hlos1_vote_turing_mmu_tbu0_gdsc, 4602 + [HLOS1_VOTE_TURING_MMU_TBU1_GDSC] = &hlos1_vote_turing_mmu_tbu1_gdsc, 4643 4603 }; 4644 4604 4645 4605 static const struct regmap_config gcc_sc8180x_regmap_config = {