-1

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

reviewed

··· 4896 4896 4897 4897 drm_atomic_private_obj_init(adev_to_drm(adev), 4898 4898 &adev->dm.atomic_obj, 4899 4899 - NULL, 4900 4899 &dm_atomic_state_funcs); 4901 4900 4902 4901 r = amdgpu_display_modeset_create_props(adev);

+8 -8

drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c

reviewed

··· 65 65 static int komeda_layer_obj_add(struct komeda_kms_dev *kms, 66 66 struct komeda_layer *layer) 67 67 { 68 68 - drm_atomic_private_obj_init(&kms->base, &layer->base.obj, NULL, 68 68 + drm_atomic_private_obj_init(&kms->base, &layer->base.obj, 69 69 &komeda_layer_obj_funcs); 70 70 return 0; 71 71 } ··· 118 118 struct komeda_scaler *scaler) 119 119 { 120 120 drm_atomic_private_obj_init(&kms->base, 121 121 - &scaler->base.obj, NULL, 121 121 + &scaler->base.obj, 122 122 &komeda_scaler_obj_funcs); 123 123 return 0; 124 124 } ··· 170 170 static int komeda_compiz_obj_add(struct komeda_kms_dev *kms, 171 171 struct komeda_compiz *compiz) 172 172 { 173 173 - drm_atomic_private_obj_init(&kms->base, &compiz->base.obj, NULL, 173 173 + drm_atomic_private_obj_init(&kms->base, &compiz->base.obj, 174 174 &komeda_compiz_obj_funcs); 175 175 176 176 return 0; ··· 224 224 struct komeda_splitter *splitter) 225 225 { 226 226 drm_atomic_private_obj_init(&kms->base, 227 227 - &splitter->base.obj, NULL, 227 227 + &splitter->base.obj, 228 228 &komeda_splitter_obj_funcs); 229 229 230 230 return 0; ··· 277 277 struct komeda_merger *merger) 278 278 { 279 279 drm_atomic_private_obj_init(&kms->base, 280 280 - &merger->base.obj, NULL, 280 280 + &merger->base.obj, 281 281 &komeda_merger_obj_funcs); 282 282 283 283 return 0; ··· 330 330 static int komeda_improc_obj_add(struct komeda_kms_dev *kms, 331 331 struct komeda_improc *improc) 332 332 { 333 333 - drm_atomic_private_obj_init(&kms->base, &improc->base.obj, NULL, 333 333 + drm_atomic_private_obj_init(&kms->base, &improc->base.obj, 334 334 &komeda_improc_obj_funcs); 335 335 336 336 return 0; ··· 383 383 static int komeda_timing_ctrlr_obj_add(struct komeda_kms_dev *kms, 384 384 struct komeda_timing_ctrlr *ctrlr) 385 385 { 386 386 - drm_atomic_private_obj_init(&kms->base, &ctrlr->base.obj, NULL, 386 386 + drm_atomic_private_obj_init(&kms->base, &ctrlr->base.obj, 387 387 &komeda_timing_ctrlr_obj_funcs); 388 388 389 389 return 0; ··· 437 437 static int komeda_pipeline_obj_add(struct komeda_kms_dev *kms, 438 438 struct komeda_pipeline *pipe) 439 439 { 440 440 - drm_atomic_private_obj_init(&kms->base, &pipe->obj, NULL, 440 440 + drm_atomic_private_obj_init(&kms->base, &pipe->obj, 441 441 &komeda_pipeline_obj_funcs); 442 442 443 443 return 0;

-1

drivers/gpu/drm/display/drm_dp_mst_topology.c

reviewed

··· 5765 5765 mgr->conn_base_id = conn_base_id; 5766 5766 5767 5767 drm_atomic_private_obj_init(dev, &mgr->base, 5768 5768 - NULL, 5769 5768 &drm_dp_mst_topology_state_funcs); 5770 5769 5771 5770 return 0;

+1 -1

drivers/gpu/drm/display/drm_dp_tunnel.c

reviewed

··· 1600 1600 group->available_bw = -1; 1601 1601 INIT_LIST_HEAD(&group->tunnels); 1602 1602 1603 1603 - drm_atomic_private_obj_init(mgr->dev, &group->base, NULL, 1603 1603 + drm_atomic_private_obj_init(mgr->dev, &group->base, 1604 1604 &tunnel_group_funcs); 1605 1605 1606 1606 return true;

+5 -17

drivers/gpu/drm/drm_atomic.c

reviewed

··· 921 921 * drm_atomic_private_obj_init - initialize private object 922 922 * @dev: DRM device this object will be attached to 923 923 * @obj: private object 924 924 - * @state: initial private object state 925 924 * @funcs: pointer to the struct of function pointers that identify the object 926 925 * type 927 926 * ··· 932 933 */ 933 934 int drm_atomic_private_obj_init(struct drm_device *dev, 934 935 struct drm_private_obj *obj, 935 935 - struct drm_private_state *state, 936 936 const struct drm_private_state_funcs *funcs) 937 937 { 938 938 + struct drm_private_state *state; 938 939 memset(obj, 0, sizeof(*obj)); 939 940 940 941 drm_modeset_lock_init(&obj->lock); ··· 943 944 obj->funcs = funcs; 944 945 list_add_tail(&obj->head, &dev->mode_config.privobj_list); 945 946 946 946 - /* 947 947 - * Not all users of drm_atomic_private_obj_init have been 948 948 - * converted to using &drm_private_obj_funcs.atomic_create_state yet. 949 949 - * For the time being, let's only call reset if the passed state is 950 950 - * NULL. Otherwise, we will fallback to the previous behaviour. 951 951 - */ 952 952 - if (!state) { 953 953 - state = obj->funcs->atomic_create_state(obj); 954 954 - if (IS_ERR(state)) 955 955 - return PTR_ERR(state); 947 947 + state = obj->funcs->atomic_create_state(obj); 948 948 + if (IS_ERR(state)) 949 949 + return PTR_ERR(state); 956 950 957 957 - obj->state = state; 958 958 - } else { 959 959 - obj->state = state; 960 960 - state->obj = obj; 961 961 - } 951 951 + obj->state = state; 962 952 963 953 return 0; 964 954 }

-1

drivers/gpu/drm/drm_bridge.c

reviewed

··· 553 553 554 554 if (drm_bridge_is_atomic(bridge)) 555 555 drm_atomic_private_obj_init(bridge->dev, &bridge->base, 556 556 - NULL, 557 556 &drm_bridge_priv_state_funcs); 558 557 559 558 return 0;

+1 -1

drivers/gpu/drm/ingenic/ingenic-drm-drv.c

reviewed

··· 1401 1401 goto err_devclk_disable; 1402 1402 } 1403 1403 1404 1404 - drm_atomic_private_obj_init(drm, &priv->private_obj, NULL, 1404 1404 + drm_atomic_private_obj_init(drm, &priv->private_obj, 1405 1405 &ingenic_drm_private_state_funcs); 1406 1406 1407 1407 ret = drmm_add_action_or_reset(drm, ingenic_drm_atomic_private_obj_fini,

+1 -1

drivers/gpu/drm/ingenic/ingenic-ipu.c

reviewed

··· 901 901 return err; 902 902 } 903 903 904 904 - drm_atomic_private_obj_init(drm, &ipu->private_obj, NULL, 904 904 + drm_atomic_private_obj_init(drm, &ipu->private_obj, 905 905 &ingenic_ipu_private_state_funcs); 906 906 907 907 return 0;

-1

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

reviewed

··· 1161 1161 dev->mode_config.cursor_height = 512; 1162 1162 1163 1163 drm_atomic_private_obj_init(dpu_kms->dev, &dpu_kms->global_state, 1164 1164 - NULL, 1165 1164 &dpu_kms_global_state_funcs); 1166 1165 1167 1166 atomic_set(&dpu_kms->bandwidth_ref, 0);

-1

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

reviewed

··· 717 717 mdp5_kms->dev = dev; 718 718 719 719 drm_atomic_private_obj_init(mdp5_kms->dev, &mdp5_kms->glob_state, 720 720 - NULL, 721 720 &mdp5_global_state_funcs); 722 721 723 722 /* we need to set a default rate before enabling. Set a safe

+1 -1

drivers/gpu/drm/omapdrm/omap_drv.c

reviewed

··· 299 299 { 300 300 struct omap_drm_private *priv = dev->dev_private; 301 301 302 302 - drm_atomic_private_obj_init(dev, &priv->glob_obj, NULL, 302 302 + drm_atomic_private_obj_init(dev, &priv->glob_obj, 303 303 &omap_global_state_funcs); 304 304 return 0; 305 305 }

+1 -1

drivers/gpu/drm/tegra/hub.c

reviewed

··· 957 957 struct drm_device *drm = dev_get_drvdata(client->host); 958 958 struct tegra_drm *tegra = drm->dev_private; 959 959 960 960 - drm_atomic_private_obj_init(drm, &hub->base, NULL, 960 960 + drm_atomic_private_obj_init(drm, &hub->base, 961 961 &tegra_display_hub_state_funcs); 962 962 963 963 tegra->hub = hub;

+1 -3

drivers/gpu/drm/vc4/vc4_kms.c

reviewed

··· 116 116 { 117 117 drm_modeset_lock_init(&vc4->ctm_state_lock); 118 118 119 119 - drm_atomic_private_obj_init(&vc4->base, &vc4->ctm_manager, NULL, 119 119 + drm_atomic_private_obj_init(&vc4->base, &vc4->ctm_manager, 120 120 &vc4_ctm_state_funcs); 121 121 122 122 return drmm_add_action_or_reset(&vc4->base, vc4_ctm_obj_fini, NULL); ··· 757 757 static int vc4_load_tracker_obj_init(struct vc4_dev *vc4) 758 758 { 759 759 drm_atomic_private_obj_init(&vc4->base, &vc4->load_tracker, 760 760 - NULL, 761 760 &vc4_load_tracker_state_funcs); 762 761 763 762 return drmm_add_action_or_reset(&vc4->base, vc4_load_tracker_obj_fini, NULL); ··· 848 849 static int vc4_hvs_channels_obj_init(struct vc4_dev *vc4) 849 850 { 850 851 drm_atomic_private_obj_init(&vc4->base, &vc4->hvs_channels, 851 851 - NULL, 852 852 &vc4_hvs_state_funcs); 853 853 854 854 return drmm_add_action_or_reset(&vc4->base, vc4_hvs_channels_obj_fini, NULL);

-1

include/drm/drm_atomic.h

reviewed

··· 738 738 739 739 int drm_atomic_private_obj_init(struct drm_device *dev, 740 740 struct drm_private_obj *obj, 741 741 - struct drm_private_state *state, 742 741 const struct drm_private_state_funcs *funcs); 743 742 void drm_atomic_private_obj_fini(struct drm_private_obj *obj); 744 743