Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
dt-bindings: clock, reset: Add econet EN751221
Add clock and reset bindings for EN751221 as well as a "chip-scu" which is
an additional regmap that is used by the clock driver as well as others.
This split of the SCU across two register areas is the same as the Airoha
AN758x family.
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
authored by
Caleb James DeLisle
and committed by
Stephen Boyd
35af99f7
c3692998
+70
-1
+5
-1
Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml
+5
-1
Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml
···
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32
- enum:
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- airoha,en7523-scu
34
34
- airoha,en7581-scu
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+
- econet,en751221-scu
35
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reg:
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items:
···
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- if:
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properties:
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compatible:
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-
const: airoha,en7581-scu
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enum:
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- airoha,en7581-scu
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- econet,en751221-scu
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then:
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properties:
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reg:
···
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#reset-cells = <1>;
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};
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};
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+
+2
Documentation/devicetree/bindings/mfd/syscon.yaml
+2
Documentation/devicetree/bindings/mfd/syscon.yaml
···
61
61
- cirrus,ep7209-syscon2
62
62
- cirrus,ep7209-syscon3
63
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- cnxt,cx92755-uc
64
+
- econet,en751221-chip-scu
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- freecom,fsg-cs2-system-controller
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- fsl,imx93-aonmix-ns-syscfg
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- fsl,imx93-wakeupmix-syscfg
···
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173
- cirrus,ep7209-syscon2
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- cirrus,ep7209-syscon3
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- cnxt,cx92755-uc
176
+
- econet,en751221-chip-scu
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- freecom,fsg-cs2-system-controller
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- fsl,imx93-aonmix-ns-syscfg
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179
- fsl,imx93-wakeupmix-syscfg
+2
MAINTAINERS
+2
MAINTAINERS
···
9096
9096
F: arch/mips/econet/
9097
9097
F: drivers/clocksource/timer-econet-en751221.c
9098
9098
F: drivers/irqchip/irq-econet-en751221.c
9099
+
F: include/dt-bindings/clock/econet,en751221-scu.h
9100
+
F: include/dt-bindings/reset/econet,en751221-scu.h
9099
9101
9100
9102
ECRYPT FILE SYSTEM
9101
9103
M: Tyler Hicks <code@tyhicks.com>
+12
include/dt-bindings/clock/econet,en751221-scu.h
+12
include/dt-bindings/clock/econet,en751221-scu.h
···
1
+
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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+
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+
#ifndef _DT_BINDINGS_CLOCK_ECONET_EN751221_SCU_H_
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#define _DT_BINDINGS_CLOCK_ECONET_EN751221_SCU_H_
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#define EN751221_CLK_PCIE 0
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#define EN751221_CLK_SPI 1
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#define EN751221_CLK_BUS 2
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#define EN751221_CLK_CPU 3
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#define EN751221_CLK_GSW 4
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+
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#endif /* _DT_BINDINGS_CLOCK_ECONET_EN751221_SCU_H_ */
+49
include/dt-bindings/reset/econet,en751221-scu.h
+49
include/dt-bindings/reset/econet,en751221-scu.h
···
1
+
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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+
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+
#ifndef __DT_BINDINGS_RESET_CONTROLLER_ECONET_EN751221_H_
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#define __DT_BINDINGS_RESET_CONTROLLER_ECONET_EN751221_H_
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+
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#define EN751221_XPON_PHY_RST 0
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+
#define EN751221_PCM1_ZSI_ISI_RST 1
8
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#define EN751221_FE_QDMA1_RST 2
9
+
#define EN751221_FE_QDMA2_RST 3
10
+
#define EN751221_FE_UNZIP_RST 4
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+
#define EN751221_PCM2_RST 5
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#define EN751221_PTM_MAC_RST 6
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#define EN751221_CRYPTO_RST 7
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+
#define EN751221_SAR_RST 8
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#define EN751221_TIMER_RST 9
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#define EN751221_INTC_RST 10
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#define EN751221_BONDING_RST 11
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#define EN751221_PCM1_RST 12
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#define EN751221_UART_RST 13
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#define EN751221_GPIO_RST 14
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#define EN751221_GDMA_RST 15
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#define EN751221_I2C_MASTER_RST 16
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#define EN751221_PCM2_ZSI_ISI_RST 17
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#define EN751221_SFC_RST 18
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#define EN751221_UART2_RST 19
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#define EN751221_GDMP_RST 20
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#define EN751221_FE_RST 21
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#define EN751221_USB_HOST_P0_RST 22
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#define EN751221_GSW_RST 23
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#define EN751221_SFC2_PCM_RST 24
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#define EN751221_PCIE0_RST 25
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#define EN751221_PCIE1_RST 26
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#define EN751221_CPU_TIMER_RST 27
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#define EN751221_PCIE_HB_RST 28
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#define EN751221_SIMIF_RST 29
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#define EN751221_XPON_MAC_RST 30
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#define EN751221_GFAST_RST 31
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#define EN751221_CPU_TIMER2_RST 32
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#define EN751221_UART3_RST 33
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#define EN751221_UART4_RST 34
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#define EN751221_UART5_RST 35
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#define EN751221_I2C2_RST 36
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#define EN751221_XSI_MAC_RST 37
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#define EN751221_XSI_PHY_RST 38
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#define EN751221_DMT_RST 39
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#define EN751221_USB_PHY_P0_RST 40
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#define EN751221_USB_PHY_P1_RST 41
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#endif /* __DT_BINDINGS_RESET_CONTROLLER_ECONET_EN751221_H_ */