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Revert "drm/amd/display: ignore modifiers when checking for format support"

This reverts commit 5089c4a8ebea3c3ad9eedf038dad7098ebc06131.

This breaks validation and enumeration of display capable modifiers.

The early return true means the rest of the validation code never gets
executed, and we need that to enumerate the right modifiers to userspace
for the format.

The modifiers that are in the initial list generated for a plane are the
superset for all formats and we need the proper checks in this function
to filter some of them out for formats with which they're invalid to be
used.

Furthermore, the safety contract here is that we validate the incoming
modifiers to ensure the kernel can handle them and the display hardware
can handle them. This includes e.g. rejecting multi-plane images with DCC.

Note that the legacy swizzle mechanism allows encoding more swizzles, and
at fb creation time we convert them to modifiers and reject those with
no corresponding modifiers. If we are seeing rejections I'm happy to
help define modifiers that correspond to those, or if absolutely needed
implement a fallback path to allow for less strict validation of the
legacy path.

However, I'd like to revert this patch, since any of these is going to
be a significant rework of the patch, and I'd rather not the regression
gets into a release or forgotten in the meantime.

Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Bas Nieuwenhuizen and committed by
Alex Deucher
366e817e 7fc494f9

+7 -46
+7 -46
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
··· 4890 4890 { 4891 4891 struct amdgpu_device *adev = drm_to_adev(plane->dev); 4892 4892 const struct drm_format_info *info = drm_format_info(format); 4893 - struct hw_asic_id asic_id = adev->dm.dc->ctx->asic_id; 4893 + int i; 4894 + 4894 4895 enum dm_micro_swizzle microtile = modifier_gfx9_swizzle_mode(modifier) & 3; 4895 4896 4896 4897 if (!info) ··· 4907 4906 return true; 4908 4907 } 4909 4908 4910 - /* check if swizzle mode is supported by this version of DCN */ 4911 - switch (asic_id.chip_family) { 4912 - case FAMILY_SI: 4913 - case FAMILY_CI: 4914 - case FAMILY_KV: 4915 - case FAMILY_CZ: 4916 - case FAMILY_VI: 4917 - /* asics before AI does not have modifier support */ 4918 - return false; 4919 - break; 4920 - case FAMILY_AI: 4921 - case FAMILY_RV: 4922 - case FAMILY_NV: 4923 - case FAMILY_VGH: 4924 - case FAMILY_YELLOW_CARP: 4925 - case AMDGPU_FAMILY_GC_10_3_6: 4926 - case AMDGPU_FAMILY_GC_10_3_7: 4927 - switch (AMD_FMT_MOD_GET(TILE, modifier)) { 4928 - case AMD_FMT_MOD_TILE_GFX9_64K_R_X: 4929 - case AMD_FMT_MOD_TILE_GFX9_64K_D_X: 4930 - case AMD_FMT_MOD_TILE_GFX9_64K_S_X: 4931 - case AMD_FMT_MOD_TILE_GFX9_64K_D: 4932 - return true; 4933 - break; 4934 - default: 4935 - return false; 4936 - break; 4937 - } 4938 - break; 4939 - case AMDGPU_FAMILY_GC_11_0_0: 4940 - switch (AMD_FMT_MOD_GET(TILE, modifier)) { 4941 - case AMD_FMT_MOD_TILE_GFX11_256K_R_X: 4942 - case AMD_FMT_MOD_TILE_GFX9_64K_R_X: 4943 - case AMD_FMT_MOD_TILE_GFX9_64K_D_X: 4944 - case AMD_FMT_MOD_TILE_GFX9_64K_S_X: 4945 - case AMD_FMT_MOD_TILE_GFX9_64K_D: 4946 - return true; 4947 - break; 4948 - default: 4949 - return false; 4950 - break; 4951 - } 4952 - break; 4953 - default: 4954 - ASSERT(0); /* Unknown asic */ 4909 + /* Check that the modifier is on the list of the plane's supported modifiers. */ 4910 + for (i = 0; i < plane->modifier_count; i++) { 4911 + if (modifier == plane->modifiers[i]) 4955 4912 break; 4956 4913 } 4914 + if (i == plane->modifier_count) 4915 + return false; 4957 4916 4958 4917 /* 4959 4918 * For D swizzle the canonical modifier depends on the bpp, so check