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ASoC: cs43130: Fixes and improvements

Merge series from Maciej Strozek <mstrozek@opensource.cirrus.com>:

This patchset aims to add minor fixes (first two patches) and
introduce general improvements to the driver (rest of the patches)

Mark Brown 36c4d9a6 7d562ac3

+117 -99
+116 -99
sound/soc/codecs/cs43130.c
··· 16 16 #include <linux/platform_device.h> 17 17 #include <linux/pm.h> 18 18 #include <linux/i2c.h> 19 - #include <linux/of.h> 19 + #include <linux/property.h> 20 20 #include <linux/regmap.h> 21 21 #include <linux/slab.h> 22 22 #include <sound/core.h> ··· 238 238 struct cs43130_private *cs43130 = snd_soc_component_get_drvdata(component); 239 239 const struct cs43130_pll_params *pll_entry; 240 240 241 - dev_dbg(component->dev, "cs43130->mclk = %u, cs43130->mclk_int = %u\n", 241 + dev_dbg(cs43130->dev, "cs43130->mclk = %u, cs43130->mclk_int = %u\n", 242 242 cs43130->mclk, cs43130->mclk_int); 243 243 244 244 pll_entry = cs43130_get_pll_table(cs43130->mclk, cs43130->mclk_int); ··· 303 303 cs43130->mclk = freq_in; 304 304 break; 305 305 default: 306 - dev_err(component->dev, 306 + dev_err(cs43130->dev, 307 307 "unsupported pll input reference clock:%d\n", freq_in); 308 308 return -EINVAL; 309 309 } ··· 316 316 cs43130->mclk_int = freq_out; 317 317 break; 318 318 default: 319 - dev_err(component->dev, 319 + dev_err(cs43130->dev, 320 320 "unsupported pll output ref clock: %u\n", freq_out); 321 321 return -EINVAL; 322 322 } 323 323 324 324 ret = cs43130_pll_config(component); 325 - dev_dbg(component->dev, "cs43130->pll_bypass = %d", cs43130->pll_bypass); 325 + dev_dbg(cs43130->dev, "cs43130->pll_bypass = %d", cs43130->pll_bypass); 326 326 return ret; 327 327 } 328 328 ··· 346 346 mclk_int_decoded = CS43130_MCLK_24P5; 347 347 break; 348 348 default: 349 - dev_err(component->dev, "Invalid MCLK INT freq: %u\n", cs43130->mclk_int); 349 + dev_err(cs43130->dev, "Invalid MCLK INT freq: %u\n", cs43130->mclk_int); 350 350 return -EINVAL; 351 351 } 352 352 ··· 370 370 CS43130_XTAL_RDY_INT_MASK, 371 371 1 << CS43130_XTAL_RDY_INT_SHIFT); 372 372 if (ret == 0) { 373 - dev_err(component->dev, "Timeout waiting for XTAL_READY interrupt\n"); 373 + dev_err(cs43130->dev, "Timeout waiting for XTAL_READY interrupt\n"); 374 374 return -ETIMEDOUT; 375 375 } 376 376 } ··· 406 406 CS43130_XTAL_RDY_INT_MASK, 407 407 1 << CS43130_XTAL_RDY_INT_SHIFT); 408 408 if (ret == 0) { 409 - dev_err(component->dev, "Timeout waiting for XTAL_READY interrupt\n"); 409 + dev_err(cs43130->dev, "Timeout waiting for XTAL_READY interrupt\n"); 410 410 return -ETIMEDOUT; 411 411 } 412 412 } ··· 422 422 CS43130_PLL_RDY_INT_MASK, 423 423 1 << CS43130_PLL_RDY_INT_SHIFT); 424 424 if (ret == 0) { 425 - dev_err(component->dev, "Timeout waiting for PLL_READY interrupt\n"); 425 + dev_err(cs43130->dev, "Timeout waiting for PLL_READY interrupt\n"); 426 426 return -ETIMEDOUT; 427 427 } 428 428 ··· 453 453 1 << CS43130_PDN_PLL_SHIFT); 454 454 break; 455 455 default: 456 - dev_err(component->dev, "Invalid MCLK source value\n"); 456 + dev_err(cs43130->dev, "Invalid MCLK source value\n"); 457 457 return -EINVAL; 458 458 } 459 459 ··· 578 578 break; 579 579 case SND_SOC_DAIFMT_LEFT_J: 580 580 hi_size = bitwidth_sclk; 581 - frm_delay = 2; 581 + frm_delay = 0; 582 582 frm_phase = 1; 583 583 break; 584 584 case SND_SOC_DAIFMT_DSP_A: ··· 804 804 dsd_speed = 1; 805 805 break; 806 806 default: 807 - dev_err(component->dev, "Rate(%u) not supported\n", 807 + dev_err(cs43130->dev, "Rate(%u) not supported\n", 808 808 params_rate(params)); 809 809 return -EINVAL; 810 810 } ··· 875 875 dsd_speed = 1; 876 876 break; 877 877 default: 878 - dev_err(component->dev, "Rate(%u) not supported\n", 878 + dev_err(cs43130->dev, "Rate(%u) not supported\n", 879 879 params_rate(params)); 880 880 return -EINVAL; 881 881 } ··· 892 892 regmap_write(cs43130->regmap, CS43130_SP_SRATE, rate_map->val); 893 893 break; 894 894 default: 895 - dev_err(component->dev, "Invalid DAI (%d)\n", dai->id); 895 + dev_err(cs43130->dev, "Invalid DAI (%d)\n", dai->id); 896 896 return -EINVAL; 897 897 } 898 898 ··· 916 916 917 917 if (!sclk) { 918 918 /* at this point, SCLK must be set */ 919 - dev_err(component->dev, "SCLK freq is not set\n"); 919 + dev_err(cs43130->dev, "SCLK freq is not set\n"); 920 920 return -EINVAL; 921 921 } 922 922 923 923 bitwidth_sclk = (sclk / params_rate(params)) / params_channels(params); 924 924 if (bitwidth_sclk < bitwidth_dai) { 925 - dev_err(component->dev, "Format not supported: SCLK freq is too low\n"); 925 + dev_err(cs43130->dev, "Format not supported: SCLK freq is too low\n"); 926 926 return -EINVAL; 927 927 } 928 928 929 - dev_dbg(component->dev, 929 + dev_dbg(cs43130->dev, 930 930 "sclk = %u, fs = %d, bitwidth_dai = %u\n", 931 931 sclk, params_rate(params), bitwidth_dai); 932 932 933 - dev_dbg(component->dev, 933 + dev_dbg(cs43130->dev, 934 934 "bitwidth_sclk = %u, num_ch = %u\n", 935 935 bitwidth_sclk, params_channels(params)); 936 936 ··· 1189 1189 } 1190 1190 break; 1191 1191 default: 1192 - dev_err(component->dev, "Invalid event = 0x%x\n", event); 1192 + dev_err(cs43130->dev, "Invalid event = 0x%x\n", event); 1193 1193 return -EINVAL; 1194 1194 } 1195 1195 return 0; ··· 1246 1246 } 1247 1247 break; 1248 1248 default: 1249 - dev_err(component->dev, "Invalid event = 0x%x\n", event); 1249 + dev_err(cs43130->dev, "Invalid event = 0x%x\n", event); 1250 1250 return -EINVAL; 1251 1251 } 1252 1252 return 0; ··· 1322 1322 } 1323 1323 break; 1324 1324 default: 1325 - dev_err(component->dev, "Invalid DAC event = 0x%x\n", event); 1325 + dev_err(cs43130->dev, "Invalid DAC event = 0x%x\n", event); 1326 1326 return -EINVAL; 1327 1327 } 1328 1328 return 0; ··· 1360 1360 ARRAY_SIZE(hpin_postpmu_seq)); 1361 1361 break; 1362 1362 default: 1363 - dev_err(component->dev, "Invalid HPIN event = 0x%x\n", event); 1363 + dev_err(cs43130->dev, "Invalid HPIN event = 0x%x\n", event); 1364 1364 return -EINVAL; 1365 1365 } 1366 1366 return 0; 1367 1367 } 1368 1368 1369 + static const char * const bypass_mux_text[] = { 1370 + "Internal", 1371 + "Alternative", 1372 + }; 1373 + static SOC_ENUM_SINGLE_DECL(bypass_enum, SND_SOC_NOPM, 0, bypass_mux_text); 1374 + static const struct snd_kcontrol_new bypass_ctrl = SOC_DAPM_ENUM("Switch", bypass_enum); 1375 + 1369 1376 static const struct snd_soc_dapm_widget digital_hp_widgets[] = { 1377 + SND_SOC_DAPM_MUX("Bypass Switch", SND_SOC_NOPM, 0, 0, &bypass_ctrl), 1370 1378 SND_SOC_DAPM_OUTPUT("HPOUTA"), 1371 1379 SND_SOC_DAPM_OUTPUT("HPOUTB"), 1372 1380 ··· 1427 1419 {"DSD", NULL, "XSPIN DSD"}, 1428 1420 {"HiFi DAC", NULL, "ASPIN PCM"}, 1429 1421 {"HiFi DAC", NULL, "DSD"}, 1430 - {"HPOUTA", NULL, "HiFi DAC"}, 1431 - {"HPOUTB", NULL, "HiFi DAC"}, 1422 + {"Bypass Switch", "Internal", "HiFi DAC"}, 1423 + {"HPOUTA", NULL, "Bypass Switch"}, 1424 + {"HPOUTB", NULL, "Bypass Switch"}, 1432 1425 }; 1433 1426 1434 1427 static const struct snd_soc_dapm_route analog_hp_routes[] = { 1435 - {"HPOUTA", NULL, "Analog Playback"}, 1436 - {"HPOUTB", NULL, "Analog Playback"}, 1428 + {"Bypass Switch", "Alternative", "Analog Playback"}, 1437 1429 }; 1438 1430 1439 1431 static struct snd_soc_dapm_route all_hp_routes[ ··· 1487 1479 cs43130->dais[codec_dai->id].dai_mode = SND_SOC_DAIFMT_CBM_CFM; 1488 1480 break; 1489 1481 default: 1490 - dev_err(component->dev, "unsupported mode\n"); 1482 + dev_err(cs43130->dev, "unsupported mode\n"); 1491 1483 return -EINVAL; 1492 1484 } 1493 1485 ··· 1505 1497 cs43130->dais[codec_dai->id].dai_format = SND_SOC_DAIFMT_DSP_B; 1506 1498 break; 1507 1499 default: 1508 - dev_err(component->dev, 1500 + dev_err(cs43130->dev, 1509 1501 "unsupported audio format\n"); 1510 1502 return -EINVAL; 1511 1503 } 1512 1504 1513 - dev_dbg(component->dev, "dai_id = %d, dai_mode = %u, dai_format = %u\n", 1505 + dev_dbg(cs43130->dev, "dai_id = %d, dai_mode = %u, dai_format = %u\n", 1514 1506 codec_dai->id, 1515 1507 cs43130->dais[codec_dai->id].dai_mode, 1516 1508 cs43130->dais[codec_dai->id].dai_format); ··· 1531 1523 cs43130->dais[codec_dai->id].dai_mode = SND_SOC_DAIFMT_CBM_CFM; 1532 1524 break; 1533 1525 default: 1534 - dev_err(component->dev, "Unsupported DAI format.\n"); 1526 + dev_err(cs43130->dev, "Unsupported DAI format.\n"); 1535 1527 return -EINVAL; 1536 1528 } 1537 1529 1538 - dev_dbg(component->dev, "dai_mode = 0x%x\n", 1530 + dev_dbg(cs43130->dev, "dai_mode = 0x%x\n", 1539 1531 cs43130->dais[codec_dai->id].dai_mode); 1540 1532 1541 1533 return 0; ··· 1548 1540 struct cs43130_private *cs43130 = snd_soc_component_get_drvdata(component); 1549 1541 1550 1542 cs43130->dais[codec_dai->id].sclk = freq; 1551 - dev_dbg(component->dev, "dai_id = %d, sclk = %u\n", codec_dai->id, 1543 + dev_dbg(cs43130->dev, "dai_id = %d, sclk = %u\n", codec_dai->id, 1552 1544 cs43130->dais[codec_dai->id].sclk); 1553 1545 1554 1546 return 0; ··· 1638 1630 { 1639 1631 struct cs43130_private *cs43130 = snd_soc_component_get_drvdata(component); 1640 1632 1641 - dev_dbg(component->dev, "clk_id = %d, source = %d, freq = %d, dir = %d\n", 1633 + dev_dbg(cs43130->dev, "clk_id = %d, source = %d, freq = %d, dir = %d\n", 1642 1634 clk_id, source, freq, dir); 1643 1635 1644 1636 switch (freq) { ··· 1647 1639 cs43130->mclk = freq; 1648 1640 break; 1649 1641 default: 1650 - dev_err(component->dev, "Invalid MCLK INT freq: %u\n", freq); 1642 + dev_err(cs43130->dev, "Invalid MCLK INT freq: %u\n", freq); 1651 1643 return -EINVAL; 1652 1644 } 1653 1645 1654 1646 if (source == CS43130_MCLK_SRC_EXT) { 1655 1647 cs43130->pll_bypass = true; 1656 1648 } else { 1657 - dev_err(component->dev, "Invalid MCLK source\n"); 1649 + dev_err(cs43130->dev, "Invalid MCLK source\n"); 1658 1650 return -EINVAL; 1659 1651 } 1660 1652 ··· 1690 1682 return cs43130_show_dc(dev, buf, HP_RIGHT); 1691 1683 } 1692 1684 1693 - static u16 const cs43130_ac_freq[CS43130_AC_FREQ] = { 1685 + static const u16 cs43130_ac_freq[CS43130_AC_FREQ] = { 1694 1686 24, 1695 1687 43, 1696 1688 93, ··· 1941 1933 unsigned int reg; 1942 1934 u32 addr; 1943 1935 u16 impedance; 1944 - struct snd_soc_component *component = cs43130->component; 1945 1936 1946 1937 switch (msk) { 1947 1938 case CS43130_HPLOAD_DC_INT: ··· 1970 1963 else 1971 1964 cs43130->hpload_dc[HP_RIGHT] = impedance; 1972 1965 1973 - dev_dbg(component->dev, "HP DC impedance (Ch %u): %u\n", !left_ch, 1966 + dev_dbg(cs43130->dev, "HP DC impedance (Ch %u): %u\n", !left_ch, 1974 1967 impedance); 1975 1968 } else { 1976 1969 if (left_ch) ··· 1978 1971 else 1979 1972 cs43130->hpload_ac[ac_idx][HP_RIGHT] = impedance; 1980 1973 1981 - dev_dbg(component->dev, "HP AC (%u Hz) impedance (Ch %u): %u\n", 1974 + dev_dbg(cs43130->dev, "HP AC (%u Hz) impedance (Ch %u): %u\n", 1982 1975 cs43130->ac_freq[ac_idx], !left_ch, impedance); 1983 1976 } 1984 1977 ··· 1992 1985 int ret; 1993 1986 unsigned int msk; 1994 1987 u16 ac_reg_val; 1995 - struct snd_soc_component *component = cs43130->component; 1996 1988 1997 1989 reinit_completion(&cs43130->hpload_evt); 1998 1990 ··· 2014 2008 msecs_to_jiffies(1000)); 2015 2009 regmap_read(cs43130->regmap, CS43130_INT_MASK_4, &msk); 2016 2010 if (!ret) { 2017 - dev_err(component->dev, "Timeout waiting for HPLOAD interrupt\n"); 2011 + dev_err(cs43130->dev, "Timeout waiting for HPLOAD interrupt\n"); 2018 2012 return -1; 2019 2013 } 2020 2014 2021 - dev_dbg(component->dev, "HP load stat: %x, INT_MASK_4: %x\n", 2015 + dev_dbg(cs43130->dev, "HP load stat: %x, INT_MASK_4: %x\n", 2022 2016 cs43130->hpload_stat, msk); 2023 2017 if ((cs43130->hpload_stat & (CS43130_HPLOAD_NO_DC_INT | 2024 2018 CS43130_HPLOAD_UNPLUG_INT | 2025 2019 CS43130_HPLOAD_OOR_INT)) || 2026 2020 !(cs43130->hpload_stat & rslt_msk)) { 2027 - dev_dbg(component->dev, "HP load measure failed\n"); 2021 + dev_dbg(cs43130->dev, "HP load measure failed\n"); 2028 2022 return -1; 2029 2023 } 2030 2024 ··· 2135 2129 snd_soc_jack_report(&cs43130->jack, CS43130_JACK_HEADPHONE, 2136 2130 CS43130_JACK_MASK); 2137 2131 2138 - dev_dbg(component->dev, "Set HP output control. DC threshold\n"); 2132 + dev_dbg(cs43130->dev, "Set HP output control. DC threshold\n"); 2139 2133 for (i = 0; i < CS43130_DC_THRESHOLD; i++) 2140 - dev_dbg(component->dev, "DC threshold[%d]: %u.\n", i, 2134 + dev_dbg(cs43130->dev, "DC threshold[%d]: %u.\n", i, 2141 2135 cs43130->dc_threshold[i]); 2142 2136 2143 2137 cs43130_set_hv(cs43130->regmap, cs43130->hpload_dc[HP_LEFT], ··· 2171 2165 static irqreturn_t cs43130_irq_thread(int irq, void *data) 2172 2166 { 2173 2167 struct cs43130_private *cs43130 = (struct cs43130_private *)data; 2174 - struct snd_soc_component *component = cs43130->component; 2175 2168 unsigned int stickies[CS43130_NUM_INT]; 2176 2169 unsigned int irq_occurrence = 0; 2177 2170 unsigned int masks[CS43130_NUM_INT]; ··· 2188 2183 for (j = 0; j < 8; j++) 2189 2184 irq_occurrence += (stickies[i] >> j) & 1; 2190 2185 } 2191 - dev_dbg(component->dev, "number of interrupts occurred (%u)\n", 2192 - irq_occurrence); 2193 2186 2194 2187 if (!irq_occurrence) 2195 2188 return IRQ_NONE; ··· 2204 2201 2205 2202 if (stickies[3] & CS43130_HPLOAD_NO_DC_INT) { 2206 2203 cs43130->hpload_stat = stickies[3]; 2207 - dev_err(component->dev, 2204 + dev_err(cs43130->dev, 2208 2205 "DC load has not completed before AC load (%x)\n", 2209 2206 cs43130->hpload_stat); 2210 2207 complete(&cs43130->hpload_evt); ··· 2213 2210 2214 2211 if (stickies[3] & CS43130_HPLOAD_UNPLUG_INT) { 2215 2212 cs43130->hpload_stat = stickies[3]; 2216 - dev_err(component->dev, "HP unplugged during measurement (%x)\n", 2213 + dev_err(cs43130->dev, "HP unplugged during measurement (%x)\n", 2217 2214 cs43130->hpload_stat); 2218 2215 complete(&cs43130->hpload_evt); 2219 2216 return IRQ_HANDLED; ··· 2221 2218 2222 2219 if (stickies[3] & CS43130_HPLOAD_OOR_INT) { 2223 2220 cs43130->hpload_stat = stickies[3]; 2224 - dev_err(component->dev, "HP load out of range (%x)\n", 2221 + dev_err(cs43130->dev, "HP load out of range (%x)\n", 2225 2222 cs43130->hpload_stat); 2226 2223 complete(&cs43130->hpload_evt); 2227 2224 return IRQ_HANDLED; ··· 2229 2226 2230 2227 if (stickies[3] & CS43130_HPLOAD_AC_INT) { 2231 2228 cs43130->hpload_stat = stickies[3]; 2232 - dev_dbg(component->dev, "HP AC load measurement done (%x)\n", 2229 + dev_dbg(cs43130->dev, "HP AC load measurement done (%x)\n", 2233 2230 cs43130->hpload_stat); 2234 2231 complete(&cs43130->hpload_evt); 2235 2232 return IRQ_HANDLED; ··· 2237 2234 2238 2235 if (stickies[3] & CS43130_HPLOAD_DC_INT) { 2239 2236 cs43130->hpload_stat = stickies[3]; 2240 - dev_dbg(component->dev, "HP DC load measurement done (%x)\n", 2237 + dev_dbg(cs43130->dev, "HP DC load measurement done (%x)\n", 2241 2238 cs43130->hpload_stat); 2242 2239 complete(&cs43130->hpload_evt); 2243 2240 return IRQ_HANDLED; ··· 2245 2242 2246 2243 if (stickies[3] & CS43130_HPLOAD_ON_INT) { 2247 2244 cs43130->hpload_stat = stickies[3]; 2248 - dev_dbg(component->dev, "HP load state machine on done (%x)\n", 2245 + dev_dbg(cs43130->dev, "HP load state machine on done (%x)\n", 2249 2246 cs43130->hpload_stat); 2250 2247 complete(&cs43130->hpload_evt); 2251 2248 return IRQ_HANDLED; ··· 2253 2250 2254 2251 if (stickies[3] & CS43130_HPLOAD_OFF_INT) { 2255 2252 cs43130->hpload_stat = stickies[3]; 2256 - dev_dbg(component->dev, "HP load state machine off done (%x)\n", 2253 + dev_dbg(cs43130->dev, "HP load state machine off done (%x)\n", 2257 2254 cs43130->hpload_stat); 2258 2255 complete(&cs43130->hpload_evt); 2259 2256 return IRQ_HANDLED; 2260 2257 } 2261 2258 2262 2259 if (stickies[0] & CS43130_XTAL_ERR_INT) { 2263 - dev_err(component->dev, "Crystal err: clock is not running\n"); 2260 + dev_err(cs43130->dev, "Crystal err: clock is not running\n"); 2264 2261 return IRQ_HANDLED; 2265 2262 } 2266 2263 2267 2264 if (stickies[0] & CS43130_HP_UNPLUG_INT) { 2268 - dev_dbg(component->dev, "HP unplugged\n"); 2265 + dev_dbg(cs43130->dev, "HP unplugged\n"); 2269 2266 cs43130->hpload_done = false; 2270 2267 snd_soc_jack_report(&cs43130->jack, 0, CS43130_JACK_MASK); 2271 2268 return IRQ_HANDLED; ··· 2274 2271 if (stickies[0] & CS43130_HP_PLUG_INT) { 2275 2272 if (cs43130->dc_meas && !cs43130->hpload_done && 2276 2273 !work_busy(&cs43130->work)) { 2277 - dev_dbg(component->dev, "HP load queue work\n"); 2274 + dev_dbg(cs43130->dev, "HP load queue work\n"); 2278 2275 queue_work(cs43130->wq, &cs43130->work); 2279 2276 } 2280 2277 ··· 2306 2303 ret = snd_soc_card_jack_new(card, "Headphone", CS43130_JACK_MASK, 2307 2304 &cs43130->jack); 2308 2305 if (ret < 0) { 2309 - dev_err(component->dev, "Cannot create jack\n"); 2306 + dev_err(cs43130->dev, "Cannot create jack\n"); 2310 2307 return ret; 2311 2308 } 2312 2309 2313 2310 cs43130->hpload_done = false; 2314 2311 if (cs43130->dc_meas) { 2315 - ret = sysfs_create_groups(&component->dev->kobj, hpload_groups); 2312 + ret = sysfs_create_groups(&cs43130->dev->kobj, hpload_groups); 2316 2313 if (ret) 2317 2314 return ret; 2318 2315 2319 2316 cs43130->wq = create_singlethread_workqueue("cs43130_hp"); 2320 2317 if (!cs43130->wq) { 2321 - sysfs_remove_groups(&component->dev->kobj, hpload_groups); 2318 + sysfs_remove_groups(&cs43130->dev->kobj, hpload_groups); 2322 2319 return -ENOMEM; 2323 2320 } 2324 2321 INIT_WORK(&cs43130->work, cs43130_imp_meas); ··· 2365 2362 .use_single_write = true, 2366 2363 }; 2367 2364 2368 - static u16 const cs43130_dc_threshold[CS43130_DC_THRESHOLD] = { 2365 + static const u16 cs43130_dc_threshold[CS43130_DC_THRESHOLD] = { 2369 2366 50, 2370 2367 120, 2371 2368 }; 2372 2369 2373 - static int cs43130_handle_device_data(struct i2c_client *i2c_client, 2374 - struct cs43130_private *cs43130) 2370 + static int cs43130_handle_device_data(struct cs43130_private *cs43130) 2375 2371 { 2376 - struct device_node *np = i2c_client->dev.of_node; 2377 2372 unsigned int val; 2378 2373 int i; 2379 2374 2380 - if (of_property_read_u32(np, "cirrus,xtal-ibias", &val) < 0) { 2375 + if (device_property_read_u32(cs43130->dev, "cirrus,xtal-ibias", &val) < 0) { 2381 2376 /* Crystal is unused. System clock is used for external MCLK */ 2382 2377 cs43130->xtal_ibias = CS43130_XTAL_UNUSED; 2383 2378 return 0; ··· 2392 2391 cs43130->xtal_ibias = CS43130_XTAL_IBIAS_15UA; 2393 2392 break; 2394 2393 default: 2395 - dev_err(&i2c_client->dev, 2394 + dev_err(cs43130->dev, 2396 2395 "Invalid cirrus,xtal-ibias value: %d\n", val); 2397 2396 return -EINVAL; 2398 2397 } 2399 2398 2400 - cs43130->dc_meas = of_property_read_bool(np, "cirrus,dc-measure"); 2401 - cs43130->ac_meas = of_property_read_bool(np, "cirrus,ac-measure"); 2399 + cs43130->dc_meas = device_property_read_bool(cs43130->dev, "cirrus,dc-measure"); 2400 + cs43130->ac_meas = device_property_read_bool(cs43130->dev, "cirrus,ac-measure"); 2402 2401 2403 - if (of_property_read_u16_array(np, "cirrus,ac-freq", cs43130->ac_freq, 2404 - CS43130_AC_FREQ) < 0) { 2402 + if (!device_property_read_u16_array(cs43130->dev, "cirrus,ac-freq", cs43130->ac_freq, 2403 + CS43130_AC_FREQ)) { 2405 2404 for (i = 0; i < CS43130_AC_FREQ; i++) 2406 2405 cs43130->ac_freq[i] = cs43130_ac_freq[i]; 2407 2406 } 2408 2407 2409 - if (of_property_read_u16_array(np, "cirrus,dc-threshold", 2408 + if (!device_property_read_u16_array(cs43130->dev, "cirrus,dc-threshold", 2410 2409 cs43130->dc_threshold, 2411 - CS43130_DC_THRESHOLD) < 0) { 2410 + CS43130_DC_THRESHOLD)) { 2412 2411 for (i = 0; i < CS43130_DC_THRESHOLD; i++) 2413 2412 cs43130->dc_threshold[i] = cs43130_dc_threshold[i]; 2414 2413 } ··· 2427 2426 if (!cs43130) 2428 2427 return -ENOMEM; 2429 2428 2429 + cs43130->dev = &client->dev; 2430 + 2430 2431 i2c_set_clientdata(client, cs43130); 2431 2432 2432 2433 cs43130->regmap = devm_regmap_init_i2c(client, &cs43130_regmap); ··· 2437 2434 return ret; 2438 2435 } 2439 2436 2440 - if (client->dev.of_node) { 2441 - ret = cs43130_handle_device_data(client, cs43130); 2437 + if (dev_fwnode(cs43130->dev)) { 2438 + ret = cs43130_handle_device_data(cs43130); 2442 2439 if (ret != 0) 2443 2440 return ret; 2444 2441 } 2442 + 2445 2443 for (i = 0; i < ARRAY_SIZE(cs43130->supplies); i++) 2446 2444 cs43130->supplies[i].supply = cs43130_supply_names[i]; 2447 2445 2448 - ret = devm_regulator_bulk_get(&client->dev, 2446 + ret = devm_regulator_bulk_get(cs43130->dev, 2449 2447 ARRAY_SIZE(cs43130->supplies), 2450 2448 cs43130->supplies); 2451 2449 if (ret != 0) { 2452 - dev_err(&client->dev, "Failed to request supplies: %d\n", ret); 2450 + dev_err(cs43130->dev, "Failed to request supplies: %d\n", ret); 2453 2451 return ret; 2454 2452 } 2455 2453 ret = regulator_bulk_enable(ARRAY_SIZE(cs43130->supplies), 2456 2454 cs43130->supplies); 2457 2455 if (ret != 0) { 2458 - dev_err(&client->dev, "Failed to enable supplies: %d\n", ret); 2456 + dev_err(cs43130->dev, "Failed to enable supplies: %d\n", ret); 2459 2457 return ret; 2460 2458 } 2461 2459 2462 - cs43130->reset_gpio = devm_gpiod_get_optional(&client->dev, 2460 + cs43130->reset_gpio = devm_gpiod_get_optional(cs43130->dev, 2463 2461 "reset", GPIOD_OUT_LOW); 2464 2462 if (IS_ERR(cs43130->reset_gpio)) { 2465 2463 ret = PTR_ERR(cs43130->reset_gpio); ··· 2474 2470 devid = cirrus_read_device_id(cs43130->regmap, CS43130_DEVID_AB); 2475 2471 if (devid < 0) { 2476 2472 ret = devid; 2477 - dev_err(&client->dev, "Failed to read device ID: %d\n", ret); 2473 + dev_err(cs43130->dev, "Failed to read device ID: %d\n", ret); 2478 2474 goto err; 2479 2475 } 2480 2476 ··· 2485 2481 case CS43198_CHIP_ID: 2486 2482 break; 2487 2483 default: 2488 - dev_err(&client->dev, 2484 + dev_err(cs43130->dev, 2489 2485 "CS43130 Device ID %X. Expected ID %X, %X, %X or %X\n", 2490 2486 devid, CS43130_CHIP_ID, CS4399_CHIP_ID, 2491 2487 CS43131_CHIP_ID, CS43198_CHIP_ID); ··· 2496 2492 cs43130->dev_id = devid; 2497 2493 ret = regmap_read(cs43130->regmap, CS43130_REV_ID, &reg); 2498 2494 if (ret < 0) { 2499 - dev_err(&client->dev, "Get Revision ID failed\n"); 2495 + dev_err(cs43130->dev, "Get Revision ID failed\n"); 2500 2496 goto err; 2501 2497 } 2502 2498 2503 - dev_info(&client->dev, 2499 + dev_info(cs43130->dev, 2504 2500 "Cirrus Logic CS43130 (%x), Revision: %02X\n", devid, 2505 2501 reg & 0xFF); 2506 2502 ··· 2510 2506 init_completion(&cs43130->pll_rdy); 2511 2507 init_completion(&cs43130->hpload_evt); 2512 2508 2513 - ret = devm_request_threaded_irq(&client->dev, client->irq, 2509 + ret = devm_request_threaded_irq(cs43130->dev, client->irq, 2514 2510 NULL, cs43130_irq_thread, 2515 2511 IRQF_ONESHOT | IRQF_TRIGGER_LOW, 2516 2512 "cs43130", cs43130); 2517 2513 if (ret != 0) { 2518 - dev_err(&client->dev, "Failed to request IRQ: %d\n", ret); 2514 + dev_err(cs43130->dev, "Failed to request IRQ: %d\n", ret); 2519 2515 goto err; 2520 2516 } 2521 2517 2522 2518 cs43130->mclk_int_src = CS43130_MCLK_SRC_RCO; 2523 2519 2524 - pm_runtime_set_autosuspend_delay(&client->dev, 100); 2525 - pm_runtime_use_autosuspend(&client->dev); 2526 - pm_runtime_set_active(&client->dev); 2527 - pm_runtime_enable(&client->dev); 2520 + pm_runtime_set_autosuspend_delay(cs43130->dev, 100); 2521 + pm_runtime_use_autosuspend(cs43130->dev); 2522 + pm_runtime_set_active(cs43130->dev); 2523 + pm_runtime_enable(cs43130->dev); 2528 2524 2529 2525 switch (cs43130->dev_id) { 2530 2526 case CS43130_CHIP_ID: ··· 2560 2556 break; 2561 2557 } 2562 2558 2563 - ret = devm_snd_soc_register_component(&client->dev, 2559 + ret = devm_snd_soc_register_component(cs43130->dev, 2564 2560 &soc_component_dev_cs43130, 2565 2561 cs43130_dai, ARRAY_SIZE(cs43130_dai)); 2566 2562 if (ret < 0) { 2567 - dev_err(&client->dev, 2563 + dev_err(cs43130->dev, 2568 2564 "snd_soc_register_component failed with ret = %d\n", ret); 2569 2565 goto err; 2570 2566 } ··· 2602 2598 cancel_work_sync(&cs43130->work); 2603 2599 flush_workqueue(cs43130->wq); 2604 2600 2605 - device_remove_file(&client->dev, &dev_attr_hpload_dc_l); 2606 - device_remove_file(&client->dev, &dev_attr_hpload_dc_r); 2607 - device_remove_file(&client->dev, &dev_attr_hpload_ac_l); 2608 - device_remove_file(&client->dev, &dev_attr_hpload_ac_r); 2601 + device_remove_file(cs43130->dev, &dev_attr_hpload_dc_l); 2602 + device_remove_file(cs43130->dev, &dev_attr_hpload_dc_r); 2603 + device_remove_file(cs43130->dev, &dev_attr_hpload_ac_l); 2604 + device_remove_file(cs43130->dev, &dev_attr_hpload_ac_r); 2609 2605 } 2610 2606 2611 2607 gpiod_set_value_cansleep(cs43130->reset_gpio, 0); 2612 2608 2613 - pm_runtime_disable(&client->dev); 2609 + pm_runtime_disable(cs43130->dev); 2614 2610 regulator_bulk_disable(CS43130_NUM_SUPPLIES, cs43130->supplies); 2615 2611 } 2616 2612 ··· 2673 2669 NULL) 2674 2670 }; 2675 2671 2672 + #if IS_ENABLED(CONFIG_OF) 2676 2673 static const struct of_device_id cs43130_of_match[] = { 2677 2674 {.compatible = "cirrus,cs43130",}, 2678 2675 {.compatible = "cirrus,cs4399",}, ··· 2683 2678 }; 2684 2679 2685 2680 MODULE_DEVICE_TABLE(of, cs43130_of_match); 2681 + #endif 2682 + 2683 + #if IS_ENABLED(CONFIG_ACPI) 2684 + static const struct acpi_device_id cs43130_acpi_match[] = { 2685 + { "CSC4399", 0 }, 2686 + {} 2687 + }; 2688 + 2689 + MODULE_DEVICE_TABLE(acpi, cs43130_acpi_match); 2690 + #endif 2691 + 2686 2692 2687 2693 static const struct i2c_device_id cs43130_i2c_id[] = { 2688 2694 {"cs43130", 0}, ··· 2707 2691 2708 2692 static struct i2c_driver cs43130_i2c_driver = { 2709 2693 .driver = { 2710 - .name = "cs43130", 2711 - .of_match_table = cs43130_of_match, 2712 - .pm = &cs43130_runtime_pm, 2694 + .name = "cs43130", 2695 + .of_match_table = of_match_ptr(cs43130_of_match), 2696 + .acpi_match_table = ACPI_PTR(cs43130_acpi_match), 2697 + .pm = &cs43130_runtime_pm, 2713 2698 }, 2714 2699 .id_table = cs43130_i2c_id, 2715 2700 .probe = cs43130_i2c_probe,
+1
sound/soc/codecs/cs43130.h
··· 500 500 }; 501 501 502 502 struct cs43130_private { 503 + struct device *dev; 503 504 struct snd_soc_component *component; 504 505 struct regmap *regmap; 505 506 struct regulator_bulk_data supplies[CS43130_NUM_SUPPLIES];