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drm/i915: replace use of system_unbound_wq with system_dfl_wq

Currently if a user enqueue a work item using schedule_delayed_work() the
used wq is "system_wq" (per-cpu wq) while queue_delayed_work() use
WORK_CPU_UNBOUND (used when a cpu is not specified). The same applies to
schedule_work() that is using system_wq and queue_work(), that makes use
again of WORK_CPU_UNBOUND.

This lack of consistency cannot be addressed without refactoring the API.

system_unbound_wq should be the default workqueue so as not to enforce
locality constraints for random work whenever it's not required.

This patch continues the effort to refactor worqueue APIs, which has
begun with the change introducing new workqueues:

commit 128ea9f6ccfb ("workqueue: Add system_percpu_wq and system_dfl_wq")

The old system_unbound_wq will be kept for a few release cycles.

Suggested-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Marco Crivellari <marco.crivellari@suse.com>
Reviewed-by: Krzysztof Karas <krzysztof.karas@intel.com>
Link: https://patch.msgid.link/20251104100032.61525-2-marco.crivellari@suse.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

authored by

Marco Crivellari and committed by
Rodrigo Vivi 36ed3648 93f3a267

+16 -16
+1 -1
drivers/gpu/drm/i915/display/intel_display_power.c
··· 645 645 power.domains); 646 646 drm_WARN_ON(display->drm, power_domains->async_put_wakeref); 647 647 power_domains->async_put_wakeref = wakeref; 648 - drm_WARN_ON(display->drm, !queue_delayed_work(system_unbound_wq, 648 + drm_WARN_ON(display->drm, !queue_delayed_work(system_dfl_wq, 649 649 &power_domains->async_put_work, 650 650 msecs_to_jiffies(delay_ms))); 651 651 }
+2 -2
drivers/gpu/drm/i915/display/intel_tc.c
··· 1844 1844 if (!intel_tc_port_link_needs_reset(dig_port)) 1845 1845 return false; 1846 1846 1847 - queue_delayed_work(system_unbound_wq, 1847 + queue_delayed_work(system_dfl_wq, 1848 1848 &to_tc_port(dig_port)->link_reset_work, 1849 1849 msecs_to_jiffies(2000)); 1850 1850 ··· 1925 1925 struct intel_tc_port *tc = to_tc_port(dig_port); 1926 1926 1927 1927 if (!tc->link_refcount && tc->mode != TC_PORT_DISCONNECTED) 1928 - queue_delayed_work(system_unbound_wq, &tc->disconnect_phy_work, 1928 + queue_delayed_work(system_dfl_wq, &tc->disconnect_phy_work, 1929 1929 msecs_to_jiffies(1000)); 1930 1930 1931 1931 mutex_unlock(&tc->lock);
+1 -1
drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
··· 408 408 409 409 if (unlikely(fence->error || I915_SELFTEST_ONLY(fail_gpu_migration))) { 410 410 INIT_WORK(&copy_work->work, __memcpy_work); 411 - queue_work(system_unbound_wq, &copy_work->work); 411 + queue_work(system_dfl_wq, &copy_work->work); 412 412 } else { 413 413 init_irq_work(&copy_work->irq_work, __memcpy_irq_work); 414 414 irq_work_queue(&copy_work->irq_work);
+2 -2
drivers/gpu/drm/i915/gt/uc/intel_guc.c
··· 624 624 else 625 625 guc_err(guc, "Unknown crash notification: 0x%04X\n", action); 626 626 627 - queue_work(system_unbound_wq, &guc->dead_guc_worker); 627 + queue_work(system_dfl_wq, &guc->dead_guc_worker); 628 628 629 629 return 0; 630 630 } ··· 646 646 guc_err(guc, "Received early exception notification!\n"); 647 647 648 648 if (msg & (INTEL_GUC_RECV_MSG_CRASH_DUMP_POSTED | INTEL_GUC_RECV_MSG_EXCEPTION)) 649 - queue_work(system_unbound_wq, &guc->dead_guc_worker); 649 + queue_work(system_dfl_wq, &guc->dead_guc_worker); 650 650 651 651 return 0; 652 652 }
+2 -2
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
··· 31 31 do { \ 32 32 if (!(ct)->dead_ct_reported) { \ 33 33 (ct)->dead_ct_reason |= 1 << CT_DEAD_##reason; \ 34 - queue_work(system_unbound_wq, &(ct)->dead_ct_worker); \ 34 + queue_work(system_dfl_wq, &(ct)->dead_ct_worker); \ 35 35 } \ 36 36 } while (0) 37 37 #else ··· 1238 1238 list_add_tail(&request->link, &ct->requests.incoming); 1239 1239 spin_unlock_irqrestore(&ct->requests.lock, flags); 1240 1240 1241 - queue_work(system_unbound_wq, &ct->requests.worker); 1241 + queue_work(system_dfl_wq, &ct->requests.worker); 1242 1242 return 0; 1243 1243 } 1244 1244
+3 -3
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
··· 3385 3385 } else if (!intel_context_is_closed(ce) && !guc_id_pressure(guc, ce) && 3386 3386 delay) { 3387 3387 spin_unlock_irqrestore(&ce->guc_state.lock, flags); 3388 - mod_delayed_work(system_unbound_wq, 3388 + mod_delayed_work(system_dfl_wq, 3389 3389 &ce->guc_state.sched_disable_delay_work, 3390 3390 msecs_to_jiffies(delay)); 3391 3391 } else { ··· 3611 3611 * take the GT PM for the first time which isn't allowed from an atomic 3612 3612 * context. 3613 3613 */ 3614 - queue_work(system_unbound_wq, &guc->submission_state.destroyed_worker); 3614 + queue_work(system_dfl_wq, &guc->submission_state.destroyed_worker); 3615 3615 } 3616 3616 3617 3617 static int guc_context_alloc(struct intel_context *ce) ··· 5380 5380 * A GT reset flushes this worker queue (G2H handler) so we must use 5381 5381 * another worker to trigger a GT reset. 5382 5382 */ 5383 - queue_work(system_unbound_wq, &guc->submission_state.reset_fail_worker); 5383 + queue_work(system_dfl_wq, &guc->submission_state.reset_fail_worker); 5384 5384 5385 5385 return 0; 5386 5386 }
+1 -1
drivers/gpu/drm/i915/i915_active.c
··· 193 193 return; 194 194 195 195 if (ref->flags & I915_ACTIVE_RETIRE_SLEEPS) { 196 - queue_work(system_unbound_wq, &ref->work); 196 + queue_work(system_dfl_wq, &ref->work); 197 197 return; 198 198 } 199 199
+1 -1
drivers/gpu/drm/i915/i915_sw_fence_work.c
··· 38 38 if (test_bit(DMA_FENCE_WORK_IMM, &f->dma.flags)) 39 39 fence_work(&f->work); 40 40 else 41 - queue_work(system_unbound_wq, &f->work); 41 + queue_work(system_dfl_wq, &f->work); 42 42 } else { 43 43 fence_complete(f); 44 44 }
+1 -1
drivers/gpu/drm/i915/i915_vma_resource.c
··· 202 202 i915_vma_resource_unbind_work(&vma_res->work); 203 203 } else { 204 204 INIT_WORK(&vma_res->work, i915_vma_resource_unbind_work); 205 - queue_work(system_unbound_wq, &vma_res->work); 205 + queue_work(system_dfl_wq, &vma_res->work); 206 206 } 207 207 break; 208 208 case FENCE_FREE:
+1 -1
drivers/gpu/drm/i915/pxp/intel_pxp.c
··· 278 278 spin_lock_irq(gt->irq_lock); 279 279 intel_pxp_mark_termination_in_progress(pxp); 280 280 pxp->session_events |= PXP_TERMINATION_REQUEST; 281 - queue_work(system_unbound_wq, &pxp->session_work); 281 + queue_work(system_dfl_wq, &pxp->session_work); 282 282 spin_unlock_irq(gt->irq_lock); 283 283 } 284 284
+1 -1
drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
··· 48 48 pxp->session_events |= PXP_TERMINATION_COMPLETE | PXP_EVENT_TYPE_IRQ; 49 49 50 50 if (pxp->session_events) 51 - queue_work(system_unbound_wq, &pxp->session_work); 51 + queue_work(system_dfl_wq, &pxp->session_work); 52 52 } 53 53 54 54 static inline void __pxp_set_interrupts(struct intel_gt *gt, u32 interrupts)