Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/i915/dp: Account with pipe joiner max compressed BPP limit for DP-MST and eDP
The pipe joiner maximum compressed BPP must be limited based on the pipe
joiner memory size and BW, do that for all DP outputs by adjusting the
max compressed BPP value already in
intel_dp_compute_config_link_bpp_limits() (which is used by all output
types).
This way the BPP doesn't need to be adjusted in
dsc_compute_compressed_bpp() (called for DP-SST after the above limits
were computed already), so remove the adjustment from there.
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patch.msgid.link/20251215192357.172201-13-imre.deak@intel.com
+8
-8
+8
-8
drivers/gpu/drm/i915/display/intel_dp.c
+8
-8
drivers/gpu/drm/i915/display/intel_dp.c
···
2246
2246
{
2247
2247
struct intel_display *display = to_intel_display(intel_dp);
2248
2248
const struct intel_connector *connector = to_intel_connector(conn_state->connector);
2249
-
const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
2250
2249
int min_bpp_x16, max_bpp_x16, bpp_step_x16;
2251
-
int dsc_joiner_max_bpp;
2252
-
int num_joined_pipes = intel_crtc_num_joined_pipes(pipe_config);
2253
2250
int link_bpp_x16;
2254
2251
int bpp_x16;
2255
2252
int ret;
2256
2253
2257
-
dsc_joiner_max_bpp = get_max_compressed_bpp_with_joiner(display, adjusted_mode->crtc_clock,
2258
-
adjusted_mode->hdisplay,
2259
-
num_joined_pipes);
2260
-
max_bpp_x16 = min(fxp_q4_from_int(dsc_joiner_max_bpp), limits->link.max_bpp_x16);
2261
-
2254
+
max_bpp_x16 = limits->link.max_bpp_x16;
2262
2255
bpp_step_x16 = intel_dp_dsc_bpp_step_x16(connector);
2263
2256
2264
2257
/* Compressed BPP should be less than the Input DSC bpp */
···
2607
2614
int dsc_src_min_bpp, dsc_sink_min_bpp, dsc_min_bpp;
2608
2615
int dsc_src_max_bpp, dsc_sink_max_bpp, dsc_max_bpp;
2609
2616
int throughput_max_bpp_x16;
2617
+
int joiner_max_bpp;
2610
2618
2611
2619
dsc_src_min_bpp = intel_dp_dsc_min_src_compressed_bpp();
2612
2620
dsc_sink_min_bpp = intel_dp_dsc_sink_min_compressed_bpp(crtc_state);
···
2615
2621
limits->link.min_bpp_x16 = fxp_q4_from_int(dsc_min_bpp);
2616
2622
2617
2623
dsc_src_max_bpp = dsc_src_max_compressed_bpp(intel_dp);
2624
+
joiner_max_bpp =
2625
+
get_max_compressed_bpp_with_joiner(display,
2626
+
adjusted_mode->crtc_clock,
2627
+
adjusted_mode->hdisplay,
2628
+
intel_crtc_num_joined_pipes(crtc_state));
2618
2629
dsc_sink_max_bpp = intel_dp_dsc_sink_max_compressed_bpp(connector,
2619
2630
crtc_state,
2620
2631
limits->pipe.max_bpp / 3);
2621
2632
dsc_max_bpp = dsc_sink_max_bpp ?
2622
2633
min(dsc_sink_max_bpp, dsc_src_max_bpp) : dsc_src_max_bpp;
2634
+
dsc_max_bpp = min(dsc_max_bpp, joiner_max_bpp);
2623
2635
2624
2636
max_link_bpp_x16 = min(max_link_bpp_x16, fxp_q4_from_int(dsc_max_bpp));
2625
2637