Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM soc fixes from Olof Johansson:
"A set of fixes and some minor cleanups for -rc2:
- A series from Arnd that fixes warnings in drivers and other code
included by ARM defconfigs. Most have been acked by corresponding
maintainers (and seem quite hard to argue not picking up anyway in
the few exception cases).
- A few misc patches from the list for integrator/vt8500/i.MX
- A batch of fixes to OMAP platforms, fixing:
- boot problems on beaglebone,
- regression fixes for local timers
- clockdomain locking fixes
- a few boot/sparse warnings
- For Tegra:
- Clock rate calculation overflow fix
- Revert a change that removed timer clocks and a fix for symbol
name clashes
- For Renesas:
- IO accessor / annotation cleanups to remove warnings
- For Kirkwood/Dove/mvebu:
- Fixes for device trees for Dove (some minor cleanups, some fixes)
- Fixes for the mvebu gpio driver
- Fix build problem for Feroceon due to missing ifdefs
- Fix lsxl DTS files"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (31 commits)
ARM: kirkwood: fix buttons on lsxl boards
ARM: kirkwood: fix LEDs names for lsxl boards
ARM: Kirkwood: fix disabling CACHE_FEROCEON_L2
gpio: mvebu: Add missing breaks in mvebu_gpio_irq_set_type
ARM: dove: Add crypto engine to DT
ARM: dove: Remove watchdog from DT
ARM: dove: Restructure SoC device tree descriptor
ARM: dove: Fix clock names of sata and gbe
ARM: dove: Fix tauros2 device tree init
ARM: dove: Add pcie clock support
ARM: OMAP2+: Allow kernel to boot even if GPMC fails to reserve memory
ARM: OMAP: clockdomain: Fix locking on _clkdm_clk_hwmod_enable / disable
ARM: s3c: mark s3c2440_clk_add as __init_refok
spi/s3c64xx: use correct dma_transfer_direction type
ARM: OMAP4: devices: fixup OMAP4 DMIC platform device error message
ARM: OMAP2+: clock data: Add dev-id for the omap-gpmc dummy fck
ARM: OMAP: resolve sparse warning concerning debug_card_init()
ARM: OMAP4: Fix twd_local_timer_register regression
ARM: tegra: add tegra_timer clock
ARM: tegra: rename tegra system timer
...
+133
-75
+2
arch/arm/boot/dts/Makefile
+2
arch/arm/boot/dts/Makefile
···
25
25
exynos4210-trats.dtb \
26
26
exynos5250-smdk5250.dtb
27
27
dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb
28
+
dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \
29
+
integratorcp.dtb
28
30
dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb
29
31
dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-dns320.dtb \
30
32
kirkwood-dns325.dtb \
+32
-17
arch/arm/boot/dts/dove.dtsi
+32
-17
arch/arm/boot/dts/dove.dtsi
···
4
4
compatible = "marvell,dove";
5
5
model = "Marvell Armada 88AP510 SoC";
6
6
7
-
interrupt-parent = <&intc>;
8
-
9
-
intc: interrupt-controller {
10
-
compatible = "marvell,orion-intc";
11
-
interrupt-controller;
12
-
#interrupt-cells = <1>;
13
-
reg = <0xf1020204 0x04>,
14
-
<0xf1020214 0x04>;
15
-
};
16
-
17
-
mbus@f1000000 {
7
+
soc@f1000000 {
18
8
compatible = "simple-bus";
19
-
ranges = <0 0xf1000000 0x4000000>;
20
9
#address-cells = <1>;
21
10
#size-cells = <1>;
11
+
interrupt-parent = <&intc>;
12
+
13
+
ranges = <0xc8000000 0xc8000000 0x0100000 /* CESA SRAM 1M */
14
+
0xe0000000 0xe0000000 0x8000000 /* PCIe0 Mem 128M */
15
+
0xe8000000 0xe8000000 0x8000000 /* PCIe1 Mem 128M */
16
+
0xf0000000 0xf0000000 0x0100000 /* ScratchPad 1M */
17
+
0x00000000 0xf1000000 0x1000000 /* SB/NB regs 16M */
18
+
0xf2000000 0xf2000000 0x0100000 /* PCIe0 I/O 1M */
19
+
0xf2100000 0xf2100000 0x0100000 /* PCIe0 I/O 1M */
20
+
0xf8000000 0xf8000000 0x8000000>; /* BootROM 128M */
21
+
22
+
l2: l2-cache {
23
+
compatible = "marvell,tauros2-cache";
24
+
marvell,tauros2-cache-features = <0>;
25
+
};
26
+
27
+
intc: interrupt-controller {
28
+
compatible = "marvell,orion-intc";
29
+
interrupt-controller;
30
+
#interrupt-cells = <1>;
31
+
reg = <0x20204 0x04>, <0x20214 0x04>;
32
+
};
22
33
23
34
uart0: serial@12000 {
24
35
compatible = "ns16550a";
···
65
54
interrupts = <10>;
66
55
clock-frequency = <166666667>;
67
56
status = "disabled";
68
-
};
69
-
70
-
wdt: wdt@20300 {
71
-
compatible = "marvell,orion-wdt";
72
-
reg = <0x20300 0x28>;
73
57
};
74
58
75
59
gpio0: gpio@d0400 {
···
144
138
interrupts = <62>;
145
139
nr-ports = <1>;
146
140
status = "disabled";
141
+
};
142
+
143
+
crypto: crypto@30000 {
144
+
compatible = "marvell,orion-crypto";
145
+
reg = <0x30000 0x10000>,
146
+
<0xc8000000 0x800>;
147
+
reg-names = "regs", "sram";
148
+
interrupts = <31>;
149
+
status = "okay";
147
150
};
148
151
};
149
152
};
+9
-1
arch/arm/boot/dts/imx6q-arm2.dts
+9
-1
arch/arm/boot/dts/imx6q-arm2.dts
···
37
37
pinctrl_hog: hoggrp {
38
38
fsl,pins = <
39
39
176 0x80000000 /* MX6Q_PAD_EIM_D25__GPIO_3_25 */
40
+
>;
41
+
};
42
+
};
43
+
44
+
arm2 {
45
+
pinctrl_usdhc3_arm2: usdhc3grp-arm2 {
46
+
fsl,pins = <
40
47
1363 0x80000000 /* MX6Q_PAD_NANDF_CS0__GPIO_6_11 */
41
48
1369 0x80000000 /* MX6Q_PAD_NANDF_CS1__GPIO_6_14 */
42
49
>;
···
65
58
wp-gpios = <&gpio6 14 0>;
66
59
vmmc-supply = <®_3p3v>;
67
60
pinctrl-names = "default";
68
-
pinctrl-0 = <&pinctrl_usdhc3_1>;
61
+
pinctrl-0 = <&pinctrl_usdhc3_1
62
+
&pinctrl_usdhc3_arm2>;
69
63
status = "okay";
70
64
};
71
65
+10
-8
arch/arm/boot/dts/kirkwood-lsxl.dtsi
+10
-8
arch/arm/boot/dts/kirkwood-lsxl.dtsi
···
48
48
#size-cells = <0>;
49
49
button@1 {
50
50
label = "Function Button";
51
-
linux,code = <132>;
51
+
linux,code = <357>;
52
52
gpios = <&gpio1 9 1>;
53
53
};
54
54
button@2 {
55
55
label = "Power-on Switch";
56
-
linux,code = <116>;
56
+
linux,code = <0>;
57
+
linux,input-type = <5>;
57
58
gpios = <&gpio1 10 1>;
58
59
};
59
60
button@3 {
60
61
label = "Power-auto Switch";
61
-
linux,code = <142>;
62
+
linux,code = <1>;
63
+
linux,input-type = <5>;
62
64
gpios = <&gpio1 11 1>;
63
65
};
64
66
};
···
69
67
compatible = "gpio-leds";
70
68
71
69
led@1 {
72
-
label = "lschlv2:blue:func";
70
+
label = "lsxl:blue:func";
73
71
gpios = <&gpio1 4 1>;
74
72
};
75
73
76
74
led@2 {
77
-
label = "lschlv2:red:alarm";
75
+
label = "lsxl:red:alarm";
78
76
gpios = <&gpio1 5 1>;
79
77
};
80
78
81
79
led@3 {
82
-
label = "lschlv2:amber:info";
80
+
label = "lsxl:amber:info";
83
81
gpios = <&gpio1 6 1>;
84
82
};
85
83
86
84
led@4 {
87
-
label = "lschlv2:blue:power";
85
+
label = "lsxl:blue:power";
88
86
gpios = <&gpio1 7 1>;
89
87
linux,default-trigger = "default-on";
90
88
};
91
89
92
90
led@5 {
93
-
label = "lschlv2:red:func";
91
+
label = "lsxl:red:func";
94
92
gpios = <&gpio1 16 1>;
95
93
};
96
94
};
+2
-2
arch/arm/boot/dts/wm8505.dtsi
+2
-2
arch/arm/boot/dts/wm8505.dtsi
···
71
71
ehci@d8007100 {
72
72
compatible = "via,vt8500-ehci";
73
73
reg = <0xd8007100 0x200>;
74
-
interrupts = <43>;
74
+
interrupts = <1>;
75
75
};
76
76
77
77
uhci@d8007300 {
78
78
compatible = "platform-uhci";
79
79
reg = <0xd8007300 0x200>;
80
-
interrupts = <43>;
80
+
interrupts = <0>;
81
81
};
82
82
83
83
fb@d8050800 {
+4
-4
arch/arm/mach-dove/common.c
+4
-4
arch/arm/mach-dove/common.c
···
32
32
#include <linux/irq.h>
33
33
#include <plat/time.h>
34
34
#include <linux/platform_data/usb-ehci-orion.h>
35
+
#include <plat/irq.h>
35
36
#include <plat/common.h>
36
37
#include <plat/addr-map.h>
37
38
#include "common.h"
···
110
109
111
110
orion_clkdev_add(NULL, "orion-ehci.0", usb0);
112
111
orion_clkdev_add(NULL, "orion-ehci.1", usb1);
113
-
orion_clkdev_add(NULL, "mv643xx_eth.0", ge);
114
-
orion_clkdev_add("0", "sata_mv.0", sata);
112
+
orion_clkdev_add(NULL, "mv643xx_eth_port.0", ge);
113
+
orion_clkdev_add(NULL, "sata_mv.0", sata);
115
114
orion_clkdev_add("0", "pcie", pex0);
116
115
orion_clkdev_add("1", "pcie", pex1);
117
116
orion_clkdev_add(NULL, "sdhci-dove.0", sdio0);
···
400
399
(dove_tclk + 499999) / 1000000);
401
400
402
401
#ifdef CONFIG_CACHE_TAUROS2
403
-
tauros2_init();
402
+
tauros2_init(0);
404
403
#endif
405
404
dove_setup_cpu_mbus();
406
405
···
416
415
dove_ehci0_init();
417
416
dove_ehci1_init();
418
417
dove_pcie_init(1, 1);
419
-
dove_crypto_init();
420
418
421
419
of_platform_populate(NULL, of_default_bus_match_table,
422
420
dove_auxdata_lookup, NULL);
+5
arch/arm/mach-dove/pcie.c
+5
arch/arm/mach-dove/pcie.c
···
10
10
11
11
#include <linux/kernel.h>
12
12
#include <linux/pci.h>
13
+
#include <linux/clk.h>
13
14
#include <video/vga.h>
14
15
#include <asm/mach/pci.h>
15
16
#include <asm/mach/arch.h>
···
189
188
190
189
if (orion_pcie_link_up(base)) {
191
190
struct pcie_port *pp = &pcie_port[num_pcie_ports++];
191
+
struct clk *clk = clk_get_sys("pcie", (index ? "1" : "0"));
192
+
193
+
if (!IS_ERR(clk))
194
+
clk_prepare_enable(clk);
192
195
193
196
printk(KERN_INFO "link up\n");
194
197
-2
arch/arm/mach-kirkwood/board-dt.c
-2
arch/arm/mach-kirkwood/board-dt.c
+2
-2
arch/arm/mach-kirkwood/common.c
+2
-2
arch/arm/mach-kirkwood/common.c
···
633
633
634
634
void __init kirkwood_l2_init(void)
635
635
{
636
+
#ifdef CONFIG_CACHE_FEROCEON_L2
636
637
#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
637
638
writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
638
639
feroceon_l2_init(1);
639
640
#else
640
641
writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
641
642
feroceon_l2_init(0);
643
+
#endif
642
644
#endif
643
645
}
644
646
···
659
657
660
658
kirkwood_setup_cpu_mbus();
661
659
662
-
#ifdef CONFIG_CACHE_FEROCEON_L2
663
660
kirkwood_l2_init();
664
-
#endif
665
661
666
662
/* Setup root of clk tree */
667
663
kirkwood_clk_init();
+1
-1
arch/arm/mach-omap2/clock44xx_data.c
+1
-1
arch/arm/mach-omap2/clock44xx_data.c
···
3294
3294
CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck, CK_443X),
3295
3295
CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X),
3296
3296
CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X),
3297
-
CLK(NULL, "gpmc_ck", &dummy_ck, CK_443X),
3297
+
CLK("omap-gpmc", "fck", &dummy_ck, CK_443X),
3298
3298
CLK("omap_i2c.1", "ick", &dummy_ck, CK_443X),
3299
3299
CLK("omap_i2c.2", "ick", &dummy_ck, CK_443X),
3300
3300
CLK("omap_i2c.3", "ick", &dummy_ck, CK_443X),
+11
-4
arch/arm/mach-omap2/clockdomain.c
+11
-4
arch/arm/mach-omap2/clockdomain.c
···
925
925
if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_enable)
926
926
return -EINVAL;
927
927
928
+
spin_lock_irqsave(&clkdm->lock, flags);
929
+
928
930
/*
929
931
* For arch's with no autodeps, clkcm_clk_enable
930
932
* should be called for every clock instance or hwmod that is
931
933
* enabled, so the clkdm can be force woken up.
932
934
*/
933
-
if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps)
935
+
if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps) {
936
+
spin_unlock_irqrestore(&clkdm->lock, flags);
934
937
return 0;
938
+
}
935
939
936
-
spin_lock_irqsave(&clkdm->lock, flags);
937
940
arch_clkdm->clkdm_clk_enable(clkdm);
938
941
pwrdm_state_switch(clkdm->pwrdm.ptr);
939
942
spin_unlock_irqrestore(&clkdm->lock, flags);
···
953
950
if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_disable)
954
951
return -EINVAL;
955
952
953
+
spin_lock_irqsave(&clkdm->lock, flags);
954
+
956
955
if (atomic_read(&clkdm->usecount) == 0) {
956
+
spin_unlock_irqrestore(&clkdm->lock, flags);
957
957
WARN_ON(1); /* underflow */
958
958
return -ERANGE;
959
959
}
960
960
961
-
if (atomic_dec_return(&clkdm->usecount) > 0)
961
+
if (atomic_dec_return(&clkdm->usecount) > 0) {
962
+
spin_unlock_irqrestore(&clkdm->lock, flags);
962
963
return 0;
964
+
}
963
965
964
-
spin_lock_irqsave(&clkdm->lock, flags);
965
966
arch_clkdm->clkdm_clk_disable(clkdm);
966
967
pwrdm_state_switch(clkdm->pwrdm.ptr);
967
968
spin_unlock_irqrestore(&clkdm->lock, flags);
+1
-1
arch/arm/mach-omap2/devices.c
+1
-1
arch/arm/mach-omap2/devices.c
+19
-5
arch/arm/mach-omap2/gpmc.c
+19
-5
arch/arm/mach-omap2/gpmc.c
···
868
868
869
869
}
870
870
871
-
static void __devinit gpmc_mem_init(void)
871
+
static int __devinit gpmc_mem_init(void)
872
872
{
873
-
int cs;
873
+
int cs, rc;
874
874
unsigned long boot_rom_space = 0;
875
875
876
876
/* never allocate the first page, to facilitate bug detection;
···
890
890
if (!gpmc_cs_mem_enabled(cs))
891
891
continue;
892
892
gpmc_cs_get_memconf(cs, &base, &size);
893
-
if (gpmc_cs_insert_mem(cs, base, size) < 0)
894
-
BUG();
893
+
rc = gpmc_cs_insert_mem(cs, base, size);
894
+
if (IS_ERR_VALUE(rc)) {
895
+
while (--cs >= 0)
896
+
if (gpmc_cs_mem_enabled(cs))
897
+
gpmc_cs_delete_mem(cs);
898
+
return rc;
899
+
}
895
900
}
901
+
902
+
return 0;
896
903
}
897
904
898
905
static __devinit int gpmc_probe(struct platform_device *pdev)
899
906
{
907
+
int rc;
900
908
u32 l;
901
909
struct resource *res;
902
910
···
944
936
dev_info(gpmc_dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l),
945
937
GPMC_REVISION_MINOR(l));
946
938
947
-
gpmc_mem_init();
939
+
rc = gpmc_mem_init();
940
+
if (IS_ERR_VALUE(rc)) {
941
+
clk_disable_unprepare(gpmc_l3_clk);
942
+
clk_put(gpmc_l3_clk);
943
+
dev_err(gpmc_dev, "failed to reserve memory\n");
944
+
return rc;
945
+
}
948
946
949
947
if (IS_ERR_VALUE(gpmc_setup_irq()))
950
948
dev_warn(gpmc_dev, "gpmc_setup_irq failed\n");
+1
-1
arch/arm/mach-omap2/timer.c
+1
-1
arch/arm/mach-omap2/timer.c
+1
-1
arch/arm/mach-s3c24xx/clock-s3c2440.c
+1
-1
arch/arm/mach-s3c24xx/clock-s3c2440.c
···
163
163
CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n),
164
164
};
165
165
166
-
static int s3c2440_clk_add(struct device *dev, struct subsys_interface *sif)
166
+
static int __init_refok s3c2440_clk_add(struct device *dev, struct subsys_interface *sif)
167
167
{
168
168
struct clk *clock_upll;
169
169
struct clk *clock_h;
+1
-1
arch/arm/mach-shmobile/board-armadillo800eva.c
+1
-1
arch/arm/mach-shmobile/board-armadillo800eva.c
···
1196
1196
1197
1197
#ifdef CONFIG_CACHE_L2X0
1198
1198
/* Early BRESP enable, Shared attribute override enable, 32K*8way */
1199
-
l2x0_init(__io(0xf0002000), 0x40440000, 0x82000fff);
1199
+
l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff);
1200
1200
#endif
1201
1201
1202
1202
i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices));
+11
-11
arch/arm/mach-shmobile/clock-r8a7779.c
+11
-11
arch/arm/mach-shmobile/clock-r8a7779.c
···
24
24
#include <linux/clkdev.h>
25
25
#include <mach/common.h>
26
26
27
-
#define FRQMR 0xffc80014
28
-
#define MSTPCR0 0xffc80030
29
-
#define MSTPCR1 0xffc80034
30
-
#define MSTPCR3 0xffc8003c
31
-
#define MSTPSR1 0xffc80044
32
-
#define MSTPSR4 0xffc80048
33
-
#define MSTPSR6 0xffc8004c
34
-
#define MSTPCR4 0xffc80050
35
-
#define MSTPCR5 0xffc80054
36
-
#define MSTPCR6 0xffc80058
37
-
#define MSTPCR7 0xffc80040
27
+
#define FRQMR IOMEM(0xffc80014)
28
+
#define MSTPCR0 IOMEM(0xffc80030)
29
+
#define MSTPCR1 IOMEM(0xffc80034)
30
+
#define MSTPCR3 IOMEM(0xffc8003c)
31
+
#define MSTPSR1 IOMEM(0xffc80044)
32
+
#define MSTPSR4 IOMEM(0xffc80048)
33
+
#define MSTPSR6 IOMEM(0xffc8004c)
34
+
#define MSTPCR4 IOMEM(0xffc80050)
35
+
#define MSTPCR5 IOMEM(0xffc80054)
36
+
#define MSTPCR6 IOMEM(0xffc80058)
37
+
#define MSTPCR7 IOMEM(0xffc80040)
38
38
39
39
/* ioremap() through clock mapping mandatory to avoid
40
40
* collision with ARM coherent DMA virtual memory range.
+1
-1
arch/arm/mach-tegra/board-dt-tegra20.c
+1
-1
arch/arm/mach-tegra/board-dt-tegra20.c
···
182
182
.init_early = tegra20_init_early,
183
183
.init_irq = tegra_dt_init_irq,
184
184
.handle_irq = gic_handle_irq,
185
-
.timer = &tegra_timer,
185
+
.timer = &tegra_sys_timer,
186
186
.init_machine = tegra_dt_init,
187
187
.init_late = tegra_dt_init_late,
188
188
.restart = tegra_assert_system_reset,
+1
-1
arch/arm/mach-tegra/board-dt-tegra30.c
+1
-1
arch/arm/mach-tegra/board-dt-tegra30.c
+1
-1
arch/arm/mach-tegra/board.h
+1
-1
arch/arm/mach-tegra/board.h
+1
arch/arm/mach-tegra/tegra20_clocks_data.c
+1
arch/arm/mach-tegra/tegra20_clocks_data.c
+1
-1
arch/arm/mach-tegra/tegra30_clocks.c
+1
-1
arch/arm/mach-tegra/tegra30_clocks.c
+1
arch/arm/mach-tegra/tegra30_clocks_data.c
+1
arch/arm/mach-tegra/tegra30_clocks_data.c
+1
-1
arch/arm/mach-tegra/timer.c
+1
-1
arch/arm/mach-tegra/timer.c
+1
arch/arm/plat-omap/debug-devices.c
+1
arch/arm/plat-omap/debug-devices.c
+3
drivers/gpio/gpio-mvebu.c
+3
drivers/gpio/gpio-mvebu.c
···
381
381
u = readl_relaxed(mvebu_gpioreg_in_pol(mvchip));
382
382
u &= ~(1 << pin);
383
383
writel_relaxed(u, mvebu_gpioreg_in_pol(mvchip));
384
+
break;
384
385
case IRQ_TYPE_EDGE_FALLING:
385
386
case IRQ_TYPE_LEVEL_LOW:
386
387
u = readl_relaxed(mvebu_gpioreg_in_pol(mvchip));
387
388
u |= 1 << pin;
388
389
writel_relaxed(u, mvebu_gpioreg_in_pol(mvchip));
390
+
break;
389
391
case IRQ_TYPE_EDGE_BOTH: {
390
392
u32 v;
391
393
···
403
401
else
404
402
u &= ~(1 << pin); /* rising */
405
403
writel_relaxed(u, mvebu_gpioreg_in_pol(mvchip));
404
+
break;
406
405
}
407
406
}
408
407
return 0;
+1
-1
drivers/pcmcia/pxa2xx_sharpsl.c
+1
-1
drivers/pcmcia/pxa2xx_sharpsl.c
···
194
194
sharpsl_pcmcia_init_reset(skt);
195
195
}
196
196
197
-
static struct pcmcia_low_level sharpsl_pcmcia_ops __initdata = {
197
+
static struct pcmcia_low_level sharpsl_pcmcia_ops = {
198
198
.owner = THIS_MODULE,
199
199
.hw_init = sharpsl_pcmcia_hw_init,
200
200
.socket_state = sharpsl_pcmcia_socket_state,
+1
-1
drivers/scsi/arm/fas216.c
+1
-1
drivers/scsi/arm/fas216.c
···
179
179
SCp->buffers_residual, suffix);
180
180
}
181
181
182
+
#ifdef CHECK_STRUCTURE
182
183
static void fas216_dumpinfo(FAS216_Info *info)
183
184
{
184
185
static int used = 0;
···
224
223
info->internal_done, info->magic_end);
225
224
}
226
225
227
-
#ifdef CHECK_STRUCTURE
228
226
static void __fas216_checkmagic(FAS216_Info *info, const char *func)
229
227
{
230
228
int corruption = 0;
+1
drivers/scsi/arm/oak.c
+1
drivers/scsi/arm/oak.c
+3
-3
drivers/spi/spi-s3c64xx.c
+3
-3
drivers/spi/spi-s3c64xx.c
···
132
132
133
133
struct s3c64xx_spi_dma_data {
134
134
unsigned ch;
135
-
enum dma_data_direction direction;
135
+
enum dma_transfer_direction direction;
136
136
enum dma_ch dmach;
137
137
struct property *dma_prop;
138
138
};
···
1067
1067
1068
1068
if (tx) {
1069
1069
dma_data = &sdd->tx_dma;
1070
-
dma_data->direction = DMA_TO_DEVICE;
1070
+
dma_data->direction = DMA_MEM_TO_DEV;
1071
1071
chan_str = "tx";
1072
1072
} else {
1073
1073
dma_data = &sdd->rx_dma;
1074
-
dma_data->direction = DMA_FROM_DEVICE;
1074
+
dma_data->direction = DMA_DEV_TO_MEM;
1075
1075
chan_str = "rx";
1076
1076
}
1077
1077
+1
-1
drivers/usb/host/ehci-orion.c
+1
-1
drivers/usb/host/ehci-orion.c
+3
-3
mm/slob.c
+3
-3
mm/slob.c
···
429
429
__do_kmalloc_node(size_t size, gfp_t gfp, int node, unsigned long caller)
430
430
{
431
431
unsigned int *m;
432
-
int align = max(ARCH_KMALLOC_MINALIGN, ARCH_SLAB_MINALIGN);
432
+
int align = max_t(size_t, ARCH_KMALLOC_MINALIGN, ARCH_SLAB_MINALIGN);
433
433
void *ret;
434
434
435
435
gfp &= gfp_allowed_mask;
···
502
502
503
503
sp = virt_to_page(block);
504
504
if (PageSlab(sp)) {
505
-
int align = max(ARCH_KMALLOC_MINALIGN, ARCH_SLAB_MINALIGN);
505
+
int align = max_t(size_t, ARCH_KMALLOC_MINALIGN, ARCH_SLAB_MINALIGN);
506
506
unsigned int *m = (unsigned int *)(block - align);
507
507
slob_free(m, *m + align);
508
508
} else
···
521
521
522
522
sp = virt_to_page(block);
523
523
if (PageSlab(sp)) {
524
-
int align = max(ARCH_KMALLOC_MINALIGN, ARCH_SLAB_MINALIGN);
524
+
int align = max_t(size_t, ARCH_KMALLOC_MINALIGN, ARCH_SLAB_MINALIGN);
525
525
unsigned int *m = (unsigned int *)(block - align);
526
526
return SLOB_UNITS(*m) * SLOB_UNIT;
527
527
} else