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spi: dt-bindings: change spi-{rx,tx}-bus-width to arrays

Change spi-rx-bus-width and spi-tx-bus-width properties from single
uint32 values to arrays of uint32 values. This allows describing SPI
peripherals connected to controllers that have multiple data lanes for
receiving or transmitting two or more words in parallel.

Each index in the array corresponds to a physical data lane (one or more
wires depending on the bus width). Additional mapping properties will be
needed in cases where a lane on the controller or peripheral is skipped.

Bindings that make use of this property are updated in the same commit
to avoid validation errors.

The adi,ad4030 binding can now better describe the chips multi-lane
capabilities, so that binding is refined and gets a new example.

Converting from single uint32 to array of uint32 does not break .dts/
.dtb files since there is no difference between specifying a single
uint32 value and an array with a single uint32 value in devicetree.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Marcelo Schmitt <marcelo.schmitt@analog.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: David Lechner <dlechner@baylibre.com>
Link: https://patch.msgid.link/20260123-spi-add-multi-bus-support-v6-1-12af183c06eb@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>

authored by

David Lechner and committed by
Mark Brown 37bb4033 b2f06783

+83 -19
+3 -2
Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml
··· 34 34 spi-cpol: true 35 35 36 36 spi-rx-bus-width: 37 - minimum: 0 38 - maximum: 1 37 + items: 38 + minimum: 0 39 + maximum: 1 39 40 40 41 dc-gpios: 41 42 maxItems: 1
+41 -1
Documentation/devicetree/bindings/iio/adc/adi,ad4030.yaml
··· 37 37 maximum: 102040816 38 38 39 39 spi-rx-bus-width: 40 - enum: [1, 2, 4] 40 + maxItems: 2 41 + # all lanes must have the same width 42 + oneOf: 43 + - contains: 44 + const: 1 45 + - contains: 46 + const: 2 47 + - contains: 48 + const: 4 41 49 42 50 vdd-5v-supply: true 43 51 vdd-1v8-supply: true ··· 96 88 97 89 unevaluatedProperties: false 98 90 91 + allOf: 92 + - if: 93 + properties: 94 + compatible: 95 + enum: 96 + - adi,ad4030-24 97 + - adi,ad4032-24 98 + then: 99 + properties: 100 + spi-rx-bus-width: 101 + maxItems: 1 102 + 99 103 examples: 100 104 - | 101 105 #include <dt-bindings/gpio/gpio.h> ··· 120 100 compatible = "adi,ad4030-24"; 121 101 reg = <0>; 122 102 spi-max-frequency = <80000000>; 103 + vdd-5v-supply = <&supply_5V>; 104 + vdd-1v8-supply = <&supply_1_8V>; 105 + vio-supply = <&supply_1_8V>; 106 + ref-supply = <&supply_5V>; 107 + cnv-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; 108 + reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; 109 + }; 110 + }; 111 + - | 112 + #include <dt-bindings/gpio/gpio.h> 113 + 114 + spi { 115 + #address-cells = <1>; 116 + #size-cells = <0>; 117 + 118 + adc@0 { 119 + compatible = "adi,ad4630-24"; 120 + reg = <0>; 121 + spi-max-frequency = <80000000>; 122 + spi-rx-bus-width = <4>, <4>; 123 123 vdd-5v-supply = <&supply_5V>; 124 124 vdd-1v8-supply = <&supply_1_8V>; 125 125 vio-supply = <&supply_1_8V>;
+3 -2
Documentation/devicetree/bindings/iio/adc/adi,ad4695.yaml
··· 38 38 spi-cpha: true 39 39 40 40 spi-rx-bus-width: 41 - minimum: 1 42 - maximum: 4 41 + items: 42 + minimum: 1 43 + maximum: 4 43 44 44 45 avdd-supply: 45 46 description: Analog power supply.
+4 -2
Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml
··· 55 55 maximum: 4 56 56 57 57 spi-rx-bus-width: 58 - const: 1 58 + items: 59 + - const: 1 59 60 60 61 spi-tx-bus-width: 61 - const: 1 62 + items: 63 + - const: 1 62 64 63 65 required: 64 66 - compatible
+4 -2
Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
··· 77 77 maximum: 4 78 78 79 79 spi-rx-bus-width: 80 - const: 1 80 + items: 81 + - const: 1 81 82 82 83 spi-tx-bus-width: 83 - const: 1 84 + items: 85 + - const: 1 84 86 85 87 required: 86 88 - compatible
+4 -2
Documentation/devicetree/bindings/spi/andestech,ae350-spi.yaml
··· 45 45 46 46 properties: 47 47 spi-rx-bus-width: 48 - enum: [1, 4] 48 + items: 49 + - enum: [1, 4] 49 50 50 51 spi-tx-bus-width: 51 - enum: [1, 4] 52 + items: 53 + - enum: [1, 4] 52 54 53 55 allOf: 54 56 - $ref: spi-controller.yaml#
+4 -2
Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml
··· 54 54 55 55 properties: 56 56 spi-rx-bus-width: 57 - enum: [1, 2, 4] 57 + items: 58 + - enum: [1, 2, 4] 58 59 59 60 spi-tx-bus-width: 60 - enum: [1, 2, 4] 61 + items: 62 + - enum: [1, 2, 4] 61 63 62 64 required: 63 65 - compatible
+20 -6
Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
··· 64 64 description: 65 65 Bus width to the SPI bus used for read transfers. 66 66 If 0 is provided, then no RX will be possible on this device. 67 - $ref: /schemas/types.yaml#/definitions/uint32 68 - enum: [0, 1, 2, 4, 8] 69 - default: 1 67 + 68 + Some SPI peripherals and controllers may have multiple data lanes for 69 + receiving two or more words at the same time. If this is the case, each 70 + index in the array represents the lane on both the SPI peripheral and 71 + controller. Additional mapping properties may be needed if a lane is 72 + skipped on either side. 73 + $ref: /schemas/types.yaml#/definitions/uint32-array 74 + items: 75 + enum: [0, 1, 2, 4, 8] 76 + default: [1] 70 77 71 78 spi-rx-delay-us: 72 79 description: ··· 88 81 description: 89 82 Bus width to the SPI bus used for write transfers. 90 83 If 0 is provided, then no TX will be possible on this device. 91 - $ref: /schemas/types.yaml#/definitions/uint32 92 - enum: [0, 1, 2, 4, 8] 93 - default: 1 84 + 85 + Some SPI peripherals and controllers may have multiple data lanes for 86 + transmitting two or more words at the same time. If this is the case, each 87 + index in the array represents the lane on both the SPI peripheral and 88 + controller. Additional mapping properties may be needed if a lane is 89 + skipped on either side. 90 + $ref: /schemas/types.yaml#/definitions/uint32-array 91 + items: 92 + enum: [0, 1, 2, 4, 8] 93 + default: [1] 94 94 95 95 spi-tx-delay-us: 96 96 description: