Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'gpio-fixes-for-v6.2-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux
Pull gpio fixes from Bartosz Golaszewski:
- fix the -c option in the gpio-event-mode user-space example program
- fix the irq number translation in gpio-ep93xx and make its irqchip
immutable
- add a missing spin_unlock in error path in gpio-mxc
- fix a suspend breakage on System76 and Lenovo Gen2a introduced in
GPIO ACPI
* tag 'gpio-fixes-for-v6.2-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux:
tools: gpio: fix -c option of gpio-event-mon
gpio: ep93xx: remove unused variable
gpio: ep93xx: Make irqchip immutable
gpio: ep93xx: Fix port F hwirq numbers in handler
gpio: mxc: Unlock on error path in mxc_flip_edge()
gpiolib-acpi: Don't set GPIOs for wakeup in S3 mode
+27
-18
+22
-16
drivers/gpio/gpio-ep93xx.c
+22
-16
drivers/gpio/gpio-ep93xx.c
···
17
17
#include <linux/slab.h>
18
18
#include <linux/gpio/driver.h>
19
19
#include <linux/bitops.h>
20
+
#include <linux/seq_file.h>
20
21
21
22
#define EP93XX_GPIO_F_INT_STATUS 0x5c
22
23
#define EP93XX_GPIO_A_INT_STATUS 0xa0
···
41
40
#define EP93XX_GPIO_F_IRQ_BASE 80
42
41
43
42
struct ep93xx_gpio_irq_chip {
44
-
struct irq_chip ic;
45
43
u8 irq_offset;
46
44
u8 int_unmasked;
47
45
u8 int_enabled;
···
148
148
*/
149
149
struct irq_chip *irqchip = irq_desc_get_chip(desc);
150
150
unsigned int irq = irq_desc_get_irq(desc);
151
-
int port_f_idx = ((irq + 1) & 7) ^ 4; /* {19..22,47..50} -> {0..7} */
151
+
int port_f_idx = (irq & 7) ^ 4; /* {20..23,48..51} -> {0..7} */
152
152
int gpio_irq = EP93XX_GPIO_F_IRQ_BASE + port_f_idx;
153
153
154
154
chained_irq_enter(irqchip, desc);
···
185
185
ep93xx_gpio_update_int_params(epg, eic);
186
186
187
187
writeb(port_mask, epg->base + eic->irq_offset + EP93XX_INT_EOI_OFFSET);
188
+
gpiochip_disable_irq(gc, irqd_to_hwirq(d));
188
189
}
189
190
190
191
static void ep93xx_gpio_irq_mask(struct irq_data *d)
···
196
195
197
196
eic->int_unmasked &= ~BIT(d->irq & 7);
198
197
ep93xx_gpio_update_int_params(epg, eic);
198
+
gpiochip_disable_irq(gc, irqd_to_hwirq(d));
199
199
}
200
200
201
201
static void ep93xx_gpio_irq_unmask(struct irq_data *d)
···
205
203
struct ep93xx_gpio_irq_chip *eic = to_ep93xx_gpio_irq_chip(gc);
206
204
struct ep93xx_gpio *epg = gpiochip_get_data(gc);
207
205
206
+
gpiochip_enable_irq(gc, irqd_to_hwirq(d));
208
207
eic->int_unmasked |= BIT(d->irq & 7);
209
208
ep93xx_gpio_update_int_params(epg, eic);
210
209
}
···
323
320
return 0;
324
321
}
325
322
326
-
static void ep93xx_init_irq_chip(struct device *dev, struct irq_chip *ic)
323
+
static void ep93xx_irq_print_chip(struct irq_data *data, struct seq_file *p)
327
324
{
328
-
ic->irq_ack = ep93xx_gpio_irq_ack;
329
-
ic->irq_mask_ack = ep93xx_gpio_irq_mask_ack;
330
-
ic->irq_mask = ep93xx_gpio_irq_mask;
331
-
ic->irq_unmask = ep93xx_gpio_irq_unmask;
332
-
ic->irq_set_type = ep93xx_gpio_irq_type;
325
+
struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
326
+
327
+
seq_printf(p, dev_name(gc->parent));
333
328
}
329
+
330
+
static const struct irq_chip gpio_eic_irq_chip = {
331
+
.name = "ep93xx-gpio-eic",
332
+
.irq_ack = ep93xx_gpio_irq_ack,
333
+
.irq_mask = ep93xx_gpio_irq_mask,
334
+
.irq_unmask = ep93xx_gpio_irq_unmask,
335
+
.irq_mask_ack = ep93xx_gpio_irq_mask_ack,
336
+
.irq_set_type = ep93xx_gpio_irq_type,
337
+
.irq_print_chip = ep93xx_irq_print_chip,
338
+
.flags = IRQCHIP_IMMUTABLE,
339
+
GPIOCHIP_IRQ_RESOURCE_HELPERS,
340
+
};
334
341
335
342
static int ep93xx_gpio_add_bank(struct ep93xx_gpio_chip *egc,
336
343
struct platform_device *pdev,
···
363
350
364
351
girq = &gc->irq;
365
352
if (bank->has_irq || bank->has_hierarchical_irq) {
366
-
struct irq_chip *ic;
367
-
368
353
gc->set_config = ep93xx_gpio_set_config;
369
354
egc->eic = devm_kcalloc(dev, 1,
370
355
sizeof(*egc->eic),
···
370
359
if (!egc->eic)
371
360
return -ENOMEM;
372
361
egc->eic->irq_offset = bank->irq;
373
-
ic = &egc->eic->ic;
374
-
ic->name = devm_kasprintf(dev, GFP_KERNEL, "gpio-irq-%s", bank->label);
375
-
if (!ic->name)
376
-
return -ENOMEM;
377
-
ep93xx_init_irq_chip(dev, ic);
378
-
girq->chip = ic;
362
+
gpio_irq_chip_set_chip(girq, &gpio_eic_irq_chip);
379
363
}
380
364
381
365
if (bank->has_irq) {
+2
-1
drivers/gpio/gpio-mxc.c
+2
-1
drivers/gpio/gpio-mxc.c
···
249
249
} else {
250
250
pr_err("mxc: invalid configuration for GPIO %d: %x\n",
251
251
gpio, edge);
252
-
return;
252
+
goto unlock;
253
253
}
254
254
writel(val | (edge << (bit << 1)), reg);
255
255
256
+
unlock:
256
257
raw_spin_unlock_irqrestore(&port->gc.bgpio_lock, flags);
257
258
}
258
259
+2
-1
drivers/gpio/gpiolib-acpi.c
+2
-1
drivers/gpio/gpiolib-acpi.c
···
1104
1104
dev_dbg(&adev->dev, "IRQ %d already in use\n", irq);
1105
1105
}
1106
1106
1107
-
if (wake_capable)
1107
+
/* avoid suspend issues with GPIOs when systems are using S3 */
1108
+
if (wake_capable && acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0)
1108
1109
*wake_capable = info.wake_capable;
1109
1110
1110
1111
return irq;