Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'hyperv-next-signed-20250123' of git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux
Pull hyperv updates from Wei Liu:
- Introduce a new set of Hyper-V headers in include/hyperv and replace
the old hyperv-tlfs.h with the new headers (Nuno Das Neves)
- Fixes for the Hyper-V VTL mode (Roman Kisel)
- Fixes for cpu mask usage in Hyper-V code (Michael Kelley)
- Document the guest VM hibernation behaviour (Michael Kelley)
- Miscellaneous fixes and cleanups (Jacob Pan, John Starks, Naman Jain)
* tag 'hyperv-next-signed-20250123' of git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux:
Documentation: hyperv: Add overview of guest VM hibernation
hyperv: Do not overlap the hvcall IO areas in hv_vtl_apicid_to_vp_id()
hyperv: Do not overlap the hvcall IO areas in get_vtl()
hyperv: Enable the hypercall output page for the VTL mode
hv_balloon: Fallback to generic_online_page() for non-HV hot added mem
Drivers: hv: vmbus: Log on missing offers if any
Drivers: hv: vmbus: Wait for boot-time offers during boot and resume
uio_hv_generic: Add a check for HV_NIC for send, receive buffers setup
iommu/hyper-v: Don't assume cpu_possible_mask is dense
Drivers: hv: Don't assume cpu_possible_mask is dense
x86/hyperv: Don't assume cpu_possible_mask is dense
hyperv: Remove the now unused hyperv-tlfs.h files
hyperv: Switch from hyperv-tlfs.h to hyperv/hvhdk.h
hyperv: Add new Hyper-V headers in include/hyperv
hyperv: Clean up unnecessary #includes
hyperv: Move hv_connection_id to hyperv-tlfs.h
+3261
-1922
+336
Documentation/virt/hyperv/hibernation.rst
+336
Documentation/virt/hyperv/hibernation.rst
···
1
+
.. SPDX-License-Identifier: GPL-2.0
2
+
3
+
Hibernating Guest VMs
4
+
=====================
5
+
6
+
Background
7
+
----------
8
+
Linux supports the ability to hibernate itself in order to save power.
9
+
Hibernation is sometimes called suspend-to-disk, as it writes a memory
10
+
image to disk and puts the hardware into the lowest possible power
11
+
state. Upon resume from hibernation, the hardware is restarted and the
12
+
memory image is restored from disk so that it can resume execution
13
+
where it left off. See the "Hibernation" section of
14
+
Documentation/admin-guide/pm/sleep-states.rst.
15
+
16
+
Hibernation is usually done on devices with a single user, such as a
17
+
personal laptop. For example, the laptop goes into hibernation when
18
+
the cover is closed, and resumes when the cover is opened again.
19
+
Hibernation and resume happen on the same hardware, and Linux kernel
20
+
code orchestrating the hibernation steps assumes that the hardware
21
+
configuration is not changed while in the hibernated state.
22
+
23
+
Hibernation can be initiated within Linux by writing "disk" to
24
+
/sys/power/state or by invoking the reboot system call with the
25
+
appropriate arguments. This functionality may be wrapped by user space
26
+
commands such "systemctl hibernate" that are run directly from a
27
+
command line or in response to events such as the laptop lid closing.
28
+
29
+
Considerations for Guest VM Hibernation
30
+
---------------------------------------
31
+
Linux guests on Hyper-V can also be hibernated, in which case the
32
+
hardware is the virtual hardware provided by Hyper-V to the guest VM.
33
+
Only the targeted guest VM is hibernated, while other guest VMs and
34
+
the underlying Hyper-V host continue to run normally. While the
35
+
underlying Windows Hyper-V and physical hardware on which it is
36
+
running might also be hibernated using hibernation functionality in
37
+
the Windows host, host hibernation and its impact on guest VMs is not
38
+
in scope for this documentation.
39
+
40
+
Resuming a hibernated guest VM can be more challenging than with
41
+
physical hardware because VMs make it very easy to change the hardware
42
+
configuration between the hibernation and resume. Even when the resume
43
+
is done on the same VM that hibernated, the memory size might be
44
+
changed, or virtual NICs or SCSI controllers might be added or
45
+
removed. Virtual PCI devices assigned to the VM might be added or
46
+
removed. Most such changes cause the resume steps to fail, though
47
+
adding a new virtual NIC, SCSI controller, or vPCI device should work.
48
+
49
+
Additional complexity can ensue because the disks of the hibernated VM
50
+
can be moved to another newly created VM that otherwise has the same
51
+
virtual hardware configuration. While it is desirable for resume from
52
+
hibernation to succeed after such a move, there are challenges. See
53
+
details on this scenario and its limitations in the "Resuming on a
54
+
Different VM" section below.
55
+
56
+
Hyper-V also provides ways to move a VM from one Hyper-V host to
57
+
another. Hyper-V tries to ensure processor model and Hyper-V version
58
+
compatibility using VM Configuration Versions, and prevents moves to
59
+
a host that isn't compatible. Linux adapts to host and processor
60
+
differences by detecting them at boot time, but such detection is not
61
+
done when resuming execution in the hibernation image. If a VM is
62
+
hibernated on one host, then resumed on a host with a different processor
63
+
model or Hyper-V version, settings recorded in the hibernation image
64
+
may not match the new host. Because Linux does not detect such
65
+
mismatches when resuming the hibernation image, undefined behavior
66
+
and failures could result.
67
+
68
+
69
+
Enabling Guest VM Hibernation
70
+
-----------------------------
71
+
Hibernation of a Hyper-V guest VM is disabled by default because
72
+
hibernation is incompatible with memory hot-add, as provided by the
73
+
Hyper-V balloon driver. If hot-add is used and the VM hibernates, it
74
+
hibernates with more memory than it started with. But when the VM
75
+
resumes from hibernation, Hyper-V gives the VM only the originally
76
+
assigned memory, and the memory size mismatch causes resume to fail.
77
+
78
+
To enable a Hyper-V VM for hibernation, the Hyper-V administrator must
79
+
enable the ACPI virtual S4 sleep state in the ACPI configuration that
80
+
Hyper-V provides to the guest VM. Such enablement is accomplished by
81
+
modifying a WMI property of the VM, the steps for which are outside
82
+
the scope of this documentation but are available on the web.
83
+
Enablement is treated as the indicator that the administrator
84
+
prioritizes Linux hibernation in the VM over hot-add, so the Hyper-V
85
+
balloon driver in Linux disables hot-add. Enablement is indicated if
86
+
the contents of /sys/power/disk contains "platform" as an option. The
87
+
enablement is also visible in /sys/bus/vmbus/hibernation. See function
88
+
hv_is_hibernation_supported().
89
+
90
+
Linux supports ACPI sleep states on x86, but not on arm64. So Linux
91
+
guest VM hibernation is not available on Hyper-V for arm64.
92
+
93
+
Initiating Guest VM Hibernation
94
+
-------------------------------
95
+
Guest VMs can self-initiate hibernation using the standard Linux
96
+
methods of writing "disk" to /sys/power/state or the reboot system
97
+
call. As an additional layer, Linux guests on Hyper-V support the
98
+
"Shutdown" integration service, via which a Hyper-V administrator can
99
+
tell a Linux VM to hibernate using a command outside the VM. The
100
+
command generates a request to the Hyper-V shutdown driver in Linux,
101
+
which sends the uevent "EVENT=hibernate". See kernel functions
102
+
shutdown_onchannelcallback() and send_hibernate_uevent(). A udev rule
103
+
must be provided in the VM that handles this event and initiates
104
+
hibernation.
105
+
106
+
Handling VMBus Devices During Hibernation & Resume
107
+
--------------------------------------------------
108
+
The VMBus bus driver, and the individual VMBus device drivers,
109
+
implement suspend and resume functions that are called as part of the
110
+
Linux orchestration of hibernation and of resuming from hibernation.
111
+
The overall approach is to leave in place the data structures for the
112
+
primary VMBus channels and their associated Linux devices, such as
113
+
SCSI controllers and others, so that they are captured in the
114
+
hibernation image. This approach allows any state associated with the
115
+
device to be persisted across the hibernation/resume. When the VM
116
+
resumes, the devices are re-offered by Hyper-V and are connected to
117
+
the data structures that already exist in the resumed hibernation
118
+
image.
119
+
120
+
VMBus devices are identified by class and instance GUID. (See section
121
+
"VMBus device creation/deletion" in
122
+
Documentation/virt/hyperv/vmbus.rst.) Upon resume from hibernation,
123
+
the resume functions expect that the devices offered by Hyper-V have
124
+
the same class/instance GUIDs as the devices present at the time of
125
+
hibernation. Having the same class/instance GUIDs allows the offered
126
+
devices to be matched to the primary VMBus channel data structures in
127
+
the memory of the now resumed hibernation image. If any devices are
128
+
offered that don't match primary VMBus channel data structures that
129
+
already exist, they are processed normally as newly added devices. If
130
+
primary VMBus channels that exist in the resumed hibernation image are
131
+
not matched with a device offered in the resumed VM, the resume
132
+
sequence waits for 10 seconds, then proceeds. But the unmatched device
133
+
is likely to cause errors in the resumed VM.
134
+
135
+
When resuming existing primary VMBus channels, the newly offered
136
+
relids might be different because relids can change on each VM boot,
137
+
even if the VM configuration hasn't changed. The VMBus bus driver
138
+
resume function matches the class/instance GUIDs, and updates the
139
+
relids in case they have changed.
140
+
141
+
VMBus sub-channels are not persisted in the hibernation image. Each
142
+
VMBus device driver's suspend function must close any sub-channels
143
+
prior to hibernation. Closing a sub-channel causes Hyper-V to send a
144
+
RESCIND_CHANNELOFFER message, which Linux processes by freeing the
145
+
channel data structures so that all vestiges of the sub-channel are
146
+
removed. By contrast, primary channels are marked closed and their
147
+
ring buffers are freed, but Hyper-V does not send a rescind message,
148
+
so the channel data structure continues to exist. Upon resume, the
149
+
device driver's resume function re-allocates the ring buffer and
150
+
re-opens the existing channel. It then communicates with Hyper-V to
151
+
re-open sub-channels from scratch.
152
+
153
+
The Linux ends of Hyper-V sockets are forced closed at the time of
154
+
hibernation. The guest can't force closing the host end of the socket,
155
+
but any host-side actions on the host end will produce an error.
156
+
157
+
VMBus devices use the same suspend function for the "freeze" and the
158
+
"poweroff" phases, and the same resume function for the "thaw" and
159
+
"restore" phases. See the "Entering Hibernation" section of
160
+
Documentation/driver-api/pm/devices.rst for the sequencing of the
161
+
phases.
162
+
163
+
Detailed Hibernation Sequence
164
+
-----------------------------
165
+
1. The Linux power management (PM) subsystem prepares for
166
+
hibernation by freezing user space processes and allocating
167
+
memory to hold the hibernation image.
168
+
2. As part of the "freeze" phase, Linux PM calls the "suspend"
169
+
function for each VMBus device in turn. As described above, this
170
+
function removes sub-channels, and leaves the primary channel in
171
+
a closed state.
172
+
3. Linux PM calls the "suspend" function for the VMBus bus, which
173
+
closes any Hyper-V socket channels and unloads the top-level
174
+
VMBus connection with the Hyper-V host.
175
+
4. Linux PM disables non-boot CPUs, creates the hibernation image in
176
+
the previously allocated memory, then re-enables non-boot CPUs.
177
+
The hibernation image contains the memory data structures for the
178
+
closed primary channels, but no sub-channels.
179
+
5. As part of the "thaw" phase, Linux PM calls the "resume" function
180
+
for the VMBus bus, which re-establishes the top-level VMBus
181
+
connection and requests that Hyper-V re-offer the VMBus devices.
182
+
As offers are received for the primary channels, the relids are
183
+
updated as previously described.
184
+
6. Linux PM calls the "resume" function for each VMBus device. Each
185
+
device re-opens its primary channel, and communicates with Hyper-V
186
+
to re-establish sub-channels if appropriate. The sub-channels
187
+
are re-created as new channels since they were previously removed
188
+
entirely in Step 2.
189
+
7. With VMBus devices now working again, Linux PM writes the
190
+
hibernation image from memory to disk.
191
+
8. Linux PM repeats Steps 2 and 3 above as part of the "poweroff"
192
+
phase. VMBus channels are closed and the top-level VMBus
193
+
connection is unloaded.
194
+
9. Linux PM disables non-boot CPUs, and then enters ACPI sleep state
195
+
S4. Hibernation is now complete.
196
+
197
+
Detailed Resume Sequence
198
+
------------------------
199
+
1. The guest VM boots into a fresh Linux OS instance. During boot,
200
+
the top-level VMBus connection is established, and synthetic
201
+
devices are enabled. This happens via the normal paths that don't
202
+
involve hibernation.
203
+
2. Linux PM hibernation code reads swap space is to find and read
204
+
the hibernation image into memory. If there is no hibernation
205
+
image, then this boot becomes a normal boot.
206
+
3. If this is a resume from hibernation, the "freeze" phase is used
207
+
to shutdown VMBus devices and unload the top-level VMBus
208
+
connection in the running fresh OS instance, just like Steps 2
209
+
and 3 in the hibernation sequence.
210
+
4. Linux PM disables non-boot CPUs, and transfers control to the
211
+
read-in hibernation image. In the now-running hibernation image,
212
+
non-boot CPUs are restarted.
213
+
5. As part of the "resume" phase, Linux PM repeats Steps 5 and 6
214
+
from the hibernation sequence. The top-level VMBus connection is
215
+
re-established, and offers are received and matched to primary
216
+
channels in the image. Relids are updated. VMBus device resume
217
+
functions re-open primary channels and re-create sub-channels.
218
+
6. Linux PM exits the hibernation resume sequence and the VM is now
219
+
running normally from the hibernation image.
220
+
221
+
Key-Value Pair (KVP) Pseudo-Device Anomalies
222
+
--------------------------------------------
223
+
The VMBus KVP device behaves differently from other pseudo-devices
224
+
offered by Hyper-V. When the KVP primary channel is closed, Hyper-V
225
+
sends a rescind message, which causes all vestiges of the device to be
226
+
removed. But Hyper-V then re-offers the device, causing it to be newly
227
+
re-created. The removal and re-creation occurs during the "freeze"
228
+
phase of hibernation, so the hibernation image contains the re-created
229
+
KVP device. Similar behavior occurs during the "freeze" phase of the
230
+
resume sequence while still in the fresh OS instance. But in both
231
+
cases, the top-level VMBus connection is subsequently unloaded, which
232
+
causes the device to be discarded on the Hyper-V side. So no harm is
233
+
done and everything still works.
234
+
235
+
Virtual PCI devices
236
+
-------------------
237
+
Virtual PCI devices are physical PCI devices that are mapped directly
238
+
into the VM's physical address space so the VM can interact directly
239
+
with the hardware. vPCI devices include those accessed via what Hyper-V
240
+
calls "Discrete Device Assignment" (DDA), as well as SR-IOV NIC
241
+
Virtual Functions (VF) devices. See Documentation/virt/hyperv/vpci.rst.
242
+
243
+
Hyper-V DDA devices are offered to guest VMs after the top-level VMBus
244
+
connection is established, just like VMBus synthetic devices. They are
245
+
statically assigned to the VM, and their instance GUIDs don't change
246
+
unless the Hyper-V administrator makes changes to the configuration.
247
+
DDA devices are represented in Linux as virtual PCI devices that have
248
+
a VMBus identity as well as a PCI identity. Consequently, Linux guest
249
+
hibernation first handles DDA devices as VMBus devices in order to
250
+
manage the VMBus channel. But then they are also handled as PCI
251
+
devices using the hibernation functions implemented by their native
252
+
PCI driver.
253
+
254
+
SR-IOV NIC VFs also have a VMBus identity as well as a PCI
255
+
identity, and overall are processed similarly to DDA devices. A
256
+
difference is that VFs are not offered to the VM during initial boot
257
+
of the VM. Instead, the VMBus synthetic NIC driver first starts
258
+
operating and communicates to Hyper-V that it is prepared to accept a
259
+
VF, and then the VF offer is made. However, the VMBus connection
260
+
might later be unloaded and then re-established without the VM being
261
+
rebooted, as happens in Steps 3 and 5 in the Detailed Hibernation
262
+
Sequence above and in the Detailed Resume Sequence. In such a case,
263
+
the VFs likely became part of the VM during initial boot, so when the
264
+
VMBus connection is re-established, the VFs are offered on the
265
+
re-established connection without intervention by the synthetic NIC driver.
266
+
267
+
UIO Devices
268
+
-----------
269
+
A VMBus device can be exposed to user space using the Hyper-V UIO
270
+
driver (uio_hv_generic.c) so that a user space driver can control and
271
+
operate the device. However, the VMBus UIO driver does not support the
272
+
suspend and resume operations needed for hibernation. If a VMBus
273
+
device is configured to use the UIO driver, hibernating the VM fails
274
+
and Linux continues to run normally. The most common use of the Hyper-V
275
+
UIO driver is for DPDK networking, but there are other uses as well.
276
+
277
+
Resuming on a Different VM
278
+
--------------------------
279
+
This scenario occurs in the Azure public cloud in that a hibernated
280
+
customer VM only exists as saved configuration and disks -- the VM no
281
+
longer exists on any Hyper-V host. When the customer VM is resumed, a
282
+
new Hyper-V VM with identical configuration is created, likely on a
283
+
different Hyper-V host. That new Hyper-V VM becomes the resumed
284
+
customer VM, and the steps the Linux kernel takes to resume from the
285
+
hibernation image must work in that new VM.
286
+
287
+
While the disks and their contents are preserved from the original VM,
288
+
the Hyper-V-provided VMBus instance GUIDs of the disk controllers and
289
+
other synthetic devices would typically be different. The difference
290
+
would cause the resume from hibernation to fail, so several things are
291
+
done to solve this problem:
292
+
293
+
* For VMBus synthetic devices that support only a single instance,
294
+
Hyper-V always assigns the same instance GUIDs. For example, the
295
+
Hyper-V mouse, the shutdown pseudo-device, the time sync pseudo
296
+
device, etc., always have the same instance GUID, both for local
297
+
Hyper-V installs as well as in the Azure cloud.
298
+
299
+
* VMBus synthetic SCSI controllers may have multiple instances in a
300
+
VM, and in the general case instance GUIDs vary from VM to VM.
301
+
However, Azure VMs always have exactly two synthetic SCSI
302
+
controllers, and Azure code overrides the normal Hyper-V behavior
303
+
so these controllers are always assigned the same two instance
304
+
GUIDs. Consequently, when a customer VM is resumed on a newly
305
+
created VM, the instance GUIDs match. But this guarantee does not
306
+
hold for local Hyper-V installs.
307
+
308
+
* Similarly, VMBus synthetic NICs may have multiple instances in a
309
+
VM, and the instance GUIDs vary from VM to VM. Again, Azure code
310
+
overrides the normal Hyper-V behavior so that the instance GUID
311
+
of a synthetic NIC in a customer VM does not change, even if the
312
+
customer VM is deallocated or hibernated, and then re-constituted
313
+
on a newly created VM. As with SCSI controllers, this behavior
314
+
does not hold for local Hyper-V installs.
315
+
316
+
* vPCI devices do not have the same instance GUIDs when resuming
317
+
from hibernation on a newly created VM. Consequently, Azure does
318
+
not support hibernation for VMs that have DDA devices such as
319
+
NVMe controllers or GPUs. For SR-IOV NIC VFs, Azure removes the
320
+
VF from the VM before it hibernates so that the hibernation image
321
+
does not contain a VF device. When the VM is resumed it
322
+
instantiates a new VF, rather than trying to match against a VF
323
+
that is present in the hibernation image. Because Azure must
324
+
remove any VFs before initiating hibernation, Azure VM
325
+
hibernation must be initiated externally from the Azure Portal or
326
+
Azure CLI, which in turn uses the Shutdown integration service to
327
+
tell Linux to do the hibernation. If hibernation is self-initiated
328
+
within the Azure VM, VFs remain in the hibernation image, and are
329
+
not resumed properly.
330
+
331
+
In summary, Azure takes special actions to remove VFs and to ensure
332
+
that VMBus device instance GUIDs match on a new/different VM, allowing
333
+
hibernation to work for most general-purpose Azure VMs sizes. While
334
+
similar special actions could be taken when resuming on a different VM
335
+
on a local Hyper-V install, orchestrating such actions is not provided
336
+
out-of-the-box by local Hyper-V and so requires custom scripting.
+1
Documentation/virt/hyperv/index.rst
+1
Documentation/virt/hyperv/index.rst
+5
-3
MAINTAINERS
+5
-3
MAINTAINERS
···
10739
10739
F: Documentation/networking/device_drivers/ethernet/microsoft/netvsc.rst
10740
10740
F: Documentation/virt/hyperv
10741
10741
F: arch/arm64/hyperv
10742
-
F: arch/arm64/include/asm/hyperv-tlfs.h
10743
10742
F: arch/arm64/include/asm/mshyperv.h
10744
10743
F: arch/x86/hyperv
10745
-
F: arch/x86/include/asm/hyperv-tlfs.h
10746
10744
F: arch/x86/include/asm/mshyperv.h
10747
10745
F: arch/x86/include/asm/trace/hyperv.h
10748
10746
F: arch/x86/kernel/cpu/mshyperv.c
···
10756
10758
F: drivers/scsi/storvsc_drv.c
10757
10759
F: drivers/uio/uio_hv_generic.c
10758
10760
F: drivers/video/fbdev/hyperv_fb.c
10759
-
F: include/asm-generic/hyperv-tlfs.h
10760
10761
F: include/asm-generic/mshyperv.h
10761
10762
F: include/clocksource/hyperv_timer.h
10763
+
F: include/hyperv/hvgdk.h
10764
+
F: include/hyperv/hvgdk_ext.h
10765
+
F: include/hyperv/hvgdk_mini.h
10766
+
F: include/hyperv/hvhdk.h
10767
+
F: include/hyperv/hvhdk_mini.h
10762
10768
F: include/linux/hyperv.h
10763
10769
F: include/net/mana
10764
10770
F: include/uapi/linux/hyperv.h
+1
-2
arch/arm64/hyperv/hv_core.c
+1
-2
arch/arm64/hyperv/hv_core.c
···
11
11
#include <linux/types.h>
12
12
#include <linux/export.h>
13
13
#include <linux/mm.h>
14
-
#include <linux/hyperv.h>
15
14
#include <linux/arm-smccc.h>
16
15
#include <linux/module.h>
17
16
#include <asm-generic/bug.h>
18
-
#include <asm/hyperv-tlfs.h>
17
+
#include <hyperv/hvhdk.h>
19
18
#include <asm/mshyperv.h>
20
19
21
20
/*
+2
-2
arch/arm64/hyperv/mshyperv.c
+2
-2
arch/arm64/hyperv/mshyperv.c
···
49
49
hv_set_vpreg(HV_REGISTER_GUEST_OS_ID, guest_id);
50
50
51
51
/* Get the features and hints from Hyper-V */
52
-
hv_get_vpreg_128(HV_REGISTER_FEATURES, &result);
52
+
hv_get_vpreg_128(HV_REGISTER_PRIVILEGES_AND_FEATURES_INFO, &result);
53
53
ms_hyperv.features = result.as32.a;
54
54
ms_hyperv.priv_high = result.as32.b;
55
55
ms_hyperv.misc_features = result.as32.c;
56
56
57
-
hv_get_vpreg_128(HV_REGISTER_ENLIGHTENMENTS, &result);
57
+
hv_get_vpreg_128(HV_REGISTER_FEATURES_INFO, &result);
58
58
ms_hyperv.hints = result.as32.a;
59
59
60
60
pr_info("Hyper-V: privilege flags low 0x%x, high 0x%x, hints 0x%x, misc 0x%x\n",
-71
arch/arm64/include/asm/hyperv-tlfs.h
-71
arch/arm64/include/asm/hyperv-tlfs.h
···
1
-
/* SPDX-License-Identifier: GPL-2.0 */
2
-
3
-
/*
4
-
* This file contains definitions from the Hyper-V Hypervisor Top-Level
5
-
* Functional Specification (TLFS):
6
-
* https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/reference/tlfs
7
-
*
8
-
* Copyright (C) 2021, Microsoft, Inc.
9
-
*
10
-
* Author : Michael Kelley <mikelley@microsoft.com>
11
-
*/
12
-
13
-
#ifndef _ASM_HYPERV_TLFS_H
14
-
#define _ASM_HYPERV_TLFS_H
15
-
16
-
#include <linux/types.h>
17
-
18
-
/*
19
-
* All data structures defined in the TLFS that are shared between Hyper-V
20
-
* and a guest VM use Little Endian byte ordering. This matches the default
21
-
* byte ordering of Linux running on ARM64, so no special handling is required.
22
-
*/
23
-
24
-
/*
25
-
* Group C Features. See the asm-generic version of hyperv-tlfs.h
26
-
* for a description of Feature Groups.
27
-
*/
28
-
29
-
/* Crash MSRs available */
30
-
#define HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE BIT(8)
31
-
32
-
/* STIMER direct mode is available */
33
-
#define HV_STIMER_DIRECT_MODE_AVAILABLE BIT(13)
34
-
35
-
/*
36
-
* To support arch-generic code calling hv_set/get_register:
37
-
* - On x86, HV_MSR_ indicates an MSR accessed via rdmsrl/wrmsrl
38
-
* - On ARM, HV_MSR_ indicates a VP register accessed via hypercall
39
-
*/
40
-
#define HV_MSR_CRASH_P0 (HV_REGISTER_GUEST_CRASH_P0)
41
-
#define HV_MSR_CRASH_P1 (HV_REGISTER_GUEST_CRASH_P1)
42
-
#define HV_MSR_CRASH_P2 (HV_REGISTER_GUEST_CRASH_P2)
43
-
#define HV_MSR_CRASH_P3 (HV_REGISTER_GUEST_CRASH_P3)
44
-
#define HV_MSR_CRASH_P4 (HV_REGISTER_GUEST_CRASH_P4)
45
-
#define HV_MSR_CRASH_CTL (HV_REGISTER_GUEST_CRASH_CTL)
46
-
47
-
#define HV_MSR_VP_INDEX (HV_REGISTER_VP_INDEX)
48
-
#define HV_MSR_TIME_REF_COUNT (HV_REGISTER_TIME_REF_COUNT)
49
-
#define HV_MSR_REFERENCE_TSC (HV_REGISTER_REFERENCE_TSC)
50
-
51
-
#define HV_MSR_SINT0 (HV_REGISTER_SINT0)
52
-
#define HV_MSR_SCONTROL (HV_REGISTER_SCONTROL)
53
-
#define HV_MSR_SIEFP (HV_REGISTER_SIEFP)
54
-
#define HV_MSR_SIMP (HV_REGISTER_SIMP)
55
-
#define HV_MSR_EOM (HV_REGISTER_EOM)
56
-
57
-
#define HV_MSR_STIMER0_CONFIG (HV_REGISTER_STIMER0_CONFIG)
58
-
#define HV_MSR_STIMER0_COUNT (HV_REGISTER_STIMER0_COUNT)
59
-
60
-
union hv_msi_entry {
61
-
u64 as_uint64[2];
62
-
struct {
63
-
u64 address;
64
-
u32 data;
65
-
u32 reserved;
66
-
} __packed;
67
-
};
68
-
69
-
#include <asm-generic/hyperv-tlfs.h>
70
-
71
-
#endif
+3
-4
arch/arm64/include/asm/mshyperv.h
+3
-4
arch/arm64/include/asm/mshyperv.h
···
6
6
* the ARM64 architecture. See include/asm-generic/mshyperv.h for
7
7
* definitions are that architecture independent.
8
8
*
9
-
* Definitions that are specified in the Hyper-V Top Level Functional
10
-
* Spec (TLFS) should not go in this file, but should instead go in
11
-
* hyperv-tlfs.h.
9
+
* Definitions that are derived from Hyper-V code or headers should not go in
10
+
* this file, but should instead go in the relevant files in include/hyperv.
12
11
*
13
12
* Copyright (C) 2021, Microsoft, Inc.
14
13
*
···
19
20
20
21
#include <linux/types.h>
21
22
#include <linux/arm-smccc.h>
22
-
#include <asm/hyperv-tlfs.h>
23
+
#include <hyperv/hvhdk.h>
23
24
24
25
/*
25
26
* Declare calls to get and set Hyper-V VP register values on ARM64, which
-1
arch/x86/hyperv/hv_apic.c
-1
arch/x86/hyperv/hv_apic.c
+11
-12
arch/x86/hyperv/hv_init.c
+11
-12
arch/x86/hyperv/hv_init.c
···
19
19
#include <asm/sev.h>
20
20
#include <asm/ibt.h>
21
21
#include <asm/hypervisor.h>
22
-
#include <asm/hyperv-tlfs.h>
22
+
#include <hyperv/hvhdk.h>
23
23
#include <asm/mshyperv.h>
24
24
#include <asm/idtentry.h>
25
25
#include <asm/set_memory.h>
···
27
27
#include <linux/version.h>
28
28
#include <linux/vmalloc.h>
29
29
#include <linux/mm.h>
30
-
#include <linux/hyperv.h>
31
30
#include <linux/slab.h>
32
31
#include <linux/kernel.h>
33
32
#include <linux/cpuhotplug.h>
···
415
416
static u8 __init get_vtl(void)
416
417
{
417
418
u64 control = HV_HYPERCALL_REP_COMP_1 | HVCALL_GET_VP_REGISTERS;
418
-
struct hv_get_vp_registers_input *input;
419
-
struct hv_get_vp_registers_output *output;
419
+
struct hv_input_get_vp_registers *input;
420
+
struct hv_output_get_vp_registers *output;
420
421
unsigned long flags;
421
422
u64 ret;
422
423
423
424
local_irq_save(flags);
424
425
input = *this_cpu_ptr(hyperv_pcpu_input_arg);
425
-
output = (struct hv_get_vp_registers_output *)input;
426
+
output = *this_cpu_ptr(hyperv_pcpu_output_arg);
426
427
427
-
memset(input, 0, struct_size(input, element, 1));
428
-
input->header.partitionid = HV_PARTITION_ID_SELF;
429
-
input->header.vpindex = HV_VP_INDEX_SELF;
430
-
input->header.inputvtl = 0;
431
-
input->element[0].name0 = HV_X64_REGISTER_VSM_VP_STATUS;
428
+
memset(input, 0, struct_size(input, names, 1));
429
+
input->partition_id = HV_PARTITION_ID_SELF;
430
+
input->vp_index = HV_VP_INDEX_SELF;
431
+
input->input_vtl.as_uint8 = 0;
432
+
input->names[0] = HV_REGISTER_VSM_VP_STATUS;
432
433
433
434
ret = hv_do_hypercall(control, input, output);
434
435
if (hv_result_success(ret)) {
435
-
ret = output->as64.low & HV_X64_VTL_MASK;
436
+
ret = output->values[0].reg8 & HV_X64_VTL_MASK;
436
437
} else {
437
438
pr_err("Failed to get VTL(error: %lld) exiting...\n", ret);
438
439
BUG();
···
472
473
if (hv_isolation_type_tdx())
473
474
hv_vp_assist_page = NULL;
474
475
else
475
-
hv_vp_assist_page = kcalloc(num_possible_cpus(),
476
+
hv_vp_assist_page = kcalloc(nr_cpu_ids,
476
477
sizeof(*hv_vp_assist_page),
477
478
GFP_KERNEL);
478
479
if (!hv_vp_assist_page) {
+1
-2
arch/x86/hyperv/hv_proc.c
+1
-2
arch/x86/hyperv/hv_proc.c
···
3
3
#include <linux/vmalloc.h>
4
4
#include <linux/mm.h>
5
5
#include <linux/clockchips.h>
6
-
#include <linux/hyperv.h>
7
6
#include <linux/slab.h>
8
7
#include <linux/cpuhotplug.h>
9
8
#include <linux/minmax.h>
···
176
177
input->partition_id = partition_id;
177
178
input->vp_index = vp_index;
178
179
input->flags = flags;
179
-
input->subnode_type = HvSubnodeAny;
180
+
input->subnode_type = HV_SUBNODE_ANY;
180
181
input->proximity_domain_info = hv_numa_node_to_pxm_info(node);
181
182
status = hv_do_hypercall(HVCALL_CREATE_VP, input, NULL);
182
183
local_irq_restore(irq_flags);
+1
-1
arch/x86/hyperv/hv_vtl.c
+1
-1
arch/x86/hyperv/hv_vtl.c
···
189
189
input->partition_id = HV_PARTITION_ID_SELF;
190
190
input->apic_ids[0] = apic_id;
191
191
192
-
output = (u32 *)input;
192
+
output = *this_cpu_ptr(hyperv_pcpu_output_arg);
193
193
194
194
control = HV_HYPERCALL_REP_COMP_1 | HVCALL_GET_VP_ID_FROM_APIC_ID;
195
195
status = hv_do_hypercall(control, input, output);
-1
arch/x86/hyperv/ivm.c
-1
arch/x86/hyperv/ivm.c
-1
arch/x86/hyperv/mmu.c
-1
arch/x86/hyperv/mmu.c
+1
-1
arch/x86/hyperv/nested.c
+1
-1
arch/x86/hyperv/nested.c
-811
arch/x86/include/asm/hyperv-tlfs.h
-811
arch/x86/include/asm/hyperv-tlfs.h
···
1
-
/* SPDX-License-Identifier: GPL-2.0 */
2
-
3
-
/*
4
-
* This file contains definitions from Hyper-V Hypervisor Top-Level Functional
5
-
* Specification (TLFS):
6
-
* https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/reference/tlfs
7
-
*/
8
-
9
-
#ifndef _ASM_X86_HYPERV_TLFS_H
10
-
#define _ASM_X86_HYPERV_TLFS_H
11
-
12
-
#include <linux/types.h>
13
-
#include <asm/page.h>
14
-
/*
15
-
* The below CPUID leaves are present if VersionAndFeatures.HypervisorPresent
16
-
* is set by CPUID(HvCpuIdFunctionVersionAndFeatures).
17
-
*/
18
-
#define HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS 0x40000000
19
-
#define HYPERV_CPUID_INTERFACE 0x40000001
20
-
#define HYPERV_CPUID_VERSION 0x40000002
21
-
#define HYPERV_CPUID_FEATURES 0x40000003
22
-
#define HYPERV_CPUID_ENLIGHTMENT_INFO 0x40000004
23
-
#define HYPERV_CPUID_IMPLEMENT_LIMITS 0x40000005
24
-
#define HYPERV_CPUID_CPU_MANAGEMENT_FEATURES 0x40000007
25
-
#define HYPERV_CPUID_NESTED_FEATURES 0x4000000A
26
-
#define HYPERV_CPUID_ISOLATION_CONFIG 0x4000000C
27
-
28
-
#define HYPERV_CPUID_VIRT_STACK_INTERFACE 0x40000081
29
-
#define HYPERV_VS_INTERFACE_EAX_SIGNATURE 0x31235356 /* "VS#1" */
30
-
31
-
#define HYPERV_CPUID_VIRT_STACK_PROPERTIES 0x40000082
32
-
/* Support for the extended IOAPIC RTE format */
33
-
#define HYPERV_VS_PROPERTIES_EAX_EXTENDED_IOAPIC_RTE BIT(2)
34
-
35
-
#define HYPERV_HYPERVISOR_PRESENT_BIT 0x80000000
36
-
#define HYPERV_CPUID_MIN 0x40000005
37
-
#define HYPERV_CPUID_MAX 0x4000ffff
38
-
39
-
/*
40
-
* Group D Features. The bit assignments are custom to each architecture.
41
-
* On x86/x64 these are HYPERV_CPUID_FEATURES.EDX bits.
42
-
*/
43
-
/* The MWAIT instruction is available (per section MONITOR / MWAIT) */
44
-
#define HV_X64_MWAIT_AVAILABLE BIT(0)
45
-
/* Guest debugging support is available */
46
-
#define HV_X64_GUEST_DEBUGGING_AVAILABLE BIT(1)
47
-
/* Performance Monitor support is available*/
48
-
#define HV_X64_PERF_MONITOR_AVAILABLE BIT(2)
49
-
/* Support for physical CPU dynamic partitioning events is available*/
50
-
#define HV_X64_CPU_DYNAMIC_PARTITIONING_AVAILABLE BIT(3)
51
-
/*
52
-
* Support for passing hypercall input parameter block via XMM
53
-
* registers is available
54
-
*/
55
-
#define HV_X64_HYPERCALL_XMM_INPUT_AVAILABLE BIT(4)
56
-
/* Support for a virtual guest idle state is available */
57
-
#define HV_X64_GUEST_IDLE_STATE_AVAILABLE BIT(5)
58
-
/* Frequency MSRs available */
59
-
#define HV_FEATURE_FREQUENCY_MSRS_AVAILABLE BIT(8)
60
-
/* Crash MSR available */
61
-
#define HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE BIT(10)
62
-
/* Support for debug MSRs available */
63
-
#define HV_FEATURE_DEBUG_MSRS_AVAILABLE BIT(11)
64
-
/* Support for extended gva ranges for flush hypercalls available */
65
-
#define HV_FEATURE_EXT_GVA_RANGES_FLUSH BIT(14)
66
-
/*
67
-
* Support for returning hypercall output block via XMM
68
-
* registers is available
69
-
*/
70
-
#define HV_X64_HYPERCALL_XMM_OUTPUT_AVAILABLE BIT(15)
71
-
/* stimer Direct Mode is available */
72
-
#define HV_STIMER_DIRECT_MODE_AVAILABLE BIT(19)
73
-
74
-
/*
75
-
* Implementation recommendations. Indicates which behaviors the hypervisor
76
-
* recommends the OS implement for optimal performance.
77
-
* These are HYPERV_CPUID_ENLIGHTMENT_INFO.EAX bits.
78
-
*/
79
-
/*
80
-
* Recommend using hypercall for address space switches rather
81
-
* than MOV to CR3 instruction
82
-
*/
83
-
#define HV_X64_AS_SWITCH_RECOMMENDED BIT(0)
84
-
/* Recommend using hypercall for local TLB flushes rather
85
-
* than INVLPG or MOV to CR3 instructions */
86
-
#define HV_X64_LOCAL_TLB_FLUSH_RECOMMENDED BIT(1)
87
-
/*
88
-
* Recommend using hypercall for remote TLB flushes rather
89
-
* than inter-processor interrupts
90
-
*/
91
-
#define HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED BIT(2)
92
-
/*
93
-
* Recommend using MSRs for accessing APIC registers
94
-
* EOI, ICR and TPR rather than their memory-mapped counterparts
95
-
*/
96
-
#define HV_X64_APIC_ACCESS_RECOMMENDED BIT(3)
97
-
/* Recommend using the hypervisor-provided MSR to initiate a system RESET */
98
-
#define HV_X64_SYSTEM_RESET_RECOMMENDED BIT(4)
99
-
/*
100
-
* Recommend using relaxed timing for this partition. If used,
101
-
* the VM should disable any watchdog timeouts that rely on the
102
-
* timely delivery of external interrupts
103
-
*/
104
-
#define HV_X64_RELAXED_TIMING_RECOMMENDED BIT(5)
105
-
106
-
/*
107
-
* Recommend not using Auto End-Of-Interrupt feature
108
-
*/
109
-
#define HV_DEPRECATING_AEOI_RECOMMENDED BIT(9)
110
-
111
-
/*
112
-
* Recommend using cluster IPI hypercalls.
113
-
*/
114
-
#define HV_X64_CLUSTER_IPI_RECOMMENDED BIT(10)
115
-
116
-
/* Recommend using the newer ExProcessorMasks interface */
117
-
#define HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED BIT(11)
118
-
119
-
/* Indicates that the hypervisor is nested within a Hyper-V partition. */
120
-
#define HV_X64_HYPERV_NESTED BIT(12)
121
-
122
-
/* Recommend using enlightened VMCS */
123
-
#define HV_X64_ENLIGHTENED_VMCS_RECOMMENDED BIT(14)
124
-
125
-
/* Use hypercalls for MMIO config space access */
126
-
#define HV_X64_USE_MMIO_HYPERCALLS BIT(21)
127
-
128
-
/*
129
-
* CPU management features identification.
130
-
* These are HYPERV_CPUID_CPU_MANAGEMENT_FEATURES.EAX bits.
131
-
*/
132
-
#define HV_X64_START_LOGICAL_PROCESSOR BIT(0)
133
-
#define HV_X64_CREATE_ROOT_VIRTUAL_PROCESSOR BIT(1)
134
-
#define HV_X64_PERFORMANCE_COUNTER_SYNC BIT(2)
135
-
#define HV_X64_RESERVED_IDENTITY_BIT BIT(31)
136
-
137
-
/*
138
-
* Virtual processor will never share a physical core with another virtual
139
-
* processor, except for virtual processors that are reported as sibling SMT
140
-
* threads.
141
-
*/
142
-
#define HV_X64_NO_NONARCH_CORESHARING BIT(18)
143
-
144
-
/* Nested features. These are HYPERV_CPUID_NESTED_FEATURES.EAX bits. */
145
-
#define HV_X64_NESTED_DIRECT_FLUSH BIT(17)
146
-
#define HV_X64_NESTED_GUEST_MAPPING_FLUSH BIT(18)
147
-
#define HV_X64_NESTED_MSR_BITMAP BIT(19)
148
-
149
-
/* Nested features #2. These are HYPERV_CPUID_NESTED_FEATURES.EBX bits. */
150
-
#define HV_X64_NESTED_EVMCS1_PERF_GLOBAL_CTRL BIT(0)
151
-
152
-
/*
153
-
* This is specific to AMD and specifies that enlightened TLB flush is
154
-
* supported. If guest opts in to this feature, ASID invalidations only
155
-
* flushes gva -> hpa mapping entries. To flush the TLB entries derived
156
-
* from NPT, hypercalls should be used (HvFlushGuestPhysicalAddressSpace
157
-
* or HvFlushGuestPhysicalAddressList).
158
-
*/
159
-
#define HV_X64_NESTED_ENLIGHTENED_TLB BIT(22)
160
-
161
-
/* HYPERV_CPUID_ISOLATION_CONFIG.EAX bits. */
162
-
#define HV_PARAVISOR_PRESENT BIT(0)
163
-
164
-
/* HYPERV_CPUID_ISOLATION_CONFIG.EBX bits. */
165
-
#define HV_ISOLATION_TYPE GENMASK(3, 0)
166
-
#define HV_SHARED_GPA_BOUNDARY_ACTIVE BIT(5)
167
-
#define HV_SHARED_GPA_BOUNDARY_BITS GENMASK(11, 6)
168
-
169
-
enum hv_isolation_type {
170
-
HV_ISOLATION_TYPE_NONE = 0,
171
-
HV_ISOLATION_TYPE_VBS = 1,
172
-
HV_ISOLATION_TYPE_SNP = 2,
173
-
HV_ISOLATION_TYPE_TDX = 3
174
-
};
175
-
176
-
/* Hyper-V specific model specific registers (MSRs) */
177
-
178
-
/* MSR used to identify the guest OS. */
179
-
#define HV_X64_MSR_GUEST_OS_ID 0x40000000
180
-
181
-
/* MSR used to setup pages used to communicate with the hypervisor. */
182
-
#define HV_X64_MSR_HYPERCALL 0x40000001
183
-
184
-
/* MSR used to provide vcpu index */
185
-
#define HV_X64_MSR_VP_INDEX 0x40000002
186
-
187
-
/* MSR used to reset the guest OS. */
188
-
#define HV_X64_MSR_RESET 0x40000003
189
-
190
-
/* MSR used to provide vcpu runtime in 100ns units */
191
-
#define HV_X64_MSR_VP_RUNTIME 0x40000010
192
-
193
-
/* MSR used to read the per-partition time reference counter */
194
-
#define HV_X64_MSR_TIME_REF_COUNT 0x40000020
195
-
196
-
/* A partition's reference time stamp counter (TSC) page */
197
-
#define HV_X64_MSR_REFERENCE_TSC 0x40000021
198
-
199
-
/* MSR used to retrieve the TSC frequency */
200
-
#define HV_X64_MSR_TSC_FREQUENCY 0x40000022
201
-
202
-
/* MSR used to retrieve the local APIC timer frequency */
203
-
#define HV_X64_MSR_APIC_FREQUENCY 0x40000023
204
-
205
-
/* Define the virtual APIC registers */
206
-
#define HV_X64_MSR_EOI 0x40000070
207
-
#define HV_X64_MSR_ICR 0x40000071
208
-
#define HV_X64_MSR_TPR 0x40000072
209
-
#define HV_X64_MSR_VP_ASSIST_PAGE 0x40000073
210
-
211
-
/* Define synthetic interrupt controller model specific registers. */
212
-
#define HV_X64_MSR_SCONTROL 0x40000080
213
-
#define HV_X64_MSR_SVERSION 0x40000081
214
-
#define HV_X64_MSR_SIEFP 0x40000082
215
-
#define HV_X64_MSR_SIMP 0x40000083
216
-
#define HV_X64_MSR_EOM 0x40000084
217
-
#define HV_X64_MSR_SINT0 0x40000090
218
-
#define HV_X64_MSR_SINT1 0x40000091
219
-
#define HV_X64_MSR_SINT2 0x40000092
220
-
#define HV_X64_MSR_SINT3 0x40000093
221
-
#define HV_X64_MSR_SINT4 0x40000094
222
-
#define HV_X64_MSR_SINT5 0x40000095
223
-
#define HV_X64_MSR_SINT6 0x40000096
224
-
#define HV_X64_MSR_SINT7 0x40000097
225
-
#define HV_X64_MSR_SINT8 0x40000098
226
-
#define HV_X64_MSR_SINT9 0x40000099
227
-
#define HV_X64_MSR_SINT10 0x4000009A
228
-
#define HV_X64_MSR_SINT11 0x4000009B
229
-
#define HV_X64_MSR_SINT12 0x4000009C
230
-
#define HV_X64_MSR_SINT13 0x4000009D
231
-
#define HV_X64_MSR_SINT14 0x4000009E
232
-
#define HV_X64_MSR_SINT15 0x4000009F
233
-
234
-
/*
235
-
* Define synthetic interrupt controller model specific registers for
236
-
* nested hypervisor.
237
-
*/
238
-
#define HV_X64_MSR_NESTED_SCONTROL 0x40001080
239
-
#define HV_X64_MSR_NESTED_SVERSION 0x40001081
240
-
#define HV_X64_MSR_NESTED_SIEFP 0x40001082
241
-
#define HV_X64_MSR_NESTED_SIMP 0x40001083
242
-
#define HV_X64_MSR_NESTED_EOM 0x40001084
243
-
#define HV_X64_MSR_NESTED_SINT0 0x40001090
244
-
245
-
/*
246
-
* Synthetic Timer MSRs. Four timers per vcpu.
247
-
*/
248
-
#define HV_X64_MSR_STIMER0_CONFIG 0x400000B0
249
-
#define HV_X64_MSR_STIMER0_COUNT 0x400000B1
250
-
#define HV_X64_MSR_STIMER1_CONFIG 0x400000B2
251
-
#define HV_X64_MSR_STIMER1_COUNT 0x400000B3
252
-
#define HV_X64_MSR_STIMER2_CONFIG 0x400000B4
253
-
#define HV_X64_MSR_STIMER2_COUNT 0x400000B5
254
-
#define HV_X64_MSR_STIMER3_CONFIG 0x400000B6
255
-
#define HV_X64_MSR_STIMER3_COUNT 0x400000B7
256
-
257
-
/* Hyper-V guest idle MSR */
258
-
#define HV_X64_MSR_GUEST_IDLE 0x400000F0
259
-
260
-
/* Hyper-V guest crash notification MSR's */
261
-
#define HV_X64_MSR_CRASH_P0 0x40000100
262
-
#define HV_X64_MSR_CRASH_P1 0x40000101
263
-
#define HV_X64_MSR_CRASH_P2 0x40000102
264
-
#define HV_X64_MSR_CRASH_P3 0x40000103
265
-
#define HV_X64_MSR_CRASH_P4 0x40000104
266
-
#define HV_X64_MSR_CRASH_CTL 0x40000105
267
-
268
-
/* TSC emulation after migration */
269
-
#define HV_X64_MSR_REENLIGHTENMENT_CONTROL 0x40000106
270
-
#define HV_X64_MSR_TSC_EMULATION_CONTROL 0x40000107
271
-
#define HV_X64_MSR_TSC_EMULATION_STATUS 0x40000108
272
-
273
-
/* TSC invariant control */
274
-
#define HV_X64_MSR_TSC_INVARIANT_CONTROL 0x40000118
275
-
276
-
/* HV_X64_MSR_TSC_INVARIANT_CONTROL bits */
277
-
#define HV_EXPOSE_INVARIANT_TSC BIT_ULL(0)
278
-
279
-
/*
280
-
* To support arch-generic code calling hv_set/get_register:
281
-
* - On x86, HV_MSR_ indicates an MSR accessed via rdmsrl/wrmsrl
282
-
* - On ARM, HV_MSR_ indicates a VP register accessed via hypercall
283
-
*/
284
-
#define HV_MSR_CRASH_P0 (HV_X64_MSR_CRASH_P0)
285
-
#define HV_MSR_CRASH_P1 (HV_X64_MSR_CRASH_P1)
286
-
#define HV_MSR_CRASH_P2 (HV_X64_MSR_CRASH_P2)
287
-
#define HV_MSR_CRASH_P3 (HV_X64_MSR_CRASH_P3)
288
-
#define HV_MSR_CRASH_P4 (HV_X64_MSR_CRASH_P4)
289
-
#define HV_MSR_CRASH_CTL (HV_X64_MSR_CRASH_CTL)
290
-
291
-
#define HV_MSR_VP_INDEX (HV_X64_MSR_VP_INDEX)
292
-
#define HV_MSR_TIME_REF_COUNT (HV_X64_MSR_TIME_REF_COUNT)
293
-
#define HV_MSR_REFERENCE_TSC (HV_X64_MSR_REFERENCE_TSC)
294
-
295
-
#define HV_MSR_SINT0 (HV_X64_MSR_SINT0)
296
-
#define HV_MSR_SVERSION (HV_X64_MSR_SVERSION)
297
-
#define HV_MSR_SCONTROL (HV_X64_MSR_SCONTROL)
298
-
#define HV_MSR_SIEFP (HV_X64_MSR_SIEFP)
299
-
#define HV_MSR_SIMP (HV_X64_MSR_SIMP)
300
-
#define HV_MSR_EOM (HV_X64_MSR_EOM)
301
-
302
-
#define HV_MSR_NESTED_SCONTROL (HV_X64_MSR_NESTED_SCONTROL)
303
-
#define HV_MSR_NESTED_SVERSION (HV_X64_MSR_NESTED_SVERSION)
304
-
#define HV_MSR_NESTED_SIEFP (HV_X64_MSR_NESTED_SIEFP)
305
-
#define HV_MSR_NESTED_SIMP (HV_X64_MSR_NESTED_SIMP)
306
-
#define HV_MSR_NESTED_EOM (HV_X64_MSR_NESTED_EOM)
307
-
#define HV_MSR_NESTED_SINT0 (HV_X64_MSR_NESTED_SINT0)
308
-
309
-
#define HV_MSR_STIMER0_CONFIG (HV_X64_MSR_STIMER0_CONFIG)
310
-
#define HV_MSR_STIMER0_COUNT (HV_X64_MSR_STIMER0_COUNT)
311
-
312
-
/*
313
-
* Registers are only accessible via HVCALL_GET_VP_REGISTERS hvcall and
314
-
* there is not associated MSR address.
315
-
*/
316
-
#define HV_X64_REGISTER_VSM_VP_STATUS 0x000D0003
317
-
#define HV_X64_VTL_MASK GENMASK(3, 0)
318
-
319
-
/* Hyper-V memory host visibility */
320
-
enum hv_mem_host_visibility {
321
-
VMBUS_PAGE_NOT_VISIBLE = 0,
322
-
VMBUS_PAGE_VISIBLE_READ_ONLY = 1,
323
-
VMBUS_PAGE_VISIBLE_READ_WRITE = 3
324
-
};
325
-
326
-
/* HvCallModifySparseGpaPageHostVisibility hypercall */
327
-
#define HV_MAX_MODIFY_GPA_REP_COUNT ((PAGE_SIZE / sizeof(u64)) - 2)
328
-
struct hv_gpa_range_for_visibility {
329
-
u64 partition_id;
330
-
u32 host_visibility:2;
331
-
u32 reserved0:30;
332
-
u32 reserved1;
333
-
u64 gpa_page_list[HV_MAX_MODIFY_GPA_REP_COUNT];
334
-
} __packed;
335
-
336
-
/*
337
-
* Declare the MSR used to setup pages used to communicate with the hypervisor.
338
-
*/
339
-
union hv_x64_msr_hypercall_contents {
340
-
u64 as_uint64;
341
-
struct {
342
-
u64 enable:1;
343
-
u64 reserved:11;
344
-
u64 guest_physical_address:52;
345
-
} __packed;
346
-
};
347
-
348
-
union hv_vp_assist_msr_contents {
349
-
u64 as_uint64;
350
-
struct {
351
-
u64 enable:1;
352
-
u64 reserved:11;
353
-
u64 pfn:52;
354
-
} __packed;
355
-
};
356
-
357
-
struct hv_reenlightenment_control {
358
-
__u64 vector:8;
359
-
__u64 reserved1:8;
360
-
__u64 enabled:1;
361
-
__u64 reserved2:15;
362
-
__u64 target_vp:32;
363
-
} __packed;
364
-
365
-
struct hv_tsc_emulation_control {
366
-
__u64 enabled:1;
367
-
__u64 reserved:63;
368
-
} __packed;
369
-
370
-
struct hv_tsc_emulation_status {
371
-
__u64 inprogress:1;
372
-
__u64 reserved:63;
373
-
} __packed;
374
-
375
-
#define HV_X64_MSR_HYPERCALL_ENABLE 0x00000001
376
-
#define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT 12
377
-
#define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_MASK \
378
-
(~((1ull << HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT) - 1))
379
-
380
-
#define HV_X64_MSR_CRASH_PARAMS \
381
-
(1 + (HV_X64_MSR_CRASH_P4 - HV_X64_MSR_CRASH_P0))
382
-
383
-
#define HV_IPI_LOW_VECTOR 0x10
384
-
#define HV_IPI_HIGH_VECTOR 0xff
385
-
386
-
#define HV_X64_MSR_VP_ASSIST_PAGE_ENABLE 0x00000001
387
-
#define HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT 12
388
-
#define HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_MASK \
389
-
(~((1ull << HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT) - 1))
390
-
391
-
/* Hyper-V Enlightened VMCS version mask in nested features CPUID */
392
-
#define HV_X64_ENLIGHTENED_VMCS_VERSION 0xff
393
-
394
-
#define HV_X64_MSR_TSC_REFERENCE_ENABLE 0x00000001
395
-
#define HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT 12
396
-
397
-
/* Number of XMM registers used in hypercall input/output */
398
-
#define HV_HYPERCALL_MAX_XMM_REGISTERS 6
399
-
400
-
struct hv_nested_enlightenments_control {
401
-
struct {
402
-
__u32 directhypercall:1;
403
-
__u32 reserved:31;
404
-
} features;
405
-
struct {
406
-
__u32 inter_partition_comm:1;
407
-
__u32 reserved:31;
408
-
} hypercallControls;
409
-
} __packed;
410
-
411
-
/* Define virtual processor assist page structure. */
412
-
struct hv_vp_assist_page {
413
-
__u32 apic_assist;
414
-
__u32 reserved1;
415
-
__u32 vtl_entry_reason;
416
-
__u32 vtl_reserved;
417
-
__u64 vtl_ret_x64rax;
418
-
__u64 vtl_ret_x64rcx;
419
-
struct hv_nested_enlightenments_control nested_control;
420
-
__u8 enlighten_vmentry;
421
-
__u8 reserved2[7];
422
-
__u64 current_nested_vmcs;
423
-
__u8 synthetic_time_unhalted_timer_expired;
424
-
__u8 reserved3[7];
425
-
__u8 virtualization_fault_information[40];
426
-
__u8 reserved4[8];
427
-
__u8 intercept_message[256];
428
-
__u8 vtl_ret_actions[256];
429
-
} __packed;
430
-
431
-
struct hv_enlightened_vmcs {
432
-
u32 revision_id;
433
-
u32 abort;
434
-
435
-
u16 host_es_selector;
436
-
u16 host_cs_selector;
437
-
u16 host_ss_selector;
438
-
u16 host_ds_selector;
439
-
u16 host_fs_selector;
440
-
u16 host_gs_selector;
441
-
u16 host_tr_selector;
442
-
443
-
u16 padding16_1;
444
-
445
-
u64 host_ia32_pat;
446
-
u64 host_ia32_efer;
447
-
448
-
u64 host_cr0;
449
-
u64 host_cr3;
450
-
u64 host_cr4;
451
-
452
-
u64 host_ia32_sysenter_esp;
453
-
u64 host_ia32_sysenter_eip;
454
-
u64 host_rip;
455
-
u32 host_ia32_sysenter_cs;
456
-
457
-
u32 pin_based_vm_exec_control;
458
-
u32 vm_exit_controls;
459
-
u32 secondary_vm_exec_control;
460
-
461
-
u64 io_bitmap_a;
462
-
u64 io_bitmap_b;
463
-
u64 msr_bitmap;
464
-
465
-
u16 guest_es_selector;
466
-
u16 guest_cs_selector;
467
-
u16 guest_ss_selector;
468
-
u16 guest_ds_selector;
469
-
u16 guest_fs_selector;
470
-
u16 guest_gs_selector;
471
-
u16 guest_ldtr_selector;
472
-
u16 guest_tr_selector;
473
-
474
-
u32 guest_es_limit;
475
-
u32 guest_cs_limit;
476
-
u32 guest_ss_limit;
477
-
u32 guest_ds_limit;
478
-
u32 guest_fs_limit;
479
-
u32 guest_gs_limit;
480
-
u32 guest_ldtr_limit;
481
-
u32 guest_tr_limit;
482
-
u32 guest_gdtr_limit;
483
-
u32 guest_idtr_limit;
484
-
485
-
u32 guest_es_ar_bytes;
486
-
u32 guest_cs_ar_bytes;
487
-
u32 guest_ss_ar_bytes;
488
-
u32 guest_ds_ar_bytes;
489
-
u32 guest_fs_ar_bytes;
490
-
u32 guest_gs_ar_bytes;
491
-
u32 guest_ldtr_ar_bytes;
492
-
u32 guest_tr_ar_bytes;
493
-
494
-
u64 guest_es_base;
495
-
u64 guest_cs_base;
496
-
u64 guest_ss_base;
497
-
u64 guest_ds_base;
498
-
u64 guest_fs_base;
499
-
u64 guest_gs_base;
500
-
u64 guest_ldtr_base;
501
-
u64 guest_tr_base;
502
-
u64 guest_gdtr_base;
503
-
u64 guest_idtr_base;
504
-
505
-
u64 padding64_1[3];
506
-
507
-
u64 vm_exit_msr_store_addr;
508
-
u64 vm_exit_msr_load_addr;
509
-
u64 vm_entry_msr_load_addr;
510
-
511
-
u64 cr3_target_value0;
512
-
u64 cr3_target_value1;
513
-
u64 cr3_target_value2;
514
-
u64 cr3_target_value3;
515
-
516
-
u32 page_fault_error_code_mask;
517
-
u32 page_fault_error_code_match;
518
-
519
-
u32 cr3_target_count;
520
-
u32 vm_exit_msr_store_count;
521
-
u32 vm_exit_msr_load_count;
522
-
u32 vm_entry_msr_load_count;
523
-
524
-
u64 tsc_offset;
525
-
u64 virtual_apic_page_addr;
526
-
u64 vmcs_link_pointer;
527
-
528
-
u64 guest_ia32_debugctl;
529
-
u64 guest_ia32_pat;
530
-
u64 guest_ia32_efer;
531
-
532
-
u64 guest_pdptr0;
533
-
u64 guest_pdptr1;
534
-
u64 guest_pdptr2;
535
-
u64 guest_pdptr3;
536
-
537
-
u64 guest_pending_dbg_exceptions;
538
-
u64 guest_sysenter_esp;
539
-
u64 guest_sysenter_eip;
540
-
541
-
u32 guest_activity_state;
542
-
u32 guest_sysenter_cs;
543
-
544
-
u64 cr0_guest_host_mask;
545
-
u64 cr4_guest_host_mask;
546
-
u64 cr0_read_shadow;
547
-
u64 cr4_read_shadow;
548
-
u64 guest_cr0;
549
-
u64 guest_cr3;
550
-
u64 guest_cr4;
551
-
u64 guest_dr7;
552
-
553
-
u64 host_fs_base;
554
-
u64 host_gs_base;
555
-
u64 host_tr_base;
556
-
u64 host_gdtr_base;
557
-
u64 host_idtr_base;
558
-
u64 host_rsp;
559
-
560
-
u64 ept_pointer;
561
-
562
-
u16 virtual_processor_id;
563
-
u16 padding16_2[3];
564
-
565
-
u64 padding64_2[5];
566
-
u64 guest_physical_address;
567
-
568
-
u32 vm_instruction_error;
569
-
u32 vm_exit_reason;
570
-
u32 vm_exit_intr_info;
571
-
u32 vm_exit_intr_error_code;
572
-
u32 idt_vectoring_info_field;
573
-
u32 idt_vectoring_error_code;
574
-
u32 vm_exit_instruction_len;
575
-
u32 vmx_instruction_info;
576
-
577
-
u64 exit_qualification;
578
-
u64 exit_io_instruction_ecx;
579
-
u64 exit_io_instruction_esi;
580
-
u64 exit_io_instruction_edi;
581
-
u64 exit_io_instruction_eip;
582
-
583
-
u64 guest_linear_address;
584
-
u64 guest_rsp;
585
-
u64 guest_rflags;
586
-
587
-
u32 guest_interruptibility_info;
588
-
u32 cpu_based_vm_exec_control;
589
-
u32 exception_bitmap;
590
-
u32 vm_entry_controls;
591
-
u32 vm_entry_intr_info_field;
592
-
u32 vm_entry_exception_error_code;
593
-
u32 vm_entry_instruction_len;
594
-
u32 tpr_threshold;
595
-
596
-
u64 guest_rip;
597
-
598
-
u32 hv_clean_fields;
599
-
u32 padding32_1;
600
-
u32 hv_synthetic_controls;
601
-
struct {
602
-
u32 nested_flush_hypercall:1;
603
-
u32 msr_bitmap:1;
604
-
u32 reserved:30;
605
-
} __packed hv_enlightenments_control;
606
-
u32 hv_vp_id;
607
-
u32 padding32_2;
608
-
u64 hv_vm_id;
609
-
u64 partition_assist_page;
610
-
u64 padding64_4[4];
611
-
u64 guest_bndcfgs;
612
-
u64 guest_ia32_perf_global_ctrl;
613
-
u64 guest_ia32_s_cet;
614
-
u64 guest_ssp;
615
-
u64 guest_ia32_int_ssp_table_addr;
616
-
u64 guest_ia32_lbr_ctl;
617
-
u64 padding64_5[2];
618
-
u64 xss_exit_bitmap;
619
-
u64 encls_exiting_bitmap;
620
-
u64 host_ia32_perf_global_ctrl;
621
-
u64 tsc_multiplier;
622
-
u64 host_ia32_s_cet;
623
-
u64 host_ssp;
624
-
u64 host_ia32_int_ssp_table_addr;
625
-
u64 padding64_6;
626
-
} __packed;
627
-
628
-
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE 0
629
-
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_IO_BITMAP BIT(0)
630
-
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_MSR_BITMAP BIT(1)
631
-
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_GRP2 BIT(2)
632
-
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_GRP1 BIT(3)
633
-
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_PROC BIT(4)
634
-
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_EVENT BIT(5)
635
-
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_ENTRY BIT(6)
636
-
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_EXCPN BIT(7)
637
-
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CRDR BIT(8)
638
-
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_XLAT BIT(9)
639
-
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_BASIC BIT(10)
640
-
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP1 BIT(11)
641
-
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2 BIT(12)
642
-
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_POINTER BIT(13)
643
-
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_GRP1 BIT(14)
644
-
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_ENLIGHTENMENTSCONTROL BIT(15)
645
-
646
-
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_ALL 0xFFFF
647
-
648
-
/*
649
-
* Note, Hyper-V isn't actually stealing bit 28 from Intel, just abusing it by
650
-
* pairing it with architecturally impossible exit reasons. Bit 28 is set only
651
-
* on SMI exits to a SMI transfer monitor (STM) and if and only if a MTF VM-Exit
652
-
* is pending. I.e. it will never be set by hardware for non-SMI exits (there
653
-
* are only three), nor will it ever be set unless the VMM is an STM.
654
-
*/
655
-
#define HV_VMX_SYNTHETIC_EXIT_REASON_TRAP_AFTER_FLUSH 0x10000031
656
-
657
-
/*
658
-
* Hyper-V uses the software reserved 32 bytes in VMCB control area to expose
659
-
* SVM enlightenments to guests.
660
-
*/
661
-
struct hv_vmcb_enlightenments {
662
-
struct __packed hv_enlightenments_control {
663
-
u32 nested_flush_hypercall:1;
664
-
u32 msr_bitmap:1;
665
-
u32 enlightened_npt_tlb: 1;
666
-
u32 reserved:29;
667
-
} __packed hv_enlightenments_control;
668
-
u32 hv_vp_id;
669
-
u64 hv_vm_id;
670
-
u64 partition_assist_page;
671
-
u64 reserved;
672
-
} __packed;
673
-
674
-
/*
675
-
* Hyper-V uses the software reserved clean bit in VMCB.
676
-
*/
677
-
#define HV_VMCB_NESTED_ENLIGHTENMENTS 31
678
-
679
-
/* Synthetic VM-Exit */
680
-
#define HV_SVM_EXITCODE_ENL 0xf0000000
681
-
#define HV_SVM_ENL_EXITCODE_TRAP_AFTER_FLUSH (1)
682
-
683
-
struct hv_partition_assist_pg {
684
-
u32 tlb_lock_count;
685
-
};
686
-
687
-
enum hv_interrupt_type {
688
-
HV_X64_INTERRUPT_TYPE_FIXED = 0x0000,
689
-
HV_X64_INTERRUPT_TYPE_LOWESTPRIORITY = 0x0001,
690
-
HV_X64_INTERRUPT_TYPE_SMI = 0x0002,
691
-
HV_X64_INTERRUPT_TYPE_REMOTEREAD = 0x0003,
692
-
HV_X64_INTERRUPT_TYPE_NMI = 0x0004,
693
-
HV_X64_INTERRUPT_TYPE_INIT = 0x0005,
694
-
HV_X64_INTERRUPT_TYPE_SIPI = 0x0006,
695
-
HV_X64_INTERRUPT_TYPE_EXTINT = 0x0007,
696
-
HV_X64_INTERRUPT_TYPE_LOCALINT0 = 0x0008,
697
-
HV_X64_INTERRUPT_TYPE_LOCALINT1 = 0x0009,
698
-
HV_X64_INTERRUPT_TYPE_MAXIMUM = 0x000A,
699
-
};
700
-
701
-
union hv_msi_address_register {
702
-
u32 as_uint32;
703
-
struct {
704
-
u32 reserved1:2;
705
-
u32 destination_mode:1;
706
-
u32 redirection_hint:1;
707
-
u32 reserved2:8;
708
-
u32 destination_id:8;
709
-
u32 msi_base:12;
710
-
};
711
-
} __packed;
712
-
713
-
union hv_msi_data_register {
714
-
u32 as_uint32;
715
-
struct {
716
-
u32 vector:8;
717
-
u32 delivery_mode:3;
718
-
u32 reserved1:3;
719
-
u32 level_assert:1;
720
-
u32 trigger_mode:1;
721
-
u32 reserved2:16;
722
-
};
723
-
} __packed;
724
-
725
-
/* HvRetargetDeviceInterrupt hypercall */
726
-
union hv_msi_entry {
727
-
u64 as_uint64;
728
-
struct {
729
-
union hv_msi_address_register address;
730
-
union hv_msi_data_register data;
731
-
} __packed;
732
-
};
733
-
734
-
struct hv_x64_segment_register {
735
-
u64 base;
736
-
u32 limit;
737
-
u16 selector;
738
-
union {
739
-
struct {
740
-
u16 segment_type : 4;
741
-
u16 non_system_segment : 1;
742
-
u16 descriptor_privilege_level : 2;
743
-
u16 present : 1;
744
-
u16 reserved : 4;
745
-
u16 available : 1;
746
-
u16 _long : 1;
747
-
u16 _default : 1;
748
-
u16 granularity : 1;
749
-
} __packed;
750
-
u16 attributes;
751
-
};
752
-
} __packed;
753
-
754
-
struct hv_x64_table_register {
755
-
u16 pad[3];
756
-
u16 limit;
757
-
u64 base;
758
-
} __packed;
759
-
760
-
struct hv_init_vp_context {
761
-
u64 rip;
762
-
u64 rsp;
763
-
u64 rflags;
764
-
765
-
struct hv_x64_segment_register cs;
766
-
struct hv_x64_segment_register ds;
767
-
struct hv_x64_segment_register es;
768
-
struct hv_x64_segment_register fs;
769
-
struct hv_x64_segment_register gs;
770
-
struct hv_x64_segment_register ss;
771
-
struct hv_x64_segment_register tr;
772
-
struct hv_x64_segment_register ldtr;
773
-
774
-
struct hv_x64_table_register idtr;
775
-
struct hv_x64_table_register gdtr;
776
-
777
-
u64 efer;
778
-
u64 cr0;
779
-
u64 cr3;
780
-
u64 cr4;
781
-
u64 msr_cr_pat;
782
-
} __packed;
783
-
784
-
union hv_input_vtl {
785
-
u8 as_uint8;
786
-
struct {
787
-
u8 target_vtl: 4;
788
-
u8 use_target_vtl: 1;
789
-
u8 reserved_z: 3;
790
-
};
791
-
} __packed;
792
-
793
-
struct hv_enable_vp_vtl {
794
-
u64 partition_id;
795
-
u32 vp_index;
796
-
union hv_input_vtl target_vtl;
797
-
u8 mbz0;
798
-
u16 mbz1;
799
-
struct hv_init_vp_context vp_context;
800
-
} __packed;
801
-
802
-
struct hv_get_vp_from_apic_id_in {
803
-
u64 partition_id;
804
-
union hv_input_vtl target_vtl;
805
-
u8 res[7];
806
-
u32 apic_ids[];
807
-
} __packed;
808
-
809
-
#include <asm-generic/hyperv-tlfs.h>
810
-
811
-
#endif
+1
-2
arch/x86/include/asm/kvm_host.h
+1
-2
arch/x86/include/asm/kvm_host.h
···
24
24
#include <linux/pvclock_gtod.h>
25
25
#include <linux/clocksource.h>
26
26
#include <linux/irqbypass.h>
27
-
#include <linux/hyperv.h>
28
27
#include <linux/kfifo.h>
29
28
#include <linux/sched/vhost_task.h>
30
29
···
35
36
#include <asm/asm.h>
36
37
#include <asm/kvm_page_track.h>
37
38
#include <asm/kvm_vcpu_regs.h>
38
-
#include <asm/hyperv-tlfs.h>
39
39
#include <asm/reboot.h>
40
+
#include <hyperv/hvhdk.h>
40
41
41
42
#define __KVM_HAVE_ARCH_VCPU_DEBUGFS
42
43
+1
-2
arch/x86/include/asm/mshyperv.h
+1
-2
arch/x86/include/asm/mshyperv.h
···
6
6
#include <linux/nmi.h>
7
7
#include <linux/msi.h>
8
8
#include <linux/io.h>
9
-
#include <asm/hyperv-tlfs.h>
10
9
#include <asm/nospec-branch.h>
11
10
#include <asm/paravirt.h>
12
-
#include <asm/mshyperv.h>
11
+
#include <hyperv/hvhdk.h>
13
12
14
13
/*
15
14
* Hyper-V always provides a single IO-APIC at this MMIO address.
+1
-1
arch/x86/include/asm/svm.h
+1
-1
arch/x86/include/asm/svm.h
+1
-1
arch/x86/kernel/cpu/mshyperv.c
+1
-1
arch/x86/kernel/cpu/mshyperv.c
+1
-1
arch/x86/kvm/vmx/hyperv_evmcs.h
+1
-1
arch/x86/kvm/vmx/hyperv_evmcs.h
+1
-1
arch/x86/kvm/vmx/vmx_onhyperv.h
+1
-1
arch/x86/kvm/vmx/vmx_onhyperv.h
-2
arch/x86/mm/pat/set_memory.c
-2
arch/x86/mm/pat/set_memory.c
+1
-1
drivers/clocksource/hyperv_timer.c
+1
-1
drivers/clocksource/hyperv_timer.c
+46
-15
drivers/hv/channel_mgmt.c
+46
-15
drivers/hv/channel_mgmt.c
···
944
944
vmbus_wait_for_unload();
945
945
}
946
946
947
-
static void check_ready_for_resume_event(void)
948
-
{
949
-
/*
950
-
* If all the old primary channels have been fixed up, then it's safe
951
-
* to resume.
952
-
*/
953
-
if (atomic_dec_and_test(&vmbus_connection.nr_chan_fixup_on_resume))
954
-
complete(&vmbus_connection.ready_for_resume_event);
955
-
}
956
-
957
947
static void vmbus_setup_channel_state(struct vmbus_channel *channel,
958
948
struct vmbus_channel_offer_channel *offer)
959
949
{
···
1099
1109
1100
1110
/* Add the channel back to the array of channels. */
1101
1111
vmbus_channel_map_relid(oldchannel);
1102
-
check_ready_for_resume_event();
1103
-
1104
1112
mutex_unlock(&vmbus_connection.channel_mutex);
1105
1113
return;
1106
1114
}
···
1284
1296
1285
1297
/*
1286
1298
* vmbus_onoffers_delivered -
1287
-
* This is invoked when all offers have been delivered.
1299
+
* The CHANNELMSG_ALLOFFERS_DELIVERED message arrives after all
1300
+
* boot-time offers are delivered. A boot-time offer is for the primary
1301
+
* channel for any virtual hardware configured in the VM at the time it boots.
1302
+
* Boot-time offers include offers for physical devices assigned to the VM
1303
+
* via Hyper-V's Discrete Device Assignment (DDA) functionality that are
1304
+
* handled as virtual PCI devices in Linux (e.g., NVMe devices and GPUs).
1305
+
* Boot-time offers do not include offers for VMBus sub-channels. Because
1306
+
* devices can be hot-added to the VM after it is booted, additional channel
1307
+
* offers that aren't boot-time offers can be received at any time after the
1308
+
* all-offers-delivered message.
1288
1309
*
1289
-
* Nothing to do here.
1310
+
* SR-IOV NIC Virtual Functions (VFs) assigned to a VM are not considered
1311
+
* to be assigned to the VM at boot-time, and offers for VFs may occur after
1312
+
* the all-offers-delivered message. VFs are optional accelerators to the
1313
+
* synthetic VMBus NIC and are effectively hot-added only after the VMBus
1314
+
* NIC channel is opened (once it knows the guest can support it, via the
1315
+
* sriov bit in the netvsc protocol).
1290
1316
*/
1291
1317
static void vmbus_onoffers_delivered(
1292
1318
struct vmbus_channel_message_header *hdr)
1293
1319
{
1320
+
complete(&vmbus_connection.all_offers_delivered_event);
1294
1321
}
1295
1322
1296
1323
/*
···
1581
1578
}
1582
1579
1583
1580
/*
1584
-
* vmbus_request_offers - Send a request to get all our pending offers.
1581
+
* vmbus_request_offers - Send a request to get all our pending offers
1582
+
* and wait for all boot-time offers to arrive.
1585
1583
*/
1586
1584
int vmbus_request_offers(void)
1587
1585
{
···
1600
1596
1601
1597
msg->msgtype = CHANNELMSG_REQUESTOFFERS;
1602
1598
1599
+
/*
1600
+
* This REQUESTOFFERS message will result in the host sending an all
1601
+
* offers delivered message after all the boot-time offers are sent.
1602
+
*/
1603
1603
ret = vmbus_post_msg(msg, sizeof(struct vmbus_channel_message_header),
1604
1604
true);
1605
1605
···
1614
1606
1615
1607
goto cleanup;
1616
1608
}
1609
+
1610
+
/*
1611
+
* Wait for the host to send all boot-time offers.
1612
+
* Keeping it as a best-effort mechanism, where a warning is
1613
+
* printed if a timeout occurs, and execution is resumed.
1614
+
*/
1615
+
if (!wait_for_completion_timeout(&vmbus_connection.all_offers_delivered_event,
1616
+
secs_to_jiffies(60))) {
1617
+
pr_warn("timed out waiting for all boot-time offers to be delivered.\n");
1618
+
}
1619
+
1620
+
/*
1621
+
* Flush handling of offer messages (which may initiate work on
1622
+
* other work queues).
1623
+
*/
1624
+
flush_workqueue(vmbus_connection.work_queue);
1625
+
1626
+
/*
1627
+
* Flush workqueue for processing the incoming offers. Subchannel
1628
+
* offers and their processing can happen later, so there is no need to
1629
+
* flush that workqueue here.
1630
+
*/
1631
+
flush_workqueue(vmbus_connection.handle_primary_chan_wq);
1617
1632
1618
1633
cleanup:
1619
1634
kfree(msginfo);
+2
-2
drivers/hv/connection.c
+2
-2
drivers/hv/connection.c
···
34
34
35
35
.ready_for_suspend_event = COMPLETION_INITIALIZER(
36
36
vmbus_connection.ready_for_suspend_event),
37
-
.ready_for_resume_event = COMPLETION_INITIALIZER(
38
-
vmbus_connection.ready_for_resume_event),
37
+
.all_offers_delivered_event = COMPLETION_INITIALIZER(
38
+
vmbus_connection.all_offers_delivered_event),
39
39
};
40
40
EXPORT_SYMBOL_GPL(vmbus_connection);
41
41
+12
-10
drivers/hv/hv_balloon.c
+12
-10
drivers/hv/hv_balloon.c
···
28
28
#include <linux/sizes.h>
29
29
30
30
#include <linux/hyperv.h>
31
-
#include <asm/hyperv-tlfs.h>
31
+
#include <hyperv/hvhdk.h>
32
32
33
33
#include <asm/mshyperv.h>
34
34
···
766
766
struct hv_hotadd_state *has;
767
767
unsigned long pfn = page_to_pfn(pg);
768
768
769
-
guard(spinlock_irqsave)(&dm_device.ha_lock);
770
-
list_for_each_entry(has, &dm_device.ha_region_list, list) {
771
-
/* The page belongs to a different HAS. */
772
-
if (pfn < has->start_pfn ||
773
-
(pfn + (1UL << order) > has->end_pfn))
774
-
continue;
769
+
scoped_guard(spinlock_irqsave, &dm_device.ha_lock) {
770
+
list_for_each_entry(has, &dm_device.ha_region_list, list) {
771
+
/* The page belongs to a different HAS. */
772
+
if (pfn < has->start_pfn ||
773
+
(pfn + (1UL << order) > has->end_pfn))
774
+
continue;
775
775
776
-
hv_bring_pgs_online(has, pfn, 1UL << order);
777
-
break;
776
+
hv_bring_pgs_online(has, pfn, 1UL << order);
777
+
return;
778
+
}
778
779
}
780
+
generic_online_page(pg, order);
779
781
}
780
782
781
783
static int pfn_covered(unsigned long start_pfn, unsigned long pfn_cnt)
···
1588
1586
return -ENOSPC;
1589
1587
}
1590
1588
1591
-
hint->type = HV_EXT_MEMORY_HEAT_HINT_TYPE_COLD_DISCARD;
1589
+
hint->heat_type = HV_EXTMEM_HEAT_HINT_COLD_DISCARD;
1592
1590
hint->reserved = 0;
1593
1591
for_each_sg(sgl, sg, nents, i) {
1594
1592
union hv_gpa_page_range *range;
+11
-6
drivers/hv/hv_common.c
+11
-6
drivers/hv/hv_common.c
···
28
28
#include <linux/slab.h>
29
29
#include <linux/dma-map-ops.h>
30
30
#include <linux/set_memory.h>
31
-
#include <asm/hyperv-tlfs.h>
31
+
#include <hyperv/hvhdk.h>
32
32
#include <asm/mshyperv.h>
33
33
34
34
/*
···
278
278
}
279
279
}
280
280
281
+
static inline bool hv_output_page_exists(void)
282
+
{
283
+
return hv_root_partition || IS_ENABLED(CONFIG_HYPERV_VTL_MODE);
284
+
}
285
+
281
286
int __init hv_common_init(void)
282
287
{
283
288
int i;
···
345
340
BUG_ON(!hyperv_pcpu_input_arg);
346
341
347
342
/* Allocate the per-CPU state for output arg for root */
348
-
if (hv_root_partition) {
343
+
if (hv_output_page_exists()) {
349
344
hyperv_pcpu_output_arg = alloc_percpu(void *);
350
345
BUG_ON(!hyperv_pcpu_output_arg);
351
346
}
352
347
353
-
hv_vp_index = kmalloc_array(num_possible_cpus(), sizeof(*hv_vp_index),
348
+
hv_vp_index = kmalloc_array(nr_cpu_ids, sizeof(*hv_vp_index),
354
349
GFP_KERNEL);
355
350
if (!hv_vp_index) {
356
351
hv_common_free();
357
352
return -ENOMEM;
358
353
}
359
354
360
-
for (i = 0; i < num_possible_cpus(); i++)
355
+
for (i = 0; i < nr_cpu_ids; i++)
361
356
hv_vp_index[i] = VP_INVAL;
362
357
363
358
return 0;
···
440
435
void **inputarg, **outputarg;
441
436
u64 msr_vp_index;
442
437
gfp_t flags;
443
-
int pgcount = hv_root_partition ? 2 : 1;
438
+
const int pgcount = hv_output_page_exists() ? 2 : 1;
444
439
void *mem;
445
440
int ret;
446
441
···
458
453
if (!mem)
459
454
return -ENOMEM;
460
455
461
-
if (hv_root_partition) {
456
+
if (hv_output_page_exists()) {
462
457
outputarg = (void **)this_cpu_ptr(hyperv_pcpu_output_arg);
463
458
*outputarg = (char *)mem + HV_HYP_PAGE_SIZE;
464
459
}
+1
-1
drivers/hv/hv_kvp.c
+1
-1
drivers/hv/hv_kvp.c
+1
-1
drivers/hv/hv_snapshot.c
+1
-1
drivers/hv/hv_snapshot.c
+4
-12
drivers/hv/hyperv_vmbus.h
+4
-12
drivers/hv/hyperv_vmbus.h
···
15
15
#include <linux/list.h>
16
16
#include <linux/bitops.h>
17
17
#include <asm/sync_bitops.h>
18
-
#include <asm/hyperv-tlfs.h>
19
18
#include <linux/atomic.h>
20
19
#include <linux/hyperv.h>
21
20
#include <linux/interrupt.h>
21
+
#include <hyperv/hvhdk.h>
22
22
23
23
#include "hv_trace.h"
24
24
···
287
287
struct completion ready_for_suspend_event;
288
288
289
289
/*
290
-
* The number of primary channels that should be "fixed up"
291
-
* upon resume: these channels are re-offered upon resume, and some
292
-
* fields of the channel offers (i.e. child_relid and connection_id)
293
-
* can change, so the old offermsg must be fixed up, before the resume
294
-
* callbacks of the VSC drivers start to further touch the channels.
290
+
* Completed once the host has offered all boot-time channels.
291
+
* Note that some channels may still be under process on a workqueue.
295
292
*/
296
-
atomic_t nr_chan_fixup_on_resume;
297
-
/*
298
-
* vmbus_bus_resume() waits for "nr_chan_fixup_on_resume" to
299
-
* drop to zero.
300
-
*/
301
-
struct completion ready_for_resume_event;
293
+
struct completion all_offers_delivered_event;
302
294
};
303
295
304
296
+16
-15
drivers/hv/vmbus_drv.c
+16
-15
drivers/hv/vmbus_drv.c
···
2427
2427
if (atomic_read(&vmbus_connection.nr_chan_close_on_suspend) > 0)
2428
2428
wait_for_completion(&vmbus_connection.ready_for_suspend_event);
2429
2429
2430
-
if (atomic_read(&vmbus_connection.nr_chan_fixup_on_resume) != 0) {
2431
-
pr_err("Can not suspend due to a previous failed resuming\n");
2432
-
return -EBUSY;
2433
-
}
2434
-
2435
2430
mutex_lock(&vmbus_connection.channel_mutex);
2436
2431
2437
2432
list_for_each_entry(channel, &vmbus_connection.chn_list, listentry) {
···
2451
2456
pr_err("Sub-channel not deleted!\n");
2452
2457
WARN_ON_ONCE(1);
2453
2458
}
2454
-
2455
-
atomic_inc(&vmbus_connection.nr_chan_fixup_on_resume);
2456
2459
}
2457
2460
2458
2461
mutex_unlock(&vmbus_connection.channel_mutex);
2459
2462
2460
2463
vmbus_initiate_unload(false);
2461
2464
2462
-
/* Reset the event for the next resume. */
2463
-
reinit_completion(&vmbus_connection.ready_for_resume_event);
2464
-
2465
2465
return 0;
2466
2466
}
2467
2467
2468
2468
static int vmbus_bus_resume(struct device *dev)
2469
2469
{
2470
+
struct vmbus_channel *channel;
2470
2471
struct vmbus_channel_msginfo *msginfo;
2471
2472
size_t msgsize;
2472
2473
int ret;
···
2493
2502
if (ret != 0)
2494
2503
return ret;
2495
2504
2496
-
WARN_ON(atomic_read(&vmbus_connection.nr_chan_fixup_on_resume) == 0);
2497
-
2498
2505
vmbus_request_offers();
2499
2506
2500
-
if (wait_for_completion_timeout(
2501
-
&vmbus_connection.ready_for_resume_event, secs_to_jiffies(10)) == 0)
2502
-
pr_err("Some vmbus device is missing after suspending?\n");
2507
+
mutex_lock(&vmbus_connection.channel_mutex);
2508
+
list_for_each_entry(channel, &vmbus_connection.chn_list, listentry) {
2509
+
if (channel->offermsg.child_relid != INVALID_RELID)
2510
+
continue;
2511
+
2512
+
/* hvsock channels are not expected to be present. */
2513
+
if (is_hvsock_channel(channel))
2514
+
continue;
2515
+
2516
+
pr_err("channel %pUl/%pUl not present after resume.\n",
2517
+
&channel->offermsg.offer.if_type,
2518
+
&channel->offermsg.offer.if_instance);
2519
+
/* ToDo: Cleanup these channels here */
2520
+
}
2521
+
mutex_unlock(&vmbus_connection.channel_mutex);
2503
2522
2504
2523
/* Reset the event for the next suspend. */
2505
2524
reinit_completion(&vmbus_connection.ready_for_suspend_event);
+2
-2
drivers/iommu/hyperv-iommu.c
+2
-2
drivers/iommu/hyperv-iommu.c
···
164
164
* max cpu affinity for IOAPIC irqs. Scan cpu 0-255 and set cpu
165
165
* into ioapic_max_cpumask if its APIC ID is less than 256.
166
166
*/
167
-
for (i = min_t(unsigned int, num_possible_cpus() - 1, 255); i >= 0; i--)
168
-
if (cpu_physical_id(i) < 256)
167
+
for (i = min_t(unsigned int, nr_cpu_ids - 1, 255); i >= 0; i--)
168
+
if (cpu_possible(i) && cpu_physical_id(i) < 256)
169
169
cpumask_set_cpu(i, &ioapic_max_cpumask);
170
170
171
171
return 0;
+43
-43
drivers/uio/uio_hv_generic.c
+43
-43
drivers/uio/uio_hv_generic.c
···
296
296
pdata->info.mem[MON_PAGE_MAP].size = PAGE_SIZE;
297
297
pdata->info.mem[MON_PAGE_MAP].memtype = UIO_MEM_LOGICAL;
298
298
299
-
pdata->recv_buf = vzalloc(RECV_BUFFER_SIZE);
300
-
if (pdata->recv_buf == NULL) {
301
-
ret = -ENOMEM;
302
-
goto fail_free_ring;
299
+
if (channel->device_id == HV_NIC) {
300
+
pdata->recv_buf = vzalloc(RECV_BUFFER_SIZE);
301
+
if (!pdata->recv_buf) {
302
+
ret = -ENOMEM;
303
+
goto fail_free_ring;
304
+
}
305
+
306
+
ret = vmbus_establish_gpadl(channel, pdata->recv_buf,
307
+
RECV_BUFFER_SIZE, &pdata->recv_gpadl);
308
+
if (ret) {
309
+
if (!pdata->recv_gpadl.decrypted)
310
+
vfree(pdata->recv_buf);
311
+
goto fail_close;
312
+
}
313
+
314
+
/* put Global Physical Address Label in name */
315
+
snprintf(pdata->recv_name, sizeof(pdata->recv_name),
316
+
"recv:%u", pdata->recv_gpadl.gpadl_handle);
317
+
pdata->info.mem[RECV_BUF_MAP].name = pdata->recv_name;
318
+
pdata->info.mem[RECV_BUF_MAP].addr = (uintptr_t)pdata->recv_buf;
319
+
pdata->info.mem[RECV_BUF_MAP].size = RECV_BUFFER_SIZE;
320
+
pdata->info.mem[RECV_BUF_MAP].memtype = UIO_MEM_VIRTUAL;
321
+
322
+
pdata->send_buf = vzalloc(SEND_BUFFER_SIZE);
323
+
if (!pdata->send_buf) {
324
+
ret = -ENOMEM;
325
+
goto fail_close;
326
+
}
327
+
328
+
ret = vmbus_establish_gpadl(channel, pdata->send_buf,
329
+
SEND_BUFFER_SIZE, &pdata->send_gpadl);
330
+
if (ret) {
331
+
if (!pdata->send_gpadl.decrypted)
332
+
vfree(pdata->send_buf);
333
+
goto fail_close;
334
+
}
335
+
336
+
snprintf(pdata->send_name, sizeof(pdata->send_name),
337
+
"send:%u", pdata->send_gpadl.gpadl_handle);
338
+
pdata->info.mem[SEND_BUF_MAP].name = pdata->send_name;
339
+
pdata->info.mem[SEND_BUF_MAP].addr = (uintptr_t)pdata->send_buf;
340
+
pdata->info.mem[SEND_BUF_MAP].size = SEND_BUFFER_SIZE;
341
+
pdata->info.mem[SEND_BUF_MAP].memtype = UIO_MEM_VIRTUAL;
303
342
}
304
-
305
-
ret = vmbus_establish_gpadl(channel, pdata->recv_buf,
306
-
RECV_BUFFER_SIZE, &pdata->recv_gpadl);
307
-
if (ret) {
308
-
if (!pdata->recv_gpadl.decrypted)
309
-
vfree(pdata->recv_buf);
310
-
goto fail_close;
311
-
}
312
-
313
-
/* put Global Physical Address Label in name */
314
-
snprintf(pdata->recv_name, sizeof(pdata->recv_name),
315
-
"recv:%u", pdata->recv_gpadl.gpadl_handle);
316
-
pdata->info.mem[RECV_BUF_MAP].name = pdata->recv_name;
317
-
pdata->info.mem[RECV_BUF_MAP].addr
318
-
= (uintptr_t)pdata->recv_buf;
319
-
pdata->info.mem[RECV_BUF_MAP].size = RECV_BUFFER_SIZE;
320
-
pdata->info.mem[RECV_BUF_MAP].memtype = UIO_MEM_VIRTUAL;
321
-
322
-
pdata->send_buf = vzalloc(SEND_BUFFER_SIZE);
323
-
if (pdata->send_buf == NULL) {
324
-
ret = -ENOMEM;
325
-
goto fail_close;
326
-
}
327
-
328
-
ret = vmbus_establish_gpadl(channel, pdata->send_buf,
329
-
SEND_BUFFER_SIZE, &pdata->send_gpadl);
330
-
if (ret) {
331
-
if (!pdata->send_gpadl.decrypted)
332
-
vfree(pdata->send_buf);
333
-
goto fail_close;
334
-
}
335
-
336
-
snprintf(pdata->send_name, sizeof(pdata->send_name),
337
-
"send:%u", pdata->send_gpadl.gpadl_handle);
338
-
pdata->info.mem[SEND_BUF_MAP].name = pdata->send_name;
339
-
pdata->info.mem[SEND_BUF_MAP].addr
340
-
= (uintptr_t)pdata->send_buf;
341
-
pdata->info.mem[SEND_BUF_MAP].size = SEND_BUFFER_SIZE;
342
-
pdata->info.mem[SEND_BUF_MAP].memtype = UIO_MEM_VIRTUAL;
343
343
344
344
pdata->info.priv = pdata;
345
345
pdata->device = dev;
-874
include/asm-generic/hyperv-tlfs.h
-874
include/asm-generic/hyperv-tlfs.h
···
1
-
/* SPDX-License-Identifier: GPL-2.0 */
2
-
3
-
/*
4
-
* This file contains definitions from Hyper-V Hypervisor Top-Level Functional
5
-
* Specification (TLFS):
6
-
* https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/reference/tlfs
7
-
*/
8
-
9
-
#ifndef _ASM_GENERIC_HYPERV_TLFS_H
10
-
#define _ASM_GENERIC_HYPERV_TLFS_H
11
-
12
-
#include <linux/types.h>
13
-
#include <linux/bits.h>
14
-
#include <linux/time64.h>
15
-
16
-
/*
17
-
* While not explicitly listed in the TLFS, Hyper-V always runs with a page size
18
-
* of 4096. These definitions are used when communicating with Hyper-V using
19
-
* guest physical pages and guest physical page addresses, since the guest page
20
-
* size may not be 4096 on all architectures.
21
-
*/
22
-
#define HV_HYP_PAGE_SHIFT 12
23
-
#define HV_HYP_PAGE_SIZE BIT(HV_HYP_PAGE_SHIFT)
24
-
#define HV_HYP_PAGE_MASK (~(HV_HYP_PAGE_SIZE - 1))
25
-
26
-
/*
27
-
* Hyper-V provides two categories of flags relevant to guest VMs. The
28
-
* "Features" category indicates specific functionality that is available
29
-
* to guests on this particular instance of Hyper-V. The "Features"
30
-
* are presented in four groups, each of which is 32 bits. The group A
31
-
* and B definitions are common across architectures and are listed here.
32
-
* However, not all flags are relevant on all architectures.
33
-
*
34
-
* Groups C and D vary across architectures and are listed in the
35
-
* architecture specific portion of hyperv-tlfs.h. Some of these flags exist
36
-
* on multiple architectures, but the bit positions are different so they
37
-
* cannot appear in the generic portion of hyperv-tlfs.h.
38
-
*
39
-
* The "Enlightenments" category provides recommendations on whether to use
40
-
* specific enlightenments that are available. The Enlighenments are a single
41
-
* group of 32 bits, but they vary across architectures and are listed in
42
-
* the architecture specific portion of hyperv-tlfs.h.
43
-
*/
44
-
45
-
/*
46
-
* Group A Features.
47
-
*/
48
-
49
-
/* VP Runtime register available */
50
-
#define HV_MSR_VP_RUNTIME_AVAILABLE BIT(0)
51
-
/* Partition Reference Counter available*/
52
-
#define HV_MSR_TIME_REF_COUNT_AVAILABLE BIT(1)
53
-
/* Basic SynIC register available */
54
-
#define HV_MSR_SYNIC_AVAILABLE BIT(2)
55
-
/* Synthetic Timer registers available */
56
-
#define HV_MSR_SYNTIMER_AVAILABLE BIT(3)
57
-
/* Virtual APIC assist and VP assist page registers available */
58
-
#define HV_MSR_APIC_ACCESS_AVAILABLE BIT(4)
59
-
/* Hypercall and Guest OS ID registers available*/
60
-
#define HV_MSR_HYPERCALL_AVAILABLE BIT(5)
61
-
/* Access virtual processor index register available*/
62
-
#define HV_MSR_VP_INDEX_AVAILABLE BIT(6)
63
-
/* Virtual system reset register available*/
64
-
#define HV_MSR_RESET_AVAILABLE BIT(7)
65
-
/* Access statistics page registers available */
66
-
#define HV_MSR_STAT_PAGES_AVAILABLE BIT(8)
67
-
/* Partition reference TSC register is available */
68
-
#define HV_MSR_REFERENCE_TSC_AVAILABLE BIT(9)
69
-
/* Partition Guest IDLE register is available */
70
-
#define HV_MSR_GUEST_IDLE_AVAILABLE BIT(10)
71
-
/* Partition local APIC and TSC frequency registers available */
72
-
#define HV_ACCESS_FREQUENCY_MSRS BIT(11)
73
-
/* AccessReenlightenmentControls privilege */
74
-
#define HV_ACCESS_REENLIGHTENMENT BIT(13)
75
-
/* AccessTscInvariantControls privilege */
76
-
#define HV_ACCESS_TSC_INVARIANT BIT(15)
77
-
78
-
/*
79
-
* Group B features.
80
-
*/
81
-
#define HV_CREATE_PARTITIONS BIT(0)
82
-
#define HV_ACCESS_PARTITION_ID BIT(1)
83
-
#define HV_ACCESS_MEMORY_POOL BIT(2)
84
-
#define HV_ADJUST_MESSAGE_BUFFERS BIT(3)
85
-
#define HV_POST_MESSAGES BIT(4)
86
-
#define HV_SIGNAL_EVENTS BIT(5)
87
-
#define HV_CREATE_PORT BIT(6)
88
-
#define HV_CONNECT_PORT BIT(7)
89
-
#define HV_ACCESS_STATS BIT(8)
90
-
#define HV_DEBUGGING BIT(11)
91
-
#define HV_CPU_MANAGEMENT BIT(12)
92
-
#define HV_ENABLE_EXTENDED_HYPERCALLS BIT(20)
93
-
#define HV_ISOLATION BIT(22)
94
-
95
-
/*
96
-
* TSC page layout.
97
-
*/
98
-
struct ms_hyperv_tsc_page {
99
-
volatile u32 tsc_sequence;
100
-
u32 reserved1;
101
-
volatile u64 tsc_scale;
102
-
volatile s64 tsc_offset;
103
-
} __packed;
104
-
105
-
union hv_reference_tsc_msr {
106
-
u64 as_uint64;
107
-
struct {
108
-
u64 enable:1;
109
-
u64 reserved:11;
110
-
u64 pfn:52;
111
-
} __packed;
112
-
};
113
-
114
-
/*
115
-
* The guest OS needs to register the guest ID with the hypervisor.
116
-
* The guest ID is a 64 bit entity and the structure of this ID is
117
-
* specified in the Hyper-V specification:
118
-
*
119
-
* msdn.microsoft.com/en-us/library/windows/hardware/ff542653%28v=vs.85%29.aspx
120
-
*
121
-
* While the current guideline does not specify how Linux guest ID(s)
122
-
* need to be generated, our plan is to publish the guidelines for
123
-
* Linux and other guest operating systems that currently are hosted
124
-
* on Hyper-V. The implementation here conforms to this yet
125
-
* unpublished guidelines.
126
-
*
127
-
*
128
-
* Bit(s)
129
-
* 63 - Indicates if the OS is Open Source or not; 1 is Open Source
130
-
* 62:56 - Os Type; Linux is 0x100
131
-
* 55:48 - Distro specific identification
132
-
* 47:16 - Linux kernel version number
133
-
* 15:0 - Distro specific identification
134
-
*
135
-
*
136
-
*/
137
-
138
-
#define HV_LINUX_VENDOR_ID 0x8100
139
-
140
-
/*
141
-
* Crash notification flags.
142
-
*/
143
-
#define HV_CRASH_CTL_CRASH_NOTIFY_MSG BIT_ULL(62)
144
-
#define HV_CRASH_CTL_CRASH_NOTIFY BIT_ULL(63)
145
-
146
-
/* Declare the various hypercall operations. */
147
-
#define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE 0x0002
148
-
#define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST 0x0003
149
-
#define HVCALL_ENABLE_VP_VTL 0x000f
150
-
#define HVCALL_NOTIFY_LONG_SPIN_WAIT 0x0008
151
-
#define HVCALL_SEND_IPI 0x000b
152
-
#define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX 0x0013
153
-
#define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX 0x0014
154
-
#define HVCALL_SEND_IPI_EX 0x0015
155
-
#define HVCALL_GET_PARTITION_ID 0x0046
156
-
#define HVCALL_DEPOSIT_MEMORY 0x0048
157
-
#define HVCALL_CREATE_VP 0x004e
158
-
#define HVCALL_GET_VP_REGISTERS 0x0050
159
-
#define HVCALL_SET_VP_REGISTERS 0x0051
160
-
#define HVCALL_POST_MESSAGE 0x005c
161
-
#define HVCALL_SIGNAL_EVENT 0x005d
162
-
#define HVCALL_POST_DEBUG_DATA 0x0069
163
-
#define HVCALL_RETRIEVE_DEBUG_DATA 0x006a
164
-
#define HVCALL_RESET_DEBUG_SESSION 0x006b
165
-
#define HVCALL_ADD_LOGICAL_PROCESSOR 0x0076
166
-
#define HVCALL_MAP_DEVICE_INTERRUPT 0x007c
167
-
#define HVCALL_UNMAP_DEVICE_INTERRUPT 0x007d
168
-
#define HVCALL_RETARGET_INTERRUPT 0x007e
169
-
#define HVCALL_START_VP 0x0099
170
-
#define HVCALL_GET_VP_ID_FROM_APIC_ID 0x009a
171
-
#define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_SPACE 0x00af
172
-
#define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_LIST 0x00b0
173
-
#define HVCALL_MODIFY_SPARSE_GPA_PAGE_HOST_VISIBILITY 0x00db
174
-
#define HVCALL_MMIO_READ 0x0106
175
-
#define HVCALL_MMIO_WRITE 0x0107
176
-
177
-
/* Extended hypercalls */
178
-
#define HV_EXT_CALL_QUERY_CAPABILITIES 0x8001
179
-
#define HV_EXT_CALL_MEMORY_HEAT_HINT 0x8003
180
-
181
-
#define HV_FLUSH_ALL_PROCESSORS BIT(0)
182
-
#define HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES BIT(1)
183
-
#define HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY BIT(2)
184
-
#define HV_FLUSH_USE_EXTENDED_RANGE_FORMAT BIT(3)
185
-
186
-
/* Extended capability bits */
187
-
#define HV_EXT_CAPABILITY_MEMORY_COLD_DISCARD_HINT BIT(8)
188
-
189
-
enum HV_GENERIC_SET_FORMAT {
190
-
HV_GENERIC_SET_SPARSE_4K,
191
-
HV_GENERIC_SET_ALL,
192
-
};
193
-
194
-
#define HV_PARTITION_ID_SELF ((u64)-1)
195
-
#define HV_VP_INDEX_SELF ((u32)-2)
196
-
197
-
#define HV_HYPERCALL_RESULT_MASK GENMASK_ULL(15, 0)
198
-
#define HV_HYPERCALL_FAST_BIT BIT(16)
199
-
#define HV_HYPERCALL_VARHEAD_OFFSET 17
200
-
#define HV_HYPERCALL_VARHEAD_MASK GENMASK_ULL(26, 17)
201
-
#define HV_HYPERCALL_RSVD0_MASK GENMASK_ULL(31, 27)
202
-
#define HV_HYPERCALL_NESTED BIT_ULL(31)
203
-
#define HV_HYPERCALL_REP_COMP_OFFSET 32
204
-
#define HV_HYPERCALL_REP_COMP_1 BIT_ULL(32)
205
-
#define HV_HYPERCALL_REP_COMP_MASK GENMASK_ULL(43, 32)
206
-
#define HV_HYPERCALL_RSVD1_MASK GENMASK_ULL(47, 44)
207
-
#define HV_HYPERCALL_REP_START_OFFSET 48
208
-
#define HV_HYPERCALL_REP_START_MASK GENMASK_ULL(59, 48)
209
-
#define HV_HYPERCALL_RSVD2_MASK GENMASK_ULL(63, 60)
210
-
#define HV_HYPERCALL_RSVD_MASK (HV_HYPERCALL_RSVD0_MASK | \
211
-
HV_HYPERCALL_RSVD1_MASK | \
212
-
HV_HYPERCALL_RSVD2_MASK)
213
-
214
-
/* hypercall status code */
215
-
#define HV_STATUS_SUCCESS 0
216
-
#define HV_STATUS_INVALID_HYPERCALL_CODE 2
217
-
#define HV_STATUS_INVALID_HYPERCALL_INPUT 3
218
-
#define HV_STATUS_INVALID_ALIGNMENT 4
219
-
#define HV_STATUS_INVALID_PARAMETER 5
220
-
#define HV_STATUS_ACCESS_DENIED 6
221
-
#define HV_STATUS_OPERATION_DENIED 8
222
-
#define HV_STATUS_INSUFFICIENT_MEMORY 11
223
-
#define HV_STATUS_INVALID_PORT_ID 17
224
-
#define HV_STATUS_INVALID_CONNECTION_ID 18
225
-
#define HV_STATUS_INSUFFICIENT_BUFFERS 19
226
-
#define HV_STATUS_TIME_OUT 120
227
-
#define HV_STATUS_VTL_ALREADY_ENABLED 134
228
-
229
-
/*
230
-
* The Hyper-V TimeRefCount register and the TSC
231
-
* page provide a guest VM clock with 100ns tick rate
232
-
*/
233
-
#define HV_CLOCK_HZ (NSEC_PER_SEC/100)
234
-
235
-
/* Define the number of synthetic interrupt sources. */
236
-
#define HV_SYNIC_SINT_COUNT (16)
237
-
/* Define the expected SynIC version. */
238
-
#define HV_SYNIC_VERSION_1 (0x1)
239
-
/* Valid SynIC vectors are 16-255. */
240
-
#define HV_SYNIC_FIRST_VALID_VECTOR (16)
241
-
242
-
#define HV_SYNIC_CONTROL_ENABLE (1ULL << 0)
243
-
#define HV_SYNIC_SIMP_ENABLE (1ULL << 0)
244
-
#define HV_SYNIC_SIEFP_ENABLE (1ULL << 0)
245
-
#define HV_SYNIC_SINT_MASKED (1ULL << 16)
246
-
#define HV_SYNIC_SINT_AUTO_EOI (1ULL << 17)
247
-
#define HV_SYNIC_SINT_VECTOR_MASK (0xFF)
248
-
249
-
#define HV_SYNIC_STIMER_COUNT (4)
250
-
251
-
/* Define synthetic interrupt controller message constants. */
252
-
#define HV_MESSAGE_SIZE (256)
253
-
#define HV_MESSAGE_PAYLOAD_BYTE_COUNT (240)
254
-
#define HV_MESSAGE_PAYLOAD_QWORD_COUNT (30)
255
-
256
-
/*
257
-
* Define hypervisor message types. Some of the message types
258
-
* are x86/x64 specific, but there's no good way to separate
259
-
* them out into the arch-specific version of hyperv-tlfs.h
260
-
* because C doesn't provide a way to extend enum types.
261
-
* Keeping them all in the arch neutral hyperv-tlfs.h seems
262
-
* the least messy compromise.
263
-
*/
264
-
enum hv_message_type {
265
-
HVMSG_NONE = 0x00000000,
266
-
267
-
/* Memory access messages. */
268
-
HVMSG_UNMAPPED_GPA = 0x80000000,
269
-
HVMSG_GPA_INTERCEPT = 0x80000001,
270
-
271
-
/* Timer notification messages. */
272
-
HVMSG_TIMER_EXPIRED = 0x80000010,
273
-
274
-
/* Error messages. */
275
-
HVMSG_INVALID_VP_REGISTER_VALUE = 0x80000020,
276
-
HVMSG_UNRECOVERABLE_EXCEPTION = 0x80000021,
277
-
HVMSG_UNSUPPORTED_FEATURE = 0x80000022,
278
-
279
-
/* Trace buffer complete messages. */
280
-
HVMSG_EVENTLOG_BUFFERCOMPLETE = 0x80000040,
281
-
282
-
/* Platform-specific processor intercept messages. */
283
-
HVMSG_X64_IOPORT_INTERCEPT = 0x80010000,
284
-
HVMSG_X64_MSR_INTERCEPT = 0x80010001,
285
-
HVMSG_X64_CPUID_INTERCEPT = 0x80010002,
286
-
HVMSG_X64_EXCEPTION_INTERCEPT = 0x80010003,
287
-
HVMSG_X64_APIC_EOI = 0x80010004,
288
-
HVMSG_X64_LEGACY_FP_ERROR = 0x80010005
289
-
};
290
-
291
-
/* Define synthetic interrupt controller message flags. */
292
-
union hv_message_flags {
293
-
__u8 asu8;
294
-
struct {
295
-
__u8 msg_pending:1;
296
-
__u8 reserved:7;
297
-
} __packed;
298
-
};
299
-
300
-
/* Define port identifier type. */
301
-
union hv_port_id {
302
-
__u32 asu32;
303
-
struct {
304
-
__u32 id:24;
305
-
__u32 reserved:8;
306
-
} __packed u;
307
-
};
308
-
309
-
/* Define synthetic interrupt controller message header. */
310
-
struct hv_message_header {
311
-
__u32 message_type;
312
-
__u8 payload_size;
313
-
union hv_message_flags message_flags;
314
-
__u8 reserved[2];
315
-
union {
316
-
__u64 sender;
317
-
union hv_port_id port;
318
-
};
319
-
} __packed;
320
-
321
-
/* Define synthetic interrupt controller message format. */
322
-
struct hv_message {
323
-
struct hv_message_header header;
324
-
union {
325
-
__u64 payload[HV_MESSAGE_PAYLOAD_QWORD_COUNT];
326
-
} u;
327
-
} __packed;
328
-
329
-
/* Define the synthetic interrupt message page layout. */
330
-
struct hv_message_page {
331
-
struct hv_message sint_message[HV_SYNIC_SINT_COUNT];
332
-
} __packed;
333
-
334
-
/* Define timer message payload structure. */
335
-
struct hv_timer_message_payload {
336
-
__u32 timer_index;
337
-
__u32 reserved;
338
-
__u64 expiration_time; /* When the timer expired */
339
-
__u64 delivery_time; /* When the message was delivered */
340
-
} __packed;
341
-
342
-
343
-
/* Define synthetic interrupt controller flag constants. */
344
-
#define HV_EVENT_FLAGS_COUNT (256 * 8)
345
-
#define HV_EVENT_FLAGS_LONG_COUNT (256 / sizeof(unsigned long))
346
-
347
-
/*
348
-
* Synthetic timer configuration.
349
-
*/
350
-
union hv_stimer_config {
351
-
u64 as_uint64;
352
-
struct {
353
-
u64 enable:1;
354
-
u64 periodic:1;
355
-
u64 lazy:1;
356
-
u64 auto_enable:1;
357
-
u64 apic_vector:8;
358
-
u64 direct_mode:1;
359
-
u64 reserved_z0:3;
360
-
u64 sintx:4;
361
-
u64 reserved_z1:44;
362
-
} __packed;
363
-
};
364
-
365
-
366
-
/* Define the synthetic interrupt controller event flags format. */
367
-
union hv_synic_event_flags {
368
-
unsigned long flags[HV_EVENT_FLAGS_LONG_COUNT];
369
-
};
370
-
371
-
/* Define SynIC control register. */
372
-
union hv_synic_scontrol {
373
-
u64 as_uint64;
374
-
struct {
375
-
u64 enable:1;
376
-
u64 reserved:63;
377
-
} __packed;
378
-
};
379
-
380
-
/* Define synthetic interrupt source. */
381
-
union hv_synic_sint {
382
-
u64 as_uint64;
383
-
struct {
384
-
u64 vector:8;
385
-
u64 reserved1:8;
386
-
u64 masked:1;
387
-
u64 auto_eoi:1;
388
-
u64 polling:1;
389
-
u64 reserved2:45;
390
-
} __packed;
391
-
};
392
-
393
-
/* Define the format of the SIMP register */
394
-
union hv_synic_simp {
395
-
u64 as_uint64;
396
-
struct {
397
-
u64 simp_enabled:1;
398
-
u64 preserved:11;
399
-
u64 base_simp_gpa:52;
400
-
} __packed;
401
-
};
402
-
403
-
/* Define the format of the SIEFP register */
404
-
union hv_synic_siefp {
405
-
u64 as_uint64;
406
-
struct {
407
-
u64 siefp_enabled:1;
408
-
u64 preserved:11;
409
-
u64 base_siefp_gpa:52;
410
-
} __packed;
411
-
};
412
-
413
-
struct hv_vpset {
414
-
u64 format;
415
-
u64 valid_bank_mask;
416
-
u64 bank_contents[];
417
-
} __packed;
418
-
419
-
/* The maximum number of sparse vCPU banks which can be encoded by 'struct hv_vpset' */
420
-
#define HV_MAX_SPARSE_VCPU_BANKS (64)
421
-
/* The number of vCPUs in one sparse bank */
422
-
#define HV_VCPUS_PER_SPARSE_BANK (64)
423
-
424
-
/* HvCallSendSyntheticClusterIpi hypercall */
425
-
struct hv_send_ipi {
426
-
u32 vector;
427
-
u32 reserved;
428
-
u64 cpu_mask;
429
-
} __packed;
430
-
431
-
/* HvCallSendSyntheticClusterIpiEx hypercall */
432
-
struct hv_send_ipi_ex {
433
-
u32 vector;
434
-
u32 reserved;
435
-
struct hv_vpset vp_set;
436
-
} __packed;
437
-
438
-
/* HvFlushGuestPhysicalAddressSpace hypercalls */
439
-
struct hv_guest_mapping_flush {
440
-
u64 address_space;
441
-
u64 flags;
442
-
} __packed;
443
-
444
-
/*
445
-
* HV_MAX_FLUSH_PAGES = "additional_pages" + 1. It's limited
446
-
* by the bitwidth of "additional_pages" in union hv_gpa_page_range.
447
-
*/
448
-
#define HV_MAX_FLUSH_PAGES (2048)
449
-
#define HV_GPA_PAGE_RANGE_PAGE_SIZE_2MB 0
450
-
#define HV_GPA_PAGE_RANGE_PAGE_SIZE_1GB 1
451
-
452
-
/* HvFlushGuestPhysicalAddressList, HvExtCallMemoryHeatHint hypercall */
453
-
union hv_gpa_page_range {
454
-
u64 address_space;
455
-
struct {
456
-
u64 additional_pages:11;
457
-
u64 largepage:1;
458
-
u64 basepfn:52;
459
-
} page;
460
-
struct {
461
-
u64 reserved:12;
462
-
u64 page_size:1;
463
-
u64 reserved1:8;
464
-
u64 base_large_pfn:43;
465
-
};
466
-
};
467
-
468
-
/*
469
-
* All input flush parameters should be in single page. The max flush
470
-
* count is equal with how many entries of union hv_gpa_page_range can
471
-
* be populated into the input parameter page.
472
-
*/
473
-
#define HV_MAX_FLUSH_REP_COUNT ((HV_HYP_PAGE_SIZE - 2 * sizeof(u64)) / \
474
-
sizeof(union hv_gpa_page_range))
475
-
476
-
struct hv_guest_mapping_flush_list {
477
-
u64 address_space;
478
-
u64 flags;
479
-
union hv_gpa_page_range gpa_list[HV_MAX_FLUSH_REP_COUNT];
480
-
};
481
-
482
-
/* HvFlushVirtualAddressSpace, HvFlushVirtualAddressList hypercalls */
483
-
struct hv_tlb_flush {
484
-
u64 address_space;
485
-
u64 flags;
486
-
u64 processor_mask;
487
-
u64 gva_list[];
488
-
} __packed;
489
-
490
-
/* HvFlushVirtualAddressSpaceEx, HvFlushVirtualAddressListEx hypercalls */
491
-
struct hv_tlb_flush_ex {
492
-
u64 address_space;
493
-
u64 flags;
494
-
struct hv_vpset hv_vp_set;
495
-
u64 gva_list[];
496
-
} __packed;
497
-
498
-
/* HvGetPartitionId hypercall (output only) */
499
-
struct hv_get_partition_id {
500
-
u64 partition_id;
501
-
} __packed;
502
-
503
-
/* HvDepositMemory hypercall */
504
-
struct hv_deposit_memory {
505
-
u64 partition_id;
506
-
u64 gpa_page_list[];
507
-
} __packed;
508
-
509
-
struct hv_proximity_domain_flags {
510
-
u32 proximity_preferred : 1;
511
-
u32 reserved : 30;
512
-
u32 proximity_info_valid : 1;
513
-
} __packed;
514
-
515
-
struct hv_proximity_domain_info {
516
-
u32 domain_id;
517
-
struct hv_proximity_domain_flags flags;
518
-
} __packed;
519
-
520
-
struct hv_lp_startup_status {
521
-
u64 hv_status;
522
-
u64 substatus1;
523
-
u64 substatus2;
524
-
u64 substatus3;
525
-
u64 substatus4;
526
-
u64 substatus5;
527
-
u64 substatus6;
528
-
} __packed;
529
-
530
-
/* HvAddLogicalProcessor hypercall */
531
-
struct hv_input_add_logical_processor {
532
-
u32 lp_index;
533
-
u32 apic_id;
534
-
struct hv_proximity_domain_info proximity_domain_info;
535
-
} __packed;
536
-
537
-
struct hv_output_add_logical_processor {
538
-
struct hv_lp_startup_status startup_status;
539
-
} __packed;
540
-
541
-
enum HV_SUBNODE_TYPE
542
-
{
543
-
HvSubnodeAny = 0,
544
-
HvSubnodeSocket = 1,
545
-
HvSubnodeAmdNode = 2,
546
-
HvSubnodeL3 = 3,
547
-
HvSubnodeCount = 4,
548
-
HvSubnodeInvalid = -1
549
-
};
550
-
551
-
/* HvCreateVp hypercall */
552
-
struct hv_create_vp {
553
-
u64 partition_id;
554
-
u32 vp_index;
555
-
u8 padding[3];
556
-
u8 subnode_type;
557
-
u64 subnode_id;
558
-
struct hv_proximity_domain_info proximity_domain_info;
559
-
u64 flags;
560
-
} __packed;
561
-
562
-
enum hv_interrupt_source {
563
-
HV_INTERRUPT_SOURCE_MSI = 1, /* MSI and MSI-X */
564
-
HV_INTERRUPT_SOURCE_IOAPIC,
565
-
};
566
-
567
-
union hv_ioapic_rte {
568
-
u64 as_uint64;
569
-
570
-
struct {
571
-
u32 vector:8;
572
-
u32 delivery_mode:3;
573
-
u32 destination_mode:1;
574
-
u32 delivery_status:1;
575
-
u32 interrupt_polarity:1;
576
-
u32 remote_irr:1;
577
-
u32 trigger_mode:1;
578
-
u32 interrupt_mask:1;
579
-
u32 reserved1:15;
580
-
581
-
u32 reserved2:24;
582
-
u32 destination_id:8;
583
-
};
584
-
585
-
struct {
586
-
u32 low_uint32;
587
-
u32 high_uint32;
588
-
};
589
-
} __packed;
590
-
591
-
struct hv_interrupt_entry {
592
-
u32 source;
593
-
u32 reserved1;
594
-
union {
595
-
union hv_msi_entry msi_entry;
596
-
union hv_ioapic_rte ioapic_rte;
597
-
};
598
-
} __packed;
599
-
600
-
/*
601
-
* flags for hv_device_interrupt_target.flags
602
-
*/
603
-
#define HV_DEVICE_INTERRUPT_TARGET_MULTICAST 1
604
-
#define HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET 2
605
-
606
-
struct hv_device_interrupt_target {
607
-
u32 vector;
608
-
u32 flags;
609
-
union {
610
-
u64 vp_mask;
611
-
struct hv_vpset vp_set;
612
-
};
613
-
} __packed;
614
-
615
-
struct hv_retarget_device_interrupt {
616
-
u64 partition_id; /* use "self" */
617
-
u64 device_id;
618
-
struct hv_interrupt_entry int_entry;
619
-
u64 reserved2;
620
-
struct hv_device_interrupt_target int_target;
621
-
} __packed __aligned(8);
622
-
623
-
/*
624
-
* These Hyper-V registers provide information equivalent to the CPUID
625
-
* instruction on x86/x64.
626
-
*/
627
-
#define HV_REGISTER_HYPERVISOR_VERSION 0x00000100 /*CPUID 0x40000002 */
628
-
#define HV_REGISTER_FEATURES 0x00000200 /*CPUID 0x40000003 */
629
-
#define HV_REGISTER_ENLIGHTENMENTS 0x00000201 /*CPUID 0x40000004 */
630
-
631
-
/*
632
-
* Synthetic register definitions equivalent to MSRs on x86/x64
633
-
*/
634
-
#define HV_REGISTER_GUEST_CRASH_P0 0x00000210
635
-
#define HV_REGISTER_GUEST_CRASH_P1 0x00000211
636
-
#define HV_REGISTER_GUEST_CRASH_P2 0x00000212
637
-
#define HV_REGISTER_GUEST_CRASH_P3 0x00000213
638
-
#define HV_REGISTER_GUEST_CRASH_P4 0x00000214
639
-
#define HV_REGISTER_GUEST_CRASH_CTL 0x00000215
640
-
641
-
#define HV_REGISTER_GUEST_OS_ID 0x00090002
642
-
#define HV_REGISTER_VP_INDEX 0x00090003
643
-
#define HV_REGISTER_TIME_REF_COUNT 0x00090004
644
-
#define HV_REGISTER_REFERENCE_TSC 0x00090017
645
-
646
-
#define HV_REGISTER_SINT0 0x000A0000
647
-
#define HV_REGISTER_SCONTROL 0x000A0010
648
-
#define HV_REGISTER_SIEFP 0x000A0012
649
-
#define HV_REGISTER_SIMP 0x000A0013
650
-
#define HV_REGISTER_EOM 0x000A0014
651
-
652
-
#define HV_REGISTER_STIMER0_CONFIG 0x000B0000
653
-
#define HV_REGISTER_STIMER0_COUNT 0x000B0001
654
-
655
-
/* HvGetVpRegisters hypercall input with variable size reg name list*/
656
-
struct hv_get_vp_registers_input {
657
-
struct {
658
-
u64 partitionid;
659
-
u32 vpindex;
660
-
u8 inputvtl;
661
-
u8 padding[3];
662
-
} header;
663
-
struct input {
664
-
u32 name0;
665
-
u32 name1;
666
-
} element[];
667
-
} __packed;
668
-
669
-
/* HvGetVpRegisters returns an array of these output elements */
670
-
struct hv_get_vp_registers_output {
671
-
union {
672
-
struct {
673
-
u32 a;
674
-
u32 b;
675
-
u32 c;
676
-
u32 d;
677
-
} as32 __packed;
678
-
struct {
679
-
u64 low;
680
-
u64 high;
681
-
} as64 __packed;
682
-
};
683
-
};
684
-
685
-
/* HvSetVpRegisters hypercall with variable size reg name/value list*/
686
-
struct hv_set_vp_registers_input {
687
-
struct {
688
-
u64 partitionid;
689
-
u32 vpindex;
690
-
u8 inputvtl;
691
-
u8 padding[3];
692
-
} header;
693
-
struct {
694
-
u32 name;
695
-
u32 padding1;
696
-
u64 padding2;
697
-
u64 valuelow;
698
-
u64 valuehigh;
699
-
} element[];
700
-
} __packed;
701
-
702
-
enum hv_device_type {
703
-
HV_DEVICE_TYPE_LOGICAL = 0,
704
-
HV_DEVICE_TYPE_PCI = 1,
705
-
HV_DEVICE_TYPE_IOAPIC = 2,
706
-
HV_DEVICE_TYPE_ACPI = 3,
707
-
};
708
-
709
-
typedef u16 hv_pci_rid;
710
-
typedef u16 hv_pci_segment;
711
-
typedef u64 hv_logical_device_id;
712
-
union hv_pci_bdf {
713
-
u16 as_uint16;
714
-
715
-
struct {
716
-
u8 function:3;
717
-
u8 device:5;
718
-
u8 bus;
719
-
};
720
-
} __packed;
721
-
722
-
union hv_pci_bus_range {
723
-
u16 as_uint16;
724
-
725
-
struct {
726
-
u8 subordinate_bus;
727
-
u8 secondary_bus;
728
-
};
729
-
} __packed;
730
-
731
-
union hv_device_id {
732
-
u64 as_uint64;
733
-
734
-
struct {
735
-
u64 reserved0:62;
736
-
u64 device_type:2;
737
-
};
738
-
739
-
/* HV_DEVICE_TYPE_LOGICAL */
740
-
struct {
741
-
u64 id:62;
742
-
u64 device_type:2;
743
-
} logical;
744
-
745
-
/* HV_DEVICE_TYPE_PCI */
746
-
struct {
747
-
union {
748
-
hv_pci_rid rid;
749
-
union hv_pci_bdf bdf;
750
-
};
751
-
752
-
hv_pci_segment segment;
753
-
union hv_pci_bus_range shadow_bus_range;
754
-
755
-
u16 phantom_function_bits:2;
756
-
u16 source_shadow:1;
757
-
758
-
u16 rsvdz0:11;
759
-
u16 device_type:2;
760
-
} pci;
761
-
762
-
/* HV_DEVICE_TYPE_IOAPIC */
763
-
struct {
764
-
u8 ioapic_id;
765
-
u8 rsvdz0;
766
-
u16 rsvdz1;
767
-
u16 rsvdz2;
768
-
769
-
u16 rsvdz3:14;
770
-
u16 device_type:2;
771
-
} ioapic;
772
-
773
-
/* HV_DEVICE_TYPE_ACPI */
774
-
struct {
775
-
u32 input_mapping_base;
776
-
u32 input_mapping_count:30;
777
-
u32 device_type:2;
778
-
} acpi;
779
-
} __packed;
780
-
781
-
enum hv_interrupt_trigger_mode {
782
-
HV_INTERRUPT_TRIGGER_MODE_EDGE = 0,
783
-
HV_INTERRUPT_TRIGGER_MODE_LEVEL = 1,
784
-
};
785
-
786
-
struct hv_device_interrupt_descriptor {
787
-
u32 interrupt_type;
788
-
u32 trigger_mode;
789
-
u32 vector_count;
790
-
u32 reserved;
791
-
struct hv_device_interrupt_target target;
792
-
} __packed;
793
-
794
-
struct hv_input_map_device_interrupt {
795
-
u64 partition_id;
796
-
u64 device_id;
797
-
u64 flags;
798
-
struct hv_interrupt_entry logical_interrupt_entry;
799
-
struct hv_device_interrupt_descriptor interrupt_descriptor;
800
-
} __packed;
801
-
802
-
struct hv_output_map_device_interrupt {
803
-
struct hv_interrupt_entry interrupt_entry;
804
-
} __packed;
805
-
806
-
struct hv_input_unmap_device_interrupt {
807
-
u64 partition_id;
808
-
u64 device_id;
809
-
struct hv_interrupt_entry interrupt_entry;
810
-
} __packed;
811
-
812
-
#define HV_SOURCE_SHADOW_NONE 0x0
813
-
#define HV_SOURCE_SHADOW_BRIDGE_BUS_RANGE 0x1
814
-
815
-
/*
816
-
* Version info reported by hypervisor
817
-
*/
818
-
union hv_hypervisor_version_info {
819
-
struct {
820
-
u32 build_number;
821
-
822
-
u32 minor_version : 16;
823
-
u32 major_version : 16;
824
-
825
-
u32 service_pack;
826
-
827
-
u32 service_number : 24;
828
-
u32 service_branch : 8;
829
-
};
830
-
struct {
831
-
u32 eax;
832
-
u32 ebx;
833
-
u32 ecx;
834
-
u32 edx;
835
-
};
836
-
};
837
-
838
-
/*
839
-
* The whole argument should fit in a page to be able to pass to the hypervisor
840
-
* in one hypercall.
841
-
*/
842
-
#define HV_MEMORY_HINT_MAX_GPA_PAGE_RANGES \
843
-
((HV_HYP_PAGE_SIZE - sizeof(struct hv_memory_hint)) / \
844
-
sizeof(union hv_gpa_page_range))
845
-
846
-
/* HvExtCallMemoryHeatHint hypercall */
847
-
#define HV_EXT_MEMORY_HEAT_HINT_TYPE_COLD_DISCARD 2
848
-
struct hv_memory_hint {
849
-
u64 type:2;
850
-
u64 reserved:62;
851
-
union hv_gpa_page_range ranges[];
852
-
} __packed;
853
-
854
-
/* Data structures for HVCALL_MMIO_READ and HVCALL_MMIO_WRITE */
855
-
#define HV_HYPERCALL_MMIO_MAX_DATA_LENGTH 64
856
-
857
-
struct hv_mmio_read_input {
858
-
u64 gpa;
859
-
u32 size;
860
-
u32 reserved;
861
-
} __packed;
862
-
863
-
struct hv_mmio_read_output {
864
-
u8 data[HV_HYPERCALL_MMIO_MAX_DATA_LENGTH];
865
-
} __packed;
866
-
867
-
struct hv_mmio_write_input {
868
-
u64 gpa;
869
-
u32 size;
870
-
u32 reserved;
871
-
u8 data[HV_HYPERCALL_MMIO_MAX_DATA_LENGTH];
872
-
} __packed;
873
-
874
-
#endif
+3
-4
include/asm-generic/mshyperv.h
+3
-4
include/asm-generic/mshyperv.h
···
6
6
* independent. See arch/<arch>/include/asm/mshyperv.h for definitions
7
7
* that are specific to architecture <arch>.
8
8
*
9
-
* Definitions that are specified in the Hyper-V Top Level Functional
10
-
* Spec (TLFS) should not go in this file, but should instead go in
11
-
* hyperv-tlfs.h.
9
+
* Definitions that are derived from Hyper-V code or headers should not go in
10
+
* this file, but should instead go in the relevant files in include/hyperv.
12
11
*
13
12
* Copyright (C) 2019, Microsoft, Inc.
14
13
*
···
24
25
#include <linux/cpumask.h>
25
26
#include <linux/nmi.h>
26
27
#include <asm/ptrace.h>
27
-
#include <asm/hyperv-tlfs.h>
28
+
#include <hyperv/hvhdk.h>
28
29
29
30
#define VTPM_BASE_ADDRESS 0xfed40000
30
31
+1
-1
include/clocksource/hyperv_timer.h
+1
-1
include/clocksource/hyperv_timer.h
+308
include/hyperv/hvgdk.h
+308
include/hyperv/hvgdk.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0 */
2
+
/*
3
+
* Type definitions for the Microsoft Hypervisor.
4
+
*/
5
+
#ifndef _HV_HVGDK_H
6
+
#define _HV_HVGDK_H
7
+
8
+
#include "hvgdk_mini.h"
9
+
#include "hvgdk_ext.h"
10
+
11
+
/*
12
+
* The guest OS needs to register the guest ID with the hypervisor.
13
+
* The guest ID is a 64 bit entity and the structure of this ID is
14
+
* specified in the Hyper-V TLFS specification.
15
+
*
16
+
* While the current guideline does not specify how Linux guest ID(s)
17
+
* need to be generated, our plan is to publish the guidelines for
18
+
* Linux and other guest operating systems that currently are hosted
19
+
* on Hyper-V. The implementation here conforms to this yet
20
+
* unpublished guidelines.
21
+
*
22
+
* Bit(s)
23
+
* 63 - Indicates if the OS is Open Source or not; 1 is Open Source
24
+
* 62:56 - Os Type; Linux is 0x100
25
+
* 55:48 - Distro specific identification
26
+
* 47:16 - Linux kernel version number
27
+
* 15:0 - Distro specific identification
28
+
*/
29
+
30
+
#define HV_LINUX_VENDOR_ID 0x8100
31
+
32
+
/* HV_VMX_ENLIGHTENED_VMCS */
33
+
struct hv_enlightened_vmcs {
34
+
u32 revision_id;
35
+
u32 abort;
36
+
37
+
u16 host_es_selector;
38
+
u16 host_cs_selector;
39
+
u16 host_ss_selector;
40
+
u16 host_ds_selector;
41
+
u16 host_fs_selector;
42
+
u16 host_gs_selector;
43
+
u16 host_tr_selector;
44
+
45
+
u16 padding16_1;
46
+
47
+
u64 host_ia32_pat;
48
+
u64 host_ia32_efer;
49
+
50
+
u64 host_cr0;
51
+
u64 host_cr3;
52
+
u64 host_cr4;
53
+
54
+
u64 host_ia32_sysenter_esp;
55
+
u64 host_ia32_sysenter_eip;
56
+
u64 host_rip;
57
+
u32 host_ia32_sysenter_cs;
58
+
59
+
u32 pin_based_vm_exec_control;
60
+
u32 vm_exit_controls;
61
+
u32 secondary_vm_exec_control;
62
+
63
+
u64 io_bitmap_a;
64
+
u64 io_bitmap_b;
65
+
u64 msr_bitmap;
66
+
67
+
u16 guest_es_selector;
68
+
u16 guest_cs_selector;
69
+
u16 guest_ss_selector;
70
+
u16 guest_ds_selector;
71
+
u16 guest_fs_selector;
72
+
u16 guest_gs_selector;
73
+
u16 guest_ldtr_selector;
74
+
u16 guest_tr_selector;
75
+
76
+
u32 guest_es_limit;
77
+
u32 guest_cs_limit;
78
+
u32 guest_ss_limit;
79
+
u32 guest_ds_limit;
80
+
u32 guest_fs_limit;
81
+
u32 guest_gs_limit;
82
+
u32 guest_ldtr_limit;
83
+
u32 guest_tr_limit;
84
+
u32 guest_gdtr_limit;
85
+
u32 guest_idtr_limit;
86
+
87
+
u32 guest_es_ar_bytes;
88
+
u32 guest_cs_ar_bytes;
89
+
u32 guest_ss_ar_bytes;
90
+
u32 guest_ds_ar_bytes;
91
+
u32 guest_fs_ar_bytes;
92
+
u32 guest_gs_ar_bytes;
93
+
u32 guest_ldtr_ar_bytes;
94
+
u32 guest_tr_ar_bytes;
95
+
96
+
u64 guest_es_base;
97
+
u64 guest_cs_base;
98
+
u64 guest_ss_base;
99
+
u64 guest_ds_base;
100
+
u64 guest_fs_base;
101
+
u64 guest_gs_base;
102
+
u64 guest_ldtr_base;
103
+
u64 guest_tr_base;
104
+
u64 guest_gdtr_base;
105
+
u64 guest_idtr_base;
106
+
107
+
u64 padding64_1[3];
108
+
109
+
u64 vm_exit_msr_store_addr;
110
+
u64 vm_exit_msr_load_addr;
111
+
u64 vm_entry_msr_load_addr;
112
+
113
+
u64 cr3_target_value0;
114
+
u64 cr3_target_value1;
115
+
u64 cr3_target_value2;
116
+
u64 cr3_target_value3;
117
+
118
+
u32 page_fault_error_code_mask;
119
+
u32 page_fault_error_code_match;
120
+
121
+
u32 cr3_target_count;
122
+
u32 vm_exit_msr_store_count;
123
+
u32 vm_exit_msr_load_count;
124
+
u32 vm_entry_msr_load_count;
125
+
126
+
u64 tsc_offset;
127
+
u64 virtual_apic_page_addr;
128
+
u64 vmcs_link_pointer;
129
+
130
+
u64 guest_ia32_debugctl;
131
+
u64 guest_ia32_pat;
132
+
u64 guest_ia32_efer;
133
+
134
+
u64 guest_pdptr0;
135
+
u64 guest_pdptr1;
136
+
u64 guest_pdptr2;
137
+
u64 guest_pdptr3;
138
+
139
+
u64 guest_pending_dbg_exceptions;
140
+
u64 guest_sysenter_esp;
141
+
u64 guest_sysenter_eip;
142
+
143
+
u32 guest_activity_state;
144
+
u32 guest_sysenter_cs;
145
+
146
+
u64 cr0_guest_host_mask;
147
+
u64 cr4_guest_host_mask;
148
+
u64 cr0_read_shadow;
149
+
u64 cr4_read_shadow;
150
+
u64 guest_cr0;
151
+
u64 guest_cr3;
152
+
u64 guest_cr4;
153
+
u64 guest_dr7;
154
+
155
+
u64 host_fs_base;
156
+
u64 host_gs_base;
157
+
u64 host_tr_base;
158
+
u64 host_gdtr_base;
159
+
u64 host_idtr_base;
160
+
u64 host_rsp;
161
+
162
+
u64 ept_pointer;
163
+
164
+
u16 virtual_processor_id;
165
+
u16 padding16_2[3];
166
+
167
+
u64 padding64_2[5];
168
+
u64 guest_physical_address;
169
+
170
+
u32 vm_instruction_error;
171
+
u32 vm_exit_reason;
172
+
u32 vm_exit_intr_info;
173
+
u32 vm_exit_intr_error_code;
174
+
u32 idt_vectoring_info_field;
175
+
u32 idt_vectoring_error_code;
176
+
u32 vm_exit_instruction_len;
177
+
u32 vmx_instruction_info;
178
+
179
+
u64 exit_qualification;
180
+
u64 exit_io_instruction_ecx;
181
+
u64 exit_io_instruction_esi;
182
+
u64 exit_io_instruction_edi;
183
+
u64 exit_io_instruction_eip;
184
+
185
+
u64 guest_linear_address;
186
+
u64 guest_rsp;
187
+
u64 guest_rflags;
188
+
189
+
u32 guest_interruptibility_info;
190
+
u32 cpu_based_vm_exec_control;
191
+
u32 exception_bitmap;
192
+
u32 vm_entry_controls;
193
+
u32 vm_entry_intr_info_field;
194
+
u32 vm_entry_exception_error_code;
195
+
u32 vm_entry_instruction_len;
196
+
u32 tpr_threshold;
197
+
198
+
u64 guest_rip;
199
+
200
+
u32 hv_clean_fields;
201
+
u32 padding32_1;
202
+
u32 hv_synthetic_controls;
203
+
struct {
204
+
u32 nested_flush_hypercall:1;
205
+
u32 msr_bitmap:1;
206
+
u32 reserved:30;
207
+
} __packed hv_enlightenments_control;
208
+
u32 hv_vp_id;
209
+
u32 padding32_2;
210
+
u64 hv_vm_id;
211
+
u64 partition_assist_page;
212
+
u64 padding64_4[4];
213
+
u64 guest_bndcfgs;
214
+
u64 guest_ia32_perf_global_ctrl;
215
+
u64 guest_ia32_s_cet;
216
+
u64 guest_ssp;
217
+
u64 guest_ia32_int_ssp_table_addr;
218
+
u64 guest_ia32_lbr_ctl;
219
+
u64 padding64_5[2];
220
+
u64 xss_exit_bitmap;
221
+
u64 encls_exiting_bitmap;
222
+
u64 host_ia32_perf_global_ctrl;
223
+
u64 tsc_multiplier;
224
+
u64 host_ia32_s_cet;
225
+
u64 host_ssp;
226
+
u64 host_ia32_int_ssp_table_addr;
227
+
u64 padding64_6;
228
+
} __packed;
229
+
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_NONE 0
230
+
231
+
232
+
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_IO_BITMAP BIT(0)
233
+
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_MSR_BITMAP BIT(1)
234
+
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_GRP2 BIT(2)
235
+
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_GRP1 BIT(3)
236
+
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_PROC BIT(4)
237
+
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_EVENT BIT(5)
238
+
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_ENTRY BIT(6)
239
+
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_EXCPN BIT(7)
240
+
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CRDR BIT(8)
241
+
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_CONTROL_XLAT BIT(9)
242
+
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_BASIC BIT(10)
243
+
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP1 BIT(11)
244
+
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_GUEST_GRP2 BIT(12)
245
+
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_POINTER BIT(13)
246
+
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_HOST_GRP1 BIT(14)
247
+
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_ENLIGHTENMENTSCONTROL BIT(15)
248
+
249
+
#define HV_VMX_ENLIGHTENED_CLEAN_FIELD_ALL 0xFFFF
250
+
251
+
/*
252
+
* Note, Hyper-V isn't actually stealing bit 28 from Intel, just abusing it by
253
+
* pairing it with architecturally impossible exit reasons. Bit 28 is set only
254
+
* on SMI exits to a SMI transfer monitor (STM) and if and only if a MTF VM-Exit
255
+
* is pending. I.e. it will never be set by hardware for non-SMI exits (there
256
+
* are only three), nor will it ever be set unless the VMM is an STM.
257
+
*/
258
+
#define HV_VMX_SYNTHETIC_EXIT_REASON_TRAP_AFTER_FLUSH 0x10000031
259
+
260
+
/*
261
+
* Hyper-V uses the software reserved 32 bytes in VMCB control area to expose
262
+
* SVM enlightenments to guests. This is documented in the TLFS doc.
263
+
* Note on naming: SVM_NESTED_ENLIGHTENED_VMCB_FIELDS
264
+
*/
265
+
struct hv_vmcb_enlightenments {
266
+
struct __packed hv_enlightenments_control {
267
+
u32 nested_flush_hypercall : 1;
268
+
u32 msr_bitmap : 1;
269
+
u32 enlightened_npt_tlb: 1;
270
+
u32 reserved : 29;
271
+
} __packed hv_enlightenments_control;
272
+
u32 hv_vp_id;
273
+
u64 hv_vm_id;
274
+
u64 partition_assist_page;
275
+
u64 reserved;
276
+
} __packed;
277
+
278
+
/*
279
+
* Hyper-V uses the software reserved clean bit in VMCB.
280
+
*/
281
+
#define HV_VMCB_NESTED_ENLIGHTENMENTS 31
282
+
283
+
/* Synthetic VM-Exit */
284
+
#define HV_SVM_EXITCODE_ENL 0xf0000000
285
+
#define HV_SVM_ENL_EXITCODE_TRAP_AFTER_FLUSH (1)
286
+
287
+
/* VM_PARTITION_ASSIST_PAGE */
288
+
struct hv_partition_assist_pg {
289
+
u32 tlb_lock_count;
290
+
};
291
+
292
+
/* Define connection identifier type. */
293
+
union hv_connection_id {
294
+
u32 asu32;
295
+
struct {
296
+
u32 id : 24;
297
+
u32 reserved : 8;
298
+
} __packed u;
299
+
};
300
+
301
+
struct hv_input_unmap_gpa_pages {
302
+
u64 target_partition_id;
303
+
u64 target_gpa_base;
304
+
u32 unmap_flags;
305
+
u32 padding;
306
+
} __packed;
307
+
308
+
#endif /* #ifndef _HV_HVGDK_H */
+46
include/hyperv/hvgdk_ext.h
+46
include/hyperv/hvgdk_ext.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0 */
2
+
/*
3
+
* Type definitions for the Microsoft Hypervisor.
4
+
*/
5
+
#ifndef _HV_HVGDK_EXT_H
6
+
#define _HV_HVGDK_EXT_H
7
+
8
+
#include "hvgdk_mini.h"
9
+
10
+
/* Extended hypercalls */
11
+
#define HV_EXT_CALL_QUERY_CAPABILITIES 0x8001
12
+
#define HV_EXT_CALL_MEMORY_HEAT_HINT 0x8003
13
+
14
+
/* Extended hypercalls */
15
+
enum { /* HV_EXT_CALL */
16
+
HV_EXTCALL_QUERY_CAPABILITIES = 0x8001,
17
+
HV_EXTCALL_MEMORY_HEAT_HINT = 0x8003,
18
+
};
19
+
20
+
/* HV_EXT_OUTPUT_QUERY_CAPABILITIES */
21
+
#define HV_EXT_CAPABILITY_MEMORY_COLD_DISCARD_HINT BIT(8)
22
+
23
+
enum { /* HV_EXT_MEMORY_HEAT_HINT_TYPE */
24
+
HV_EXTMEM_HEAT_HINT_COLD = 0,
25
+
HV_EXTMEM_HEAT_HINT_HOT = 1,
26
+
HV_EXTMEM_HEAT_HINT_COLD_DISCARD = 2,
27
+
HV_EXTMEM_HEAT_HINT_MAX
28
+
};
29
+
30
+
/*
31
+
* The whole argument should fit in a page to be able to pass to the hypervisor
32
+
* in one hypercall.
33
+
*/
34
+
#define HV_MEMORY_HINT_MAX_GPA_PAGE_RANGES \
35
+
((HV_HYP_PAGE_SIZE - sizeof(struct hv_memory_hint)) / \
36
+
sizeof(union hv_gpa_page_range))
37
+
38
+
/* HvExtCallMemoryHeatHint hypercall */
39
+
#define HV_EXT_MEMORY_HEAT_HINT_TYPE_COLD_DISCARD 2
40
+
struct hv_memory_hint { /* HV_EXT_INPUT_MEMORY_HEAT_HINT */
41
+
u64 heat_type : 2; /* HV_EXTMEM_HEAT_HINT_* */
42
+
u64 reserved : 62;
43
+
union hv_gpa_page_range ranges[];
44
+
} __packed;
45
+
46
+
#endif /* _HV_HVGDK_EXT_H */
+1348
include/hyperv/hvgdk_mini.h
+1348
include/hyperv/hvgdk_mini.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0 */
2
+
/*
3
+
* Type definitions for the Microsoft hypervisor.
4
+
*/
5
+
#ifndef _HV_HVGDK_MINI_H
6
+
#define _HV_HVGDK_MINI_H
7
+
8
+
#include <linux/types.h>
9
+
#include <linux/bits.h>
10
+
11
+
struct hv_u128 {
12
+
u64 low_part;
13
+
u64 high_part;
14
+
} __packed;
15
+
16
+
/* NOTE: when adding below, update hv_status_to_string() */
17
+
#define HV_STATUS_SUCCESS 0x0
18
+
#define HV_STATUS_INVALID_HYPERCALL_CODE 0x2
19
+
#define HV_STATUS_INVALID_HYPERCALL_INPUT 0x3
20
+
#define HV_STATUS_INVALID_ALIGNMENT 0x4
21
+
#define HV_STATUS_INVALID_PARAMETER 0x5
22
+
#define HV_STATUS_ACCESS_DENIED 0x6
23
+
#define HV_STATUS_INVALID_PARTITION_STATE 0x7
24
+
#define HV_STATUS_OPERATION_DENIED 0x8
25
+
#define HV_STATUS_UNKNOWN_PROPERTY 0x9
26
+
#define HV_STATUS_PROPERTY_VALUE_OUT_OF_RANGE 0xA
27
+
#define HV_STATUS_INSUFFICIENT_MEMORY 0xB
28
+
#define HV_STATUS_INVALID_PARTITION_ID 0xD
29
+
#define HV_STATUS_INVALID_VP_INDEX 0xE
30
+
#define HV_STATUS_NOT_FOUND 0x10
31
+
#define HV_STATUS_INVALID_PORT_ID 0x11
32
+
#define HV_STATUS_INVALID_CONNECTION_ID 0x12
33
+
#define HV_STATUS_INSUFFICIENT_BUFFERS 0x13
34
+
#define HV_STATUS_NOT_ACKNOWLEDGED 0x14
35
+
#define HV_STATUS_INVALID_VP_STATE 0x15
36
+
#define HV_STATUS_NO_RESOURCES 0x1D
37
+
#define HV_STATUS_PROCESSOR_FEATURE_NOT_SUPPORTED 0x20
38
+
#define HV_STATUS_INVALID_LP_INDEX 0x41
39
+
#define HV_STATUS_INVALID_REGISTER_VALUE 0x50
40
+
#define HV_STATUS_OPERATION_FAILED 0x71
41
+
#define HV_STATUS_TIME_OUT 0x78
42
+
#define HV_STATUS_CALL_PENDING 0x79
43
+
#define HV_STATUS_VTL_ALREADY_ENABLED 0x86
44
+
45
+
/*
46
+
* The Hyper-V TimeRefCount register and the TSC
47
+
* page provide a guest VM clock with 100ns tick rate
48
+
*/
49
+
#define HV_CLOCK_HZ (NSEC_PER_SEC / 100)
50
+
51
+
#define HV_HYP_PAGE_SHIFT 12
52
+
#define HV_HYP_PAGE_SIZE BIT(HV_HYP_PAGE_SHIFT)
53
+
#define HV_HYP_PAGE_MASK (~(HV_HYP_PAGE_SIZE - 1))
54
+
55
+
#define HV_PARTITION_ID_INVALID ((u64)0)
56
+
#define HV_PARTITION_ID_SELF ((u64)-1)
57
+
58
+
/* Hyper-V specific model specific registers (MSRs) */
59
+
60
+
#if defined(CONFIG_X86)
61
+
/* HV_X64_SYNTHETIC_MSR */
62
+
#define HV_X64_MSR_GUEST_OS_ID 0x40000000
63
+
#define HV_X64_MSR_HYPERCALL 0x40000001
64
+
#define HV_X64_MSR_VP_INDEX 0x40000002
65
+
#define HV_X64_MSR_RESET 0x40000003
66
+
#define HV_X64_MSR_VP_RUNTIME 0x40000010
67
+
#define HV_X64_MSR_TIME_REF_COUNT 0x40000020
68
+
#define HV_X64_MSR_REFERENCE_TSC 0x40000021
69
+
#define HV_X64_MSR_TSC_FREQUENCY 0x40000022
70
+
#define HV_X64_MSR_APIC_FREQUENCY 0x40000023
71
+
72
+
/* Define the virtual APIC registers */
73
+
#define HV_X64_MSR_EOI 0x40000070
74
+
#define HV_X64_MSR_ICR 0x40000071
75
+
#define HV_X64_MSR_TPR 0x40000072
76
+
#define HV_X64_MSR_VP_ASSIST_PAGE 0x40000073
77
+
78
+
/* Define synthetic interrupt controller model specific registers. */
79
+
#define HV_X64_MSR_SCONTROL 0x40000080
80
+
#define HV_X64_MSR_SVERSION 0x40000081
81
+
#define HV_X64_MSR_SIEFP 0x40000082
82
+
#define HV_X64_MSR_SIMP 0x40000083
83
+
#define HV_X64_MSR_EOM 0x40000084
84
+
#define HV_X64_MSR_SIRBP 0x40000085
85
+
#define HV_X64_MSR_SINT0 0x40000090
86
+
#define HV_X64_MSR_SINT1 0x40000091
87
+
#define HV_X64_MSR_SINT2 0x40000092
88
+
#define HV_X64_MSR_SINT3 0x40000093
89
+
#define HV_X64_MSR_SINT4 0x40000094
90
+
#define HV_X64_MSR_SINT5 0x40000095
91
+
#define HV_X64_MSR_SINT6 0x40000096
92
+
#define HV_X64_MSR_SINT7 0x40000097
93
+
#define HV_X64_MSR_SINT8 0x40000098
94
+
#define HV_X64_MSR_SINT9 0x40000099
95
+
#define HV_X64_MSR_SINT10 0x4000009A
96
+
#define HV_X64_MSR_SINT11 0x4000009B
97
+
#define HV_X64_MSR_SINT12 0x4000009C
98
+
#define HV_X64_MSR_SINT13 0x4000009D
99
+
#define HV_X64_MSR_SINT14 0x4000009E
100
+
#define HV_X64_MSR_SINT15 0x4000009F
101
+
102
+
/* Define synthetic interrupt controller model specific registers for nested hypervisor */
103
+
#define HV_X64_MSR_NESTED_SCONTROL 0x40001080
104
+
#define HV_X64_MSR_NESTED_SVERSION 0x40001081
105
+
#define HV_X64_MSR_NESTED_SIEFP 0x40001082
106
+
#define HV_X64_MSR_NESTED_SIMP 0x40001083
107
+
#define HV_X64_MSR_NESTED_EOM 0x40001084
108
+
#define HV_X64_MSR_NESTED_SINT0 0x40001090
109
+
110
+
/*
111
+
* Synthetic Timer MSRs. Four timers per vcpu.
112
+
*/
113
+
#define HV_X64_MSR_STIMER0_CONFIG 0x400000B0
114
+
#define HV_X64_MSR_STIMER0_COUNT 0x400000B1
115
+
#define HV_X64_MSR_STIMER1_CONFIG 0x400000B2
116
+
#define HV_X64_MSR_STIMER1_COUNT 0x400000B3
117
+
#define HV_X64_MSR_STIMER2_CONFIG 0x400000B4
118
+
#define HV_X64_MSR_STIMER2_COUNT 0x400000B5
119
+
#define HV_X64_MSR_STIMER3_CONFIG 0x400000B6
120
+
#define HV_X64_MSR_STIMER3_COUNT 0x400000B7
121
+
122
+
/* Hyper-V guest idle MSR */
123
+
#define HV_X64_MSR_GUEST_IDLE 0x400000F0
124
+
125
+
/* Hyper-V guest crash notification MSR's */
126
+
#define HV_X64_MSR_CRASH_P0 0x40000100
127
+
#define HV_X64_MSR_CRASH_P1 0x40000101
128
+
#define HV_X64_MSR_CRASH_P2 0x40000102
129
+
#define HV_X64_MSR_CRASH_P3 0x40000103
130
+
#define HV_X64_MSR_CRASH_P4 0x40000104
131
+
#define HV_X64_MSR_CRASH_CTL 0x40000105
132
+
133
+
#define HV_X64_MSR_HYPERCALL_ENABLE 0x00000001
134
+
#define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT 12
135
+
#define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_MASK \
136
+
(~((1ull << HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT) - 1))
137
+
138
+
#define HV_X64_MSR_CRASH_PARAMS \
139
+
(1 + (HV_X64_MSR_CRASH_P4 - HV_X64_MSR_CRASH_P0))
140
+
141
+
#define HV_IPI_LOW_VECTOR 0x10
142
+
#define HV_IPI_HIGH_VECTOR 0xff
143
+
144
+
#define HV_X64_MSR_VP_ASSIST_PAGE_ENABLE 0x00000001
145
+
#define HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT 12
146
+
#define HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_MASK \
147
+
(~((1ull << HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT) - 1))
148
+
149
+
/* Hyper-V Enlightened VMCS version mask in nested features CPUID */
150
+
#define HV_X64_ENLIGHTENED_VMCS_VERSION 0xff
151
+
152
+
#define HV_X64_MSR_TSC_REFERENCE_ENABLE 0x00000001
153
+
#define HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT 12
154
+
155
+
/* Number of XMM registers used in hypercall input/output */
156
+
#define HV_HYPERCALL_MAX_XMM_REGISTERS 6
157
+
158
+
struct hv_reenlightenment_control {
159
+
u64 vector : 8;
160
+
u64 reserved1 : 8;
161
+
u64 enabled : 1;
162
+
u64 reserved2 : 15;
163
+
u64 target_vp : 32;
164
+
} __packed;
165
+
166
+
struct hv_tsc_emulation_status { /* HV_TSC_EMULATION_STATUS */
167
+
u64 inprogress : 1;
168
+
u64 reserved : 63;
169
+
} __packed;
170
+
171
+
struct hv_tsc_emulation_control { /* HV_TSC_INVARIANT_CONTROL */
172
+
u64 enabled : 1;
173
+
u64 reserved : 63;
174
+
} __packed;
175
+
176
+
/* TSC emulation after migration */
177
+
#define HV_X64_MSR_REENLIGHTENMENT_CONTROL 0x40000106
178
+
#define HV_X64_MSR_TSC_EMULATION_CONTROL 0x40000107
179
+
#define HV_X64_MSR_TSC_EMULATION_STATUS 0x40000108
180
+
#define HV_X64_MSR_TSC_INVARIANT_CONTROL 0x40000118
181
+
#define HV_EXPOSE_INVARIANT_TSC BIT_ULL(0)
182
+
183
+
#endif /* CONFIG_X86 */
184
+
185
+
struct hv_get_partition_id { /* HV_OUTPUT_GET_PARTITION_ID */
186
+
u64 partition_id;
187
+
} __packed;
188
+
189
+
/* HV_CRASH_CTL_REG_CONTENTS */
190
+
#define HV_CRASH_CTL_CRASH_NOTIFY_MSG BIT_ULL(62)
191
+
#define HV_CRASH_CTL_CRASH_NOTIFY BIT_ULL(63)
192
+
193
+
union hv_reference_tsc_msr {
194
+
u64 as_uint64;
195
+
struct {
196
+
u64 enable : 1;
197
+
u64 reserved : 11;
198
+
u64 pfn : 52;
199
+
} __packed;
200
+
};
201
+
202
+
/* The maximum number of sparse vCPU banks which can be encoded by 'struct hv_vpset' */
203
+
#define HV_MAX_SPARSE_VCPU_BANKS (64)
204
+
/* The number of vCPUs in one sparse bank */
205
+
#define HV_VCPUS_PER_SPARSE_BANK (64)
206
+
207
+
/* Some of Hyper-V structs do not use hv_vpset where linux uses them */
208
+
struct hv_vpset { /* HV_VP_SET */
209
+
u64 format;
210
+
u64 valid_bank_mask;
211
+
u64 bank_contents[];
212
+
} __packed;
213
+
214
+
/*
215
+
* Version info reported by hypervisor
216
+
* Changed to a union for convenience
217
+
*/
218
+
union hv_hypervisor_version_info {
219
+
struct {
220
+
u32 build_number;
221
+
222
+
u32 minor_version : 16;
223
+
u32 major_version : 16;
224
+
225
+
u32 service_pack;
226
+
227
+
u32 service_number : 24;
228
+
u32 service_branch : 8;
229
+
};
230
+
struct {
231
+
u32 eax;
232
+
u32 ebx;
233
+
u32 ecx;
234
+
u32 edx;
235
+
};
236
+
};
237
+
238
+
/* HV_CPUID_FUNCTION */
239
+
#define HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS 0x40000000
240
+
#define HYPERV_CPUID_INTERFACE 0x40000001
241
+
#define HYPERV_CPUID_VERSION 0x40000002
242
+
#define HYPERV_CPUID_FEATURES 0x40000003
243
+
#define HYPERV_CPUID_ENLIGHTMENT_INFO 0x40000004
244
+
#define HYPERV_CPUID_IMPLEMENT_LIMITS 0x40000005
245
+
#define HYPERV_CPUID_CPU_MANAGEMENT_FEATURES 0x40000007
246
+
#define HYPERV_CPUID_NESTED_FEATURES 0x4000000A
247
+
#define HYPERV_CPUID_ISOLATION_CONFIG 0x4000000C
248
+
249
+
#define HYPERV_CPUID_VIRT_STACK_INTERFACE 0x40000081
250
+
#define HYPERV_VS_INTERFACE_EAX_SIGNATURE 0x31235356 /* "VS#1" */
251
+
252
+
#define HYPERV_CPUID_VIRT_STACK_PROPERTIES 0x40000082
253
+
/* Support for the extended IOAPIC RTE format */
254
+
#define HYPERV_VS_PROPERTIES_EAX_EXTENDED_IOAPIC_RTE BIT(2)
255
+
256
+
#define HYPERV_HYPERVISOR_PRESENT_BIT 0x80000000
257
+
#define HYPERV_CPUID_MIN 0x40000005
258
+
#define HYPERV_CPUID_MAX 0x4000ffff
259
+
260
+
/*
261
+
* HV_X64_HYPERVISOR_FEATURES (EAX), or
262
+
* HV_PARTITION_PRIVILEGE_MASK [31-0]
263
+
*/
264
+
#define HV_MSR_VP_RUNTIME_AVAILABLE BIT(0)
265
+
#define HV_MSR_TIME_REF_COUNT_AVAILABLE BIT(1)
266
+
#define HV_MSR_SYNIC_AVAILABLE BIT(2)
267
+
#define HV_MSR_SYNTIMER_AVAILABLE BIT(3)
268
+
#define HV_MSR_APIC_ACCESS_AVAILABLE BIT(4)
269
+
#define HV_MSR_HYPERCALL_AVAILABLE BIT(5)
270
+
#define HV_MSR_VP_INDEX_AVAILABLE BIT(6)
271
+
#define HV_MSR_RESET_AVAILABLE BIT(7)
272
+
#define HV_MSR_STAT_PAGES_AVAILABLE BIT(8)
273
+
#define HV_MSR_REFERENCE_TSC_AVAILABLE BIT(9)
274
+
#define HV_MSR_GUEST_IDLE_AVAILABLE BIT(10)
275
+
#define HV_ACCESS_FREQUENCY_MSRS BIT(11)
276
+
#define HV_ACCESS_REENLIGHTENMENT BIT(13)
277
+
#define HV_ACCESS_TSC_INVARIANT BIT(15)
278
+
279
+
/*
280
+
* HV_X64_HYPERVISOR_FEATURES (EBX), or
281
+
* HV_PARTITION_PRIVILEGE_MASK [63-32]
282
+
*/
283
+
#define HV_CREATE_PARTITIONS BIT(0)
284
+
#define HV_ACCESS_PARTITION_ID BIT(1)
285
+
#define HV_ACCESS_MEMORY_POOL BIT(2)
286
+
#define HV_ADJUST_MESSAGE_BUFFERS BIT(3)
287
+
#define HV_POST_MESSAGES BIT(4)
288
+
#define HV_SIGNAL_EVENTS BIT(5)
289
+
#define HV_CREATE_PORT BIT(6)
290
+
#define HV_CONNECT_PORT BIT(7)
291
+
#define HV_ACCESS_STATS BIT(8)
292
+
#define HV_DEBUGGING BIT(11)
293
+
#define HV_CPU_MANAGEMENT BIT(12)
294
+
#define HV_ENABLE_EXTENDED_HYPERCALLS BIT(20)
295
+
#define HV_ISOLATION BIT(22)
296
+
297
+
#if defined(CONFIG_X86)
298
+
/* HV_X64_HYPERVISOR_FEATURES (EDX) */
299
+
#define HV_X64_MWAIT_AVAILABLE BIT(0)
300
+
#define HV_X64_GUEST_DEBUGGING_AVAILABLE BIT(1)
301
+
#define HV_X64_PERF_MONITOR_AVAILABLE BIT(2)
302
+
#define HV_X64_CPU_DYNAMIC_PARTITIONING_AVAILABLE BIT(3)
303
+
#define HV_X64_HYPERCALL_XMM_INPUT_AVAILABLE BIT(4)
304
+
#define HV_X64_GUEST_IDLE_STATE_AVAILABLE BIT(5)
305
+
#define HV_FEATURE_FREQUENCY_MSRS_AVAILABLE BIT(8)
306
+
#define HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE BIT(10)
307
+
#define HV_FEATURE_DEBUG_MSRS_AVAILABLE BIT(11)
308
+
#define HV_FEATURE_EXT_GVA_RANGES_FLUSH BIT(14)
309
+
/*
310
+
* Support for returning hypercall output block via XMM
311
+
* registers is available
312
+
*/
313
+
#define HV_X64_HYPERCALL_XMM_OUTPUT_AVAILABLE BIT(15)
314
+
/* stimer Direct Mode is available */
315
+
#define HV_STIMER_DIRECT_MODE_AVAILABLE BIT(19)
316
+
317
+
/*
318
+
* Implementation recommendations. Indicates which behaviors the hypervisor
319
+
* recommends the OS implement for optimal performance.
320
+
* These are HYPERV_CPUID_ENLIGHTMENT_INFO.EAX bits.
321
+
*/
322
+
/* HV_X64_ENLIGHTENMENT_INFORMATION */
323
+
#define HV_X64_AS_SWITCH_RECOMMENDED BIT(0)
324
+
#define HV_X64_LOCAL_TLB_FLUSH_RECOMMENDED BIT(1)
325
+
#define HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED BIT(2)
326
+
#define HV_X64_APIC_ACCESS_RECOMMENDED BIT(3)
327
+
#define HV_X64_SYSTEM_RESET_RECOMMENDED BIT(4)
328
+
#define HV_X64_RELAXED_TIMING_RECOMMENDED BIT(5)
329
+
#define HV_DEPRECATING_AEOI_RECOMMENDED BIT(9)
330
+
#define HV_X64_CLUSTER_IPI_RECOMMENDED BIT(10)
331
+
#define HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED BIT(11)
332
+
#define HV_X64_HYPERV_NESTED BIT(12)
333
+
#define HV_X64_ENLIGHTENED_VMCS_RECOMMENDED BIT(14)
334
+
#define HV_X64_USE_MMIO_HYPERCALLS BIT(21)
335
+
336
+
/*
337
+
* CPU management features identification.
338
+
* These are HYPERV_CPUID_CPU_MANAGEMENT_FEATURES.EAX bits.
339
+
*/
340
+
#define HV_X64_START_LOGICAL_PROCESSOR BIT(0)
341
+
#define HV_X64_CREATE_ROOT_VIRTUAL_PROCESSOR BIT(1)
342
+
#define HV_X64_PERFORMANCE_COUNTER_SYNC BIT(2)
343
+
#define HV_X64_RESERVED_IDENTITY_BIT BIT(31)
344
+
345
+
/*
346
+
* Virtual processor will never share a physical core with another virtual
347
+
* processor, except for virtual processors that are reported as sibling SMT
348
+
* threads.
349
+
*/
350
+
#define HV_X64_NO_NONARCH_CORESHARING BIT(18)
351
+
352
+
/* Nested features. These are HYPERV_CPUID_NESTED_FEATURES.EAX bits. */
353
+
#define HV_X64_NESTED_DIRECT_FLUSH BIT(17)
354
+
#define HV_X64_NESTED_GUEST_MAPPING_FLUSH BIT(18)
355
+
#define HV_X64_NESTED_MSR_BITMAP BIT(19)
356
+
357
+
/* Nested features #2. These are HYPERV_CPUID_NESTED_FEATURES.EBX bits. */
358
+
#define HV_X64_NESTED_EVMCS1_PERF_GLOBAL_CTRL BIT(0)
359
+
360
+
/*
361
+
* This is specific to AMD and specifies that enlightened TLB flush is
362
+
* supported. If guest opts in to this feature, ASID invalidations only
363
+
* flushes gva -> hpa mapping entries. To flush the TLB entries derived
364
+
* from NPT, hypercalls should be used (HvFlushGuestPhysicalAddressSpace
365
+
* or HvFlushGuestPhysicalAddressList).
366
+
*/
367
+
#define HV_X64_NESTED_ENLIGHTENED_TLB BIT(22)
368
+
369
+
/* HYPERV_CPUID_ISOLATION_CONFIG.EAX bits. */
370
+
#define HV_PARAVISOR_PRESENT BIT(0)
371
+
372
+
/* HYPERV_CPUID_ISOLATION_CONFIG.EBX bits. */
373
+
#define HV_ISOLATION_TYPE GENMASK(3, 0)
374
+
#define HV_SHARED_GPA_BOUNDARY_ACTIVE BIT(5)
375
+
#define HV_SHARED_GPA_BOUNDARY_BITS GENMASK(11, 6)
376
+
377
+
enum hv_isolation_type {
378
+
HV_ISOLATION_TYPE_NONE = 0, /* HV_PARTITION_ISOLATION_TYPE_NONE */
379
+
HV_ISOLATION_TYPE_VBS = 1,
380
+
HV_ISOLATION_TYPE_SNP = 2,
381
+
HV_ISOLATION_TYPE_TDX = 3
382
+
};
383
+
384
+
union hv_x64_msr_hypercall_contents {
385
+
u64 as_uint64;
386
+
struct {
387
+
u64 enable : 1;
388
+
u64 reserved : 11;
389
+
u64 guest_physical_address : 52;
390
+
} __packed;
391
+
};
392
+
#endif /* CONFIG_X86 */
393
+
394
+
#if defined(CONFIG_ARM64)
395
+
#define HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE BIT(8)
396
+
#define HV_STIMER_DIRECT_MODE_AVAILABLE BIT(13)
397
+
#endif /* CONFIG_ARM64 */
398
+
399
+
#if defined(CONFIG_X86)
400
+
#define HV_MAXIMUM_PROCESSORS 2048
401
+
#elif defined(CONFIG_ARM64) /* CONFIG_X86 */
402
+
#define HV_MAXIMUM_PROCESSORS 320
403
+
#endif /* CONFIG_ARM64 */
404
+
405
+
#define HV_MAX_VP_INDEX (HV_MAXIMUM_PROCESSORS - 1)
406
+
#define HV_VP_INDEX_SELF ((u32)-2)
407
+
#define HV_ANY_VP ((u32)-1)
408
+
409
+
union hv_vp_assist_msr_contents { /* HV_REGISTER_VP_ASSIST_PAGE */
410
+
u64 as_uint64;
411
+
struct {
412
+
u64 enable : 1;
413
+
u64 reserved : 11;
414
+
u64 pfn : 52;
415
+
} __packed;
416
+
};
417
+
418
+
/* Declare the various hypercall operations. */
419
+
/* HV_CALL_CODE */
420
+
#define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE 0x0002
421
+
#define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST 0x0003
422
+
#define HVCALL_NOTIFY_LONG_SPIN_WAIT 0x0008
423
+
#define HVCALL_SEND_IPI 0x000b
424
+
#define HVCALL_ENABLE_VP_VTL 0x000f
425
+
#define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX 0x0013
426
+
#define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX 0x0014
427
+
#define HVCALL_SEND_IPI_EX 0x0015
428
+
#define HVCALL_CREATE_PARTITION 0x0040
429
+
#define HVCALL_INITIALIZE_PARTITION 0x0041
430
+
#define HVCALL_FINALIZE_PARTITION 0x0042
431
+
#define HVCALL_DELETE_PARTITION 0x0043
432
+
#define HVCALL_GET_PARTITION_PROPERTY 0x0044
433
+
#define HVCALL_SET_PARTITION_PROPERTY 0x0045
434
+
#define HVCALL_GET_PARTITION_ID 0x0046
435
+
#define HVCALL_DEPOSIT_MEMORY 0x0048
436
+
#define HVCALL_WITHDRAW_MEMORY 0x0049
437
+
#define HVCALL_MAP_GPA_PAGES 0x004b
438
+
#define HVCALL_UNMAP_GPA_PAGES 0x004c
439
+
#define HVCALL_CREATE_VP 0x004e
440
+
#define HVCALL_DELETE_VP 0x004f
441
+
#define HVCALL_GET_VP_REGISTERS 0x0050
442
+
#define HVCALL_SET_VP_REGISTERS 0x0051
443
+
#define HVCALL_DELETE_PORT 0x0058
444
+
#define HVCALL_DISCONNECT_PORT 0x005b
445
+
#define HVCALL_POST_MESSAGE 0x005c
446
+
#define HVCALL_SIGNAL_EVENT 0x005d
447
+
#define HVCALL_POST_DEBUG_DATA 0x0069
448
+
#define HVCALL_RETRIEVE_DEBUG_DATA 0x006a
449
+
#define HVCALL_RESET_DEBUG_SESSION 0x006b
450
+
#define HVCALL_ADD_LOGICAL_PROCESSOR 0x0076
451
+
#define HVCALL_GET_SYSTEM_PROPERTY 0x007b
452
+
#define HVCALL_MAP_DEVICE_INTERRUPT 0x007c
453
+
#define HVCALL_UNMAP_DEVICE_INTERRUPT 0x007d
454
+
#define HVCALL_RETARGET_INTERRUPT 0x007e
455
+
#define HVCALL_NOTIFY_PORT_RING_EMPTY 0x008b
456
+
#define HVCALL_ASSERT_VIRTUAL_INTERRUPT 0x0094
457
+
#define HVCALL_CREATE_PORT 0x0095
458
+
#define HVCALL_CONNECT_PORT 0x0096
459
+
#define HVCALL_START_VP 0x0099
460
+
#define HVCALL_GET_VP_ID_FROM_APIC_ID 0x009a
461
+
#define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_SPACE 0x00af
462
+
#define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_LIST 0x00b0
463
+
#define HVCALL_DISPATCH_VP 0x00c2
464
+
#define HVCALL_MODIFY_SPARSE_GPA_PAGE_HOST_VISIBILITY 0x00db
465
+
#define HVCALL_MAP_VP_STATE_PAGE 0x00e1
466
+
#define HVCALL_UNMAP_VP_STATE_PAGE 0x00e2
467
+
#define HVCALL_GET_VP_STATE 0x00e3
468
+
#define HVCALL_SET_VP_STATE 0x00e4
469
+
#define HVCALL_MMIO_READ 0x0106
470
+
#define HVCALL_MMIO_WRITE 0x0107
471
+
472
+
/* HV_HYPERCALL_INPUT */
473
+
#define HV_HYPERCALL_RESULT_MASK GENMASK_ULL(15, 0)
474
+
#define HV_HYPERCALL_FAST_BIT BIT(16)
475
+
#define HV_HYPERCALL_VARHEAD_OFFSET 17
476
+
#define HV_HYPERCALL_VARHEAD_MASK GENMASK_ULL(26, 17)
477
+
#define HV_HYPERCALL_RSVD0_MASK GENMASK_ULL(31, 27)
478
+
#define HV_HYPERCALL_NESTED BIT_ULL(31)
479
+
#define HV_HYPERCALL_REP_COMP_OFFSET 32
480
+
#define HV_HYPERCALL_REP_COMP_1 BIT_ULL(32)
481
+
#define HV_HYPERCALL_REP_COMP_MASK GENMASK_ULL(43, 32)
482
+
#define HV_HYPERCALL_RSVD1_MASK GENMASK_ULL(47, 44)
483
+
#define HV_HYPERCALL_REP_START_OFFSET 48
484
+
#define HV_HYPERCALL_REP_START_MASK GENMASK_ULL(59, 48)
485
+
#define HV_HYPERCALL_RSVD2_MASK GENMASK_ULL(63, 60)
486
+
#define HV_HYPERCALL_RSVD_MASK (HV_HYPERCALL_RSVD0_MASK | \
487
+
HV_HYPERCALL_RSVD1_MASK | \
488
+
HV_HYPERCALL_RSVD2_MASK)
489
+
490
+
/* HvFlushGuestPhysicalAddressSpace hypercalls */
491
+
struct hv_guest_mapping_flush {
492
+
u64 address_space;
493
+
u64 flags;
494
+
} __packed;
495
+
496
+
/*
497
+
* HV_MAX_FLUSH_PAGES = "additional_pages" + 1. It's limited
498
+
* by the bitwidth of "additional_pages" in union hv_gpa_page_range.
499
+
*/
500
+
#define HV_MAX_FLUSH_PAGES (2048)
501
+
#define HV_GPA_PAGE_RANGE_PAGE_SIZE_2MB 0
502
+
#define HV_GPA_PAGE_RANGE_PAGE_SIZE_1GB 1
503
+
504
+
#define HV_FLUSH_ALL_PROCESSORS BIT(0)
505
+
#define HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES BIT(1)
506
+
#define HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY BIT(2)
507
+
#define HV_FLUSH_USE_EXTENDED_RANGE_FORMAT BIT(3)
508
+
509
+
/* HvFlushGuestPhysicalAddressList, HvExtCallMemoryHeatHint hypercall */
510
+
union hv_gpa_page_range {
511
+
u64 address_space;
512
+
struct {
513
+
u64 additional_pages : 11;
514
+
u64 largepage : 1;
515
+
u64 basepfn : 52;
516
+
} page;
517
+
struct {
518
+
u64 reserved : 12;
519
+
u64 page_size : 1;
520
+
u64 reserved1 : 8;
521
+
u64 base_large_pfn : 43;
522
+
};
523
+
};
524
+
525
+
/*
526
+
* All input flush parameters should be in single page. The max flush
527
+
* count is equal with how many entries of union hv_gpa_page_range can
528
+
* be populated into the input parameter page.
529
+
*/
530
+
#define HV_MAX_FLUSH_REP_COUNT ((HV_HYP_PAGE_SIZE - 2 * sizeof(u64)) / \
531
+
sizeof(union hv_gpa_page_range))
532
+
533
+
struct hv_guest_mapping_flush_list {
534
+
u64 address_space;
535
+
u64 flags;
536
+
union hv_gpa_page_range gpa_list[HV_MAX_FLUSH_REP_COUNT];
537
+
};
538
+
539
+
struct hv_tlb_flush { /* HV_INPUT_FLUSH_VIRTUAL_ADDRESS_LIST */
540
+
u64 address_space;
541
+
u64 flags;
542
+
u64 processor_mask;
543
+
u64 gva_list[];
544
+
} __packed;
545
+
546
+
/* HvFlushVirtualAddressSpaceEx, HvFlushVirtualAddressListEx hypercalls */
547
+
struct hv_tlb_flush_ex {
548
+
u64 address_space;
549
+
u64 flags;
550
+
struct hv_vpset hv_vp_set;
551
+
u64 gva_list[];
552
+
} __packed;
553
+
554
+
struct ms_hyperv_tsc_page { /* HV_REFERENCE_TSC_PAGE */
555
+
volatile u32 tsc_sequence;
556
+
u32 reserved1;
557
+
volatile u64 tsc_scale;
558
+
volatile s64 tsc_offset;
559
+
} __packed;
560
+
561
+
/* Define the number of synthetic interrupt sources. */
562
+
#define HV_SYNIC_SINT_COUNT (16)
563
+
564
+
/* Define the expected SynIC version. */
565
+
#define HV_SYNIC_VERSION_1 (0x1)
566
+
/* Valid SynIC vectors are 16-255. */
567
+
#define HV_SYNIC_FIRST_VALID_VECTOR (16)
568
+
569
+
#define HV_SYNIC_CONTROL_ENABLE (1ULL << 0)
570
+
#define HV_SYNIC_SIMP_ENABLE (1ULL << 0)
571
+
#define HV_SYNIC_SIEFP_ENABLE (1ULL << 0)
572
+
#define HV_SYNIC_SINT_MASKED (1ULL << 16)
573
+
#define HV_SYNIC_SINT_AUTO_EOI (1ULL << 17)
574
+
#define HV_SYNIC_SINT_VECTOR_MASK (0xFF)
575
+
576
+
#
577
+
578
+
/* Hyper-V defined statically assigned SINTs */
579
+
#define HV_SYNIC_INTERCEPTION_SINT_INDEX 0x00000000
580
+
#define HV_SYNIC_IOMMU_FAULT_SINT_INDEX 0x00000001
581
+
#define HV_SYNIC_VMBUS_SINT_INDEX 0x00000002
582
+
#define HV_SYNIC_FIRST_UNUSED_SINT_INDEX 0x00000005
583
+
584
+
/* mshv assigned SINT for doorbell */
585
+
#define HV_SYNIC_DOORBELL_SINT_INDEX HV_SYNIC_FIRST_UNUSED_SINT_INDEX
586
+
587
+
enum hv_interrupt_type {
588
+
HV_X64_INTERRUPT_TYPE_FIXED = 0x0000,
589
+
HV_X64_INTERRUPT_TYPE_LOWESTPRIORITY = 0x0001,
590
+
HV_X64_INTERRUPT_TYPE_SMI = 0x0002,
591
+
HV_X64_INTERRUPT_TYPE_REMOTEREAD = 0x0003,
592
+
HV_X64_INTERRUPT_TYPE_NMI = 0x0004,
593
+
HV_X64_INTERRUPT_TYPE_INIT = 0x0005,
594
+
HV_X64_INTERRUPT_TYPE_SIPI = 0x0006,
595
+
HV_X64_INTERRUPT_TYPE_EXTINT = 0x0007,
596
+
HV_X64_INTERRUPT_TYPE_LOCALINT0 = 0x0008,
597
+
HV_X64_INTERRUPT_TYPE_LOCALINT1 = 0x0009,
598
+
HV_X64_INTERRUPT_TYPE_MAXIMUM = 0x000A,
599
+
};
600
+
601
+
/* Define synthetic interrupt source. */
602
+
union hv_synic_sint {
603
+
u64 as_uint64;
604
+
struct {
605
+
u64 vector : 8;
606
+
u64 reserved1 : 8;
607
+
u64 masked : 1;
608
+
u64 auto_eoi : 1;
609
+
u64 polling : 1;
610
+
u64 as_intercept : 1;
611
+
u64 proxy : 1;
612
+
u64 reserved2 : 43;
613
+
} __packed;
614
+
};
615
+
616
+
union hv_x64_xsave_xfem_register {
617
+
u64 as_uint64;
618
+
struct {
619
+
u32 low_uint32;
620
+
u32 high_uint32;
621
+
} __packed;
622
+
struct {
623
+
u64 legacy_x87 : 1;
624
+
u64 legacy_sse : 1;
625
+
u64 avx : 1;
626
+
u64 mpx_bndreg : 1;
627
+
u64 mpx_bndcsr : 1;
628
+
u64 avx_512_op_mask : 1;
629
+
u64 avx_512_zmmhi : 1;
630
+
u64 avx_512_zmm16_31 : 1;
631
+
u64 rsvd8_9 : 2;
632
+
u64 pasid : 1;
633
+
u64 cet_u : 1;
634
+
u64 cet_s : 1;
635
+
u64 rsvd13_16 : 4;
636
+
u64 xtile_cfg : 1;
637
+
u64 xtile_data : 1;
638
+
u64 rsvd19_63 : 45;
639
+
} __packed;
640
+
};
641
+
642
+
/* Synthetic timer configuration */
643
+
union hv_stimer_config { /* HV_X64_MSR_STIMER_CONFIG_CONTENTS */
644
+
u64 as_uint64;
645
+
struct {
646
+
u64 enable : 1;
647
+
u64 periodic : 1;
648
+
u64 lazy : 1;
649
+
u64 auto_enable : 1;
650
+
u64 apic_vector : 8;
651
+
u64 direct_mode : 1;
652
+
u64 reserved_z0 : 3;
653
+
u64 sintx : 4;
654
+
u64 reserved_z1 : 44;
655
+
} __packed;
656
+
};
657
+
658
+
/* Define the number of synthetic timers */
659
+
#define HV_SYNIC_STIMER_COUNT (4)
660
+
661
+
/* Define port identifier type. */
662
+
union hv_port_id {
663
+
u32 asu32;
664
+
struct {
665
+
u32 id : 24;
666
+
u32 reserved : 8;
667
+
} __packed u;
668
+
};
669
+
670
+
#define HV_MESSAGE_SIZE (256)
671
+
#define HV_MESSAGE_PAYLOAD_BYTE_COUNT (240)
672
+
#define HV_MESSAGE_PAYLOAD_QWORD_COUNT (30)
673
+
674
+
/* Define hypervisor message types. */
675
+
enum hv_message_type {
676
+
HVMSG_NONE = 0x00000000,
677
+
678
+
/* Memory access messages. */
679
+
HVMSG_UNMAPPED_GPA = 0x80000000,
680
+
HVMSG_GPA_INTERCEPT = 0x80000001,
681
+
682
+
/* Timer notification messages. */
683
+
HVMSG_TIMER_EXPIRED = 0x80000010,
684
+
685
+
/* Error messages. */
686
+
HVMSG_INVALID_VP_REGISTER_VALUE = 0x80000020,
687
+
HVMSG_UNRECOVERABLE_EXCEPTION = 0x80000021,
688
+
HVMSG_UNSUPPORTED_FEATURE = 0x80000022,
689
+
690
+
/*
691
+
* Opaque intercept message. The original intercept message is only
692
+
* accessible from the mapped intercept message page.
693
+
*/
694
+
HVMSG_OPAQUE_INTERCEPT = 0x8000003F,
695
+
696
+
/* Trace buffer complete messages. */
697
+
HVMSG_EVENTLOG_BUFFERCOMPLETE = 0x80000040,
698
+
699
+
/* Hypercall intercept */
700
+
HVMSG_HYPERCALL_INTERCEPT = 0x80000050,
701
+
702
+
/* SynIC intercepts */
703
+
HVMSG_SYNIC_EVENT_INTERCEPT = 0x80000060,
704
+
HVMSG_SYNIC_SINT_INTERCEPT = 0x80000061,
705
+
HVMSG_SYNIC_SINT_DELIVERABLE = 0x80000062,
706
+
707
+
/* Async call completion intercept */
708
+
HVMSG_ASYNC_CALL_COMPLETION = 0x80000070,
709
+
710
+
/* Root scheduler messages */
711
+
HVMSG_SCHEDULER_VP_SIGNAL_BITSET = 0x80000100,
712
+
HVMSG_SCHEDULER_VP_SIGNAL_PAIR = 0x80000101,
713
+
714
+
/* Platform-specific processor intercept messages. */
715
+
HVMSG_X64_IO_PORT_INTERCEPT = 0x80010000,
716
+
HVMSG_X64_MSR_INTERCEPT = 0x80010001,
717
+
HVMSG_X64_CPUID_INTERCEPT = 0x80010002,
718
+
HVMSG_X64_EXCEPTION_INTERCEPT = 0x80010003,
719
+
HVMSG_X64_APIC_EOI = 0x80010004,
720
+
HVMSG_X64_LEGACY_FP_ERROR = 0x80010005,
721
+
HVMSG_X64_IOMMU_PRQ = 0x80010006,
722
+
HVMSG_X64_HALT = 0x80010007,
723
+
HVMSG_X64_INTERRUPTION_DELIVERABLE = 0x80010008,
724
+
HVMSG_X64_SIPI_INTERCEPT = 0x80010009,
725
+
};
726
+
727
+
/* Define the format of the SIMP register */
728
+
union hv_synic_simp {
729
+
u64 as_uint64;
730
+
struct {
731
+
u64 simp_enabled : 1;
732
+
u64 preserved : 11;
733
+
u64 base_simp_gpa : 52;
734
+
} __packed;
735
+
};
736
+
737
+
union hv_message_flags {
738
+
u8 asu8;
739
+
struct {
740
+
u8 msg_pending : 1;
741
+
u8 reserved : 7;
742
+
} __packed;
743
+
};
744
+
745
+
struct hv_message_header {
746
+
u32 message_type;
747
+
u8 payload_size;
748
+
union hv_message_flags message_flags;
749
+
u8 reserved[2];
750
+
union {
751
+
u64 sender;
752
+
union hv_port_id port;
753
+
};
754
+
} __packed;
755
+
756
+
/*
757
+
* Message format for notifications delivered via
758
+
* intercept message(as_intercept=1)
759
+
*/
760
+
struct hv_notification_message_payload {
761
+
u32 sint_index;
762
+
} __packed;
763
+
764
+
struct hv_message {
765
+
struct hv_message_header header;
766
+
union {
767
+
u64 payload[HV_MESSAGE_PAYLOAD_QWORD_COUNT];
768
+
} u;
769
+
} __packed;
770
+
771
+
/* Define the synthetic interrupt message page layout. */
772
+
struct hv_message_page {
773
+
struct hv_message sint_message[HV_SYNIC_SINT_COUNT];
774
+
} __packed;
775
+
776
+
/* Define timer message payload structure. */
777
+
struct hv_timer_message_payload {
778
+
__u32 timer_index;
779
+
__u32 reserved;
780
+
__u64 expiration_time; /* When the timer expired */
781
+
__u64 delivery_time; /* When the message was delivered */
782
+
} __packed;
783
+
784
+
struct hv_x64_segment_register {
785
+
u64 base;
786
+
u32 limit;
787
+
u16 selector;
788
+
union {
789
+
struct {
790
+
u16 segment_type : 4;
791
+
u16 non_system_segment : 1;
792
+
u16 descriptor_privilege_level : 2;
793
+
u16 present : 1;
794
+
u16 reserved : 4;
795
+
u16 available : 1;
796
+
u16 _long : 1;
797
+
u16 _default : 1;
798
+
u16 granularity : 1;
799
+
} __packed;
800
+
u16 attributes;
801
+
};
802
+
} __packed;
803
+
804
+
struct hv_x64_table_register {
805
+
u16 pad[3];
806
+
u16 limit;
807
+
u64 base;
808
+
} __packed;
809
+
810
+
union hv_input_vtl {
811
+
u8 as_uint8;
812
+
struct {
813
+
u8 target_vtl : 4;
814
+
u8 use_target_vtl : 1;
815
+
u8 reserved_z : 3;
816
+
};
817
+
} __packed;
818
+
819
+
struct hv_init_vp_context {
820
+
u64 rip;
821
+
u64 rsp;
822
+
u64 rflags;
823
+
824
+
struct hv_x64_segment_register cs;
825
+
struct hv_x64_segment_register ds;
826
+
struct hv_x64_segment_register es;
827
+
struct hv_x64_segment_register fs;
828
+
struct hv_x64_segment_register gs;
829
+
struct hv_x64_segment_register ss;
830
+
struct hv_x64_segment_register tr;
831
+
struct hv_x64_segment_register ldtr;
832
+
833
+
struct hv_x64_table_register idtr;
834
+
struct hv_x64_table_register gdtr;
835
+
836
+
u64 efer;
837
+
u64 cr0;
838
+
u64 cr3;
839
+
u64 cr4;
840
+
u64 msr_cr_pat;
841
+
} __packed;
842
+
843
+
struct hv_enable_vp_vtl {
844
+
u64 partition_id;
845
+
u32 vp_index;
846
+
union hv_input_vtl target_vtl;
847
+
u8 mbz0;
848
+
u16 mbz1;
849
+
struct hv_init_vp_context vp_context;
850
+
} __packed;
851
+
852
+
struct hv_get_vp_from_apic_id_in {
853
+
u64 partition_id;
854
+
union hv_input_vtl target_vtl;
855
+
u8 res[7];
856
+
u32 apic_ids[];
857
+
} __packed;
858
+
859
+
struct hv_nested_enlightenments_control {
860
+
struct {
861
+
u32 directhypercall : 1;
862
+
u32 reserved : 31;
863
+
} __packed features;
864
+
struct {
865
+
u32 inter_partition_comm : 1;
866
+
u32 reserved : 31;
867
+
} __packed hypercall_controls;
868
+
} __packed;
869
+
870
+
/* Define virtual processor assist page structure. */
871
+
struct hv_vp_assist_page {
872
+
u32 apic_assist;
873
+
u32 reserved1;
874
+
u32 vtl_entry_reason;
875
+
u32 vtl_reserved;
876
+
u64 vtl_ret_x64rax;
877
+
u64 vtl_ret_x64rcx;
878
+
struct hv_nested_enlightenments_control nested_control;
879
+
u8 enlighten_vmentry;
880
+
u8 reserved2[7];
881
+
u64 current_nested_vmcs;
882
+
u8 synthetic_time_unhalted_timer_expired;
883
+
u8 reserved3[7];
884
+
u8 virtualization_fault_information[40];
885
+
u8 reserved4[8];
886
+
u8 intercept_message[256];
887
+
u8 vtl_ret_actions[256];
888
+
} __packed;
889
+
890
+
enum hv_register_name {
891
+
/* Suspend Registers */
892
+
HV_REGISTER_EXPLICIT_SUSPEND = 0x00000000,
893
+
HV_REGISTER_INTERCEPT_SUSPEND = 0x00000001,
894
+
HV_REGISTER_DISPATCH_SUSPEND = 0x00000003,
895
+
896
+
/* Version - 128-bit result same as CPUID 0x40000002 */
897
+
HV_REGISTER_HYPERVISOR_VERSION = 0x00000100,
898
+
899
+
/* Feature Access (registers are 128 bits) - same as CPUID 0x40000003 - 0x4000000B */
900
+
HV_REGISTER_PRIVILEGES_AND_FEATURES_INFO = 0x00000200,
901
+
HV_REGISTER_FEATURES_INFO = 0x00000201,
902
+
HV_REGISTER_IMPLEMENTATION_LIMITS_INFO = 0x00000202,
903
+
HV_REGISTER_HARDWARE_FEATURES_INFO = 0x00000203,
904
+
HV_REGISTER_CPU_MANAGEMENT_FEATURES_INFO = 0x00000204,
905
+
HV_REGISTER_SVM_FEATURES_INFO = 0x00000205,
906
+
HV_REGISTER_SKIP_LEVEL_FEATURES_INFO = 0x00000206,
907
+
HV_REGISTER_NESTED_VIRT_FEATURES_INFO = 0x00000207,
908
+
HV_REGISTER_IPT_FEATURES_INFO = 0x00000208,
909
+
910
+
/* Guest Crash Registers */
911
+
HV_REGISTER_GUEST_CRASH_P0 = 0x00000210,
912
+
HV_REGISTER_GUEST_CRASH_P1 = 0x00000211,
913
+
HV_REGISTER_GUEST_CRASH_P2 = 0x00000212,
914
+
HV_REGISTER_GUEST_CRASH_P3 = 0x00000213,
915
+
HV_REGISTER_GUEST_CRASH_P4 = 0x00000214,
916
+
HV_REGISTER_GUEST_CRASH_CTL = 0x00000215,
917
+
918
+
/* Misc */
919
+
HV_REGISTER_VP_RUNTIME = 0x00090000,
920
+
HV_REGISTER_GUEST_OS_ID = 0x00090002,
921
+
HV_REGISTER_VP_INDEX = 0x00090003,
922
+
HV_REGISTER_TIME_REF_COUNT = 0x00090004,
923
+
HV_REGISTER_CPU_MANAGEMENT_VERSION = 0x00090007,
924
+
HV_REGISTER_VP_ASSIST_PAGE = 0x00090013,
925
+
HV_REGISTER_VP_ROOT_SIGNAL_COUNT = 0x00090014,
926
+
HV_REGISTER_REFERENCE_TSC = 0x00090017,
927
+
928
+
/* Hypervisor-defined Registers (Synic) */
929
+
HV_REGISTER_SINT0 = 0x000A0000,
930
+
HV_REGISTER_SINT1 = 0x000A0001,
931
+
HV_REGISTER_SINT2 = 0x000A0002,
932
+
HV_REGISTER_SINT3 = 0x000A0003,
933
+
HV_REGISTER_SINT4 = 0x000A0004,
934
+
HV_REGISTER_SINT5 = 0x000A0005,
935
+
HV_REGISTER_SINT6 = 0x000A0006,
936
+
HV_REGISTER_SINT7 = 0x000A0007,
937
+
HV_REGISTER_SINT8 = 0x000A0008,
938
+
HV_REGISTER_SINT9 = 0x000A0009,
939
+
HV_REGISTER_SINT10 = 0x000A000A,
940
+
HV_REGISTER_SINT11 = 0x000A000B,
941
+
HV_REGISTER_SINT12 = 0x000A000C,
942
+
HV_REGISTER_SINT13 = 0x000A000D,
943
+
HV_REGISTER_SINT14 = 0x000A000E,
944
+
HV_REGISTER_SINT15 = 0x000A000F,
945
+
HV_REGISTER_SCONTROL = 0x000A0010,
946
+
HV_REGISTER_SVERSION = 0x000A0011,
947
+
HV_REGISTER_SIEFP = 0x000A0012,
948
+
HV_REGISTER_SIMP = 0x000A0013,
949
+
HV_REGISTER_EOM = 0x000A0014,
950
+
HV_REGISTER_SIRBP = 0x000A0015,
951
+
952
+
HV_REGISTER_NESTED_SINT0 = 0x000A1000,
953
+
HV_REGISTER_NESTED_SINT1 = 0x000A1001,
954
+
HV_REGISTER_NESTED_SINT2 = 0x000A1002,
955
+
HV_REGISTER_NESTED_SINT3 = 0x000A1003,
956
+
HV_REGISTER_NESTED_SINT4 = 0x000A1004,
957
+
HV_REGISTER_NESTED_SINT5 = 0x000A1005,
958
+
HV_REGISTER_NESTED_SINT6 = 0x000A1006,
959
+
HV_REGISTER_NESTED_SINT7 = 0x000A1007,
960
+
HV_REGISTER_NESTED_SINT8 = 0x000A1008,
961
+
HV_REGISTER_NESTED_SINT9 = 0x000A1009,
962
+
HV_REGISTER_NESTED_SINT10 = 0x000A100A,
963
+
HV_REGISTER_NESTED_SINT11 = 0x000A100B,
964
+
HV_REGISTER_NESTED_SINT12 = 0x000A100C,
965
+
HV_REGISTER_NESTED_SINT13 = 0x000A100D,
966
+
HV_REGISTER_NESTED_SINT14 = 0x000A100E,
967
+
HV_REGISTER_NESTED_SINT15 = 0x000A100F,
968
+
HV_REGISTER_NESTED_SCONTROL = 0x000A1010,
969
+
HV_REGISTER_NESTED_SVERSION = 0x000A1011,
970
+
HV_REGISTER_NESTED_SIFP = 0x000A1012,
971
+
HV_REGISTER_NESTED_SIPP = 0x000A1013,
972
+
HV_REGISTER_NESTED_EOM = 0x000A1014,
973
+
HV_REGISTER_NESTED_SIRBP = 0x000a1015,
974
+
975
+
/* Hypervisor-defined Registers (Synthetic Timers) */
976
+
HV_REGISTER_STIMER0_CONFIG = 0x000B0000,
977
+
HV_REGISTER_STIMER0_COUNT = 0x000B0001,
978
+
979
+
/* VSM */
980
+
HV_REGISTER_VSM_VP_STATUS = 0x000D0003,
981
+
};
982
+
983
+
/*
984
+
* Arch compatibility regs for use with hv_set/get_register
985
+
*/
986
+
#if defined(CONFIG_X86)
987
+
988
+
/*
989
+
* To support arch-generic code calling hv_set/get_register:
990
+
* - On x86, HV_MSR_ indicates an MSR accessed via rdmsrl/wrmsrl
991
+
* - On ARM, HV_MSR_ indicates a VP register accessed via hypercall
992
+
*/
993
+
#define HV_MSR_CRASH_P0 (HV_X64_MSR_CRASH_P0)
994
+
#define HV_MSR_CRASH_P1 (HV_X64_MSR_CRASH_P1)
995
+
#define HV_MSR_CRASH_P2 (HV_X64_MSR_CRASH_P2)
996
+
#define HV_MSR_CRASH_P3 (HV_X64_MSR_CRASH_P3)
997
+
#define HV_MSR_CRASH_P4 (HV_X64_MSR_CRASH_P4)
998
+
#define HV_MSR_CRASH_CTL (HV_X64_MSR_CRASH_CTL)
999
+
1000
+
#define HV_MSR_VP_INDEX (HV_X64_MSR_VP_INDEX)
1001
+
#define HV_MSR_TIME_REF_COUNT (HV_X64_MSR_TIME_REF_COUNT)
1002
+
#define HV_MSR_REFERENCE_TSC (HV_X64_MSR_REFERENCE_TSC)
1003
+
1004
+
#define HV_MSR_SINT0 (HV_X64_MSR_SINT0)
1005
+
#define HV_MSR_SVERSION (HV_X64_MSR_SVERSION)
1006
+
#define HV_MSR_SCONTROL (HV_X64_MSR_SCONTROL)
1007
+
#define HV_MSR_SIEFP (HV_X64_MSR_SIEFP)
1008
+
#define HV_MSR_SIMP (HV_X64_MSR_SIMP)
1009
+
#define HV_MSR_EOM (HV_X64_MSR_EOM)
1010
+
#define HV_MSR_SIRBP (HV_X64_MSR_SIRBP)
1011
+
1012
+
#define HV_MSR_NESTED_SCONTROL (HV_X64_MSR_NESTED_SCONTROL)
1013
+
#define HV_MSR_NESTED_SVERSION (HV_X64_MSR_NESTED_SVERSION)
1014
+
#define HV_MSR_NESTED_SIEFP (HV_X64_MSR_NESTED_SIEFP)
1015
+
#define HV_MSR_NESTED_SIMP (HV_X64_MSR_NESTED_SIMP)
1016
+
#define HV_MSR_NESTED_EOM (HV_X64_MSR_NESTED_EOM)
1017
+
#define HV_MSR_NESTED_SINT0 (HV_X64_MSR_NESTED_SINT0)
1018
+
1019
+
#define HV_MSR_STIMER0_CONFIG (HV_X64_MSR_STIMER0_CONFIG)
1020
+
#define HV_MSR_STIMER0_COUNT (HV_X64_MSR_STIMER0_COUNT)
1021
+
1022
+
#elif defined(CONFIG_ARM64) /* CONFIG_X86 */
1023
+
1024
+
#define HV_MSR_CRASH_P0 (HV_REGISTER_GUEST_CRASH_P0)
1025
+
#define HV_MSR_CRASH_P1 (HV_REGISTER_GUEST_CRASH_P1)
1026
+
#define HV_MSR_CRASH_P2 (HV_REGISTER_GUEST_CRASH_P2)
1027
+
#define HV_MSR_CRASH_P3 (HV_REGISTER_GUEST_CRASH_P3)
1028
+
#define HV_MSR_CRASH_P4 (HV_REGISTER_GUEST_CRASH_P4)
1029
+
#define HV_MSR_CRASH_CTL (HV_REGISTER_GUEST_CRASH_CTL)
1030
+
1031
+
#define HV_MSR_VP_INDEX (HV_REGISTER_VP_INDEX)
1032
+
#define HV_MSR_TIME_REF_COUNT (HV_REGISTER_TIME_REF_COUNT)
1033
+
#define HV_MSR_REFERENCE_TSC (HV_REGISTER_REFERENCE_TSC)
1034
+
1035
+
#define HV_MSR_SINT0 (HV_REGISTER_SINT0)
1036
+
#define HV_MSR_SCONTROL (HV_REGISTER_SCONTROL)
1037
+
#define HV_MSR_SIEFP (HV_REGISTER_SIEFP)
1038
+
#define HV_MSR_SIMP (HV_REGISTER_SIMP)
1039
+
#define HV_MSR_EOM (HV_REGISTER_EOM)
1040
+
#define HV_MSR_SIRBP (HV_REGISTER_SIRBP)
1041
+
1042
+
#define HV_MSR_STIMER0_CONFIG (HV_REGISTER_STIMER0_CONFIG)
1043
+
#define HV_MSR_STIMER0_COUNT (HV_REGISTER_STIMER0_COUNT)
1044
+
1045
+
#endif /* CONFIG_ARM64 */
1046
+
1047
+
union hv_explicit_suspend_register {
1048
+
u64 as_uint64;
1049
+
struct {
1050
+
u64 suspended : 1;
1051
+
u64 reserved : 63;
1052
+
} __packed;
1053
+
};
1054
+
1055
+
union hv_intercept_suspend_register {
1056
+
u64 as_uint64;
1057
+
struct {
1058
+
u64 suspended : 1;
1059
+
u64 reserved : 63;
1060
+
} __packed;
1061
+
};
1062
+
1063
+
union hv_dispatch_suspend_register {
1064
+
u64 as_uint64;
1065
+
struct {
1066
+
u64 suspended : 1;
1067
+
u64 reserved : 63;
1068
+
} __packed;
1069
+
};
1070
+
1071
+
union hv_arm64_pending_interruption_register {
1072
+
u64 as_uint64;
1073
+
struct {
1074
+
u64 interruption_pending : 1;
1075
+
u64 interruption_type: 1;
1076
+
u64 reserved : 30;
1077
+
u64 error_code : 32;
1078
+
} __packed;
1079
+
};
1080
+
1081
+
union hv_arm64_interrupt_state_register {
1082
+
u64 as_uint64;
1083
+
struct {
1084
+
u64 interrupt_shadow : 1;
1085
+
u64 reserved : 63;
1086
+
} __packed;
1087
+
};
1088
+
1089
+
union hv_arm64_pending_synthetic_exception_event {
1090
+
u64 as_uint64[2];
1091
+
struct {
1092
+
u8 event_pending : 1;
1093
+
u8 event_type : 3;
1094
+
u8 reserved : 4;
1095
+
u8 rsvd[3];
1096
+
u32 exception_type;
1097
+
u64 context;
1098
+
} __packed;
1099
+
};
1100
+
1101
+
union hv_x64_interrupt_state_register {
1102
+
u64 as_uint64;
1103
+
struct {
1104
+
u64 interrupt_shadow : 1;
1105
+
u64 nmi_masked : 1;
1106
+
u64 reserved : 62;
1107
+
} __packed;
1108
+
};
1109
+
1110
+
union hv_x64_pending_interruption_register {
1111
+
u64 as_uint64;
1112
+
struct {
1113
+
u32 interruption_pending : 1;
1114
+
u32 interruption_type : 3;
1115
+
u32 deliver_error_code : 1;
1116
+
u32 instruction_length : 4;
1117
+
u32 nested_event : 1;
1118
+
u32 reserved : 6;
1119
+
u32 interruption_vector : 16;
1120
+
u32 error_code;
1121
+
} __packed;
1122
+
};
1123
+
1124
+
union hv_register_value {
1125
+
struct hv_u128 reg128;
1126
+
u64 reg64;
1127
+
u32 reg32;
1128
+
u16 reg16;
1129
+
u8 reg8;
1130
+
1131
+
struct hv_x64_segment_register segment;
1132
+
struct hv_x64_table_register table;
1133
+
union hv_explicit_suspend_register explicit_suspend;
1134
+
union hv_intercept_suspend_register intercept_suspend;
1135
+
union hv_dispatch_suspend_register dispatch_suspend;
1136
+
#ifdef CONFIG_ARM64
1137
+
union hv_arm64_interrupt_state_register interrupt_state;
1138
+
union hv_arm64_pending_interruption_register pending_interruption;
1139
+
#endif
1140
+
#ifdef CONFIG_X86
1141
+
union hv_x64_interrupt_state_register interrupt_state;
1142
+
union hv_x64_pending_interruption_register pending_interruption;
1143
+
#endif
1144
+
union hv_arm64_pending_synthetic_exception_event pending_synthetic_exception_event;
1145
+
};
1146
+
1147
+
/* NOTE: Linux helper struct - NOT from Hyper-V code. */
1148
+
struct hv_output_get_vp_registers {
1149
+
DECLARE_FLEX_ARRAY(union hv_register_value, values);
1150
+
};
1151
+
1152
+
#if defined(CONFIG_ARM64)
1153
+
/* HvGetVpRegisters returns an array of these output elements */
1154
+
struct hv_get_vp_registers_output {
1155
+
union {
1156
+
struct {
1157
+
u32 a;
1158
+
u32 b;
1159
+
u32 c;
1160
+
u32 d;
1161
+
} as32 __packed;
1162
+
struct {
1163
+
u64 low;
1164
+
u64 high;
1165
+
} as64 __packed;
1166
+
};
1167
+
};
1168
+
1169
+
#endif /* CONFIG_ARM64 */
1170
+
1171
+
struct hv_register_assoc {
1172
+
u32 name; /* enum hv_register_name */
1173
+
u32 reserved1;
1174
+
u64 reserved2;
1175
+
union hv_register_value value;
1176
+
} __packed;
1177
+
1178
+
struct hv_input_get_vp_registers {
1179
+
u64 partition_id;
1180
+
u32 vp_index;
1181
+
union hv_input_vtl input_vtl;
1182
+
u8 rsvd_z8;
1183
+
u16 rsvd_z16;
1184
+
u32 names[];
1185
+
} __packed;
1186
+
1187
+
struct hv_input_set_vp_registers {
1188
+
u64 partition_id;
1189
+
u32 vp_index;
1190
+
union hv_input_vtl input_vtl;
1191
+
u8 rsvd_z8;
1192
+
u16 rsvd_z16;
1193
+
struct hv_register_assoc elements[];
1194
+
} __packed;
1195
+
1196
+
#define HV_UNMAP_GPA_LARGE_PAGE 0x2
1197
+
1198
+
/* HvCallSendSyntheticClusterIpi hypercall */
1199
+
struct hv_send_ipi { /* HV_INPUT_SEND_SYNTHETIC_CLUSTER_IPI */
1200
+
u32 vector;
1201
+
u32 reserved;
1202
+
u64 cpu_mask;
1203
+
} __packed;
1204
+
1205
+
#define HV_X64_VTL_MASK GENMASK(3, 0)
1206
+
1207
+
/* Hyper-V memory host visibility */
1208
+
enum hv_mem_host_visibility {
1209
+
VMBUS_PAGE_NOT_VISIBLE = 0,
1210
+
VMBUS_PAGE_VISIBLE_READ_ONLY = 1,
1211
+
VMBUS_PAGE_VISIBLE_READ_WRITE = 3
1212
+
};
1213
+
1214
+
/* HvCallModifySparseGpaPageHostVisibility hypercall */
1215
+
#define HV_MAX_MODIFY_GPA_REP_COUNT ((HV_HYP_PAGE_SIZE / sizeof(u64)) - 2)
1216
+
struct hv_gpa_range_for_visibility {
1217
+
u64 partition_id;
1218
+
u32 host_visibility : 2;
1219
+
u32 reserved0 : 30;
1220
+
u32 reserved1;
1221
+
u64 gpa_page_list[HV_MAX_MODIFY_GPA_REP_COUNT];
1222
+
} __packed;
1223
+
1224
+
#if defined(CONFIG_X86)
1225
+
union hv_msi_address_register { /* HV_MSI_ADDRESS */
1226
+
u32 as_uint32;
1227
+
struct {
1228
+
u32 reserved1 : 2;
1229
+
u32 destination_mode : 1;
1230
+
u32 redirection_hint : 1;
1231
+
u32 reserved2 : 8;
1232
+
u32 destination_id : 8;
1233
+
u32 msi_base : 12;
1234
+
};
1235
+
} __packed;
1236
+
1237
+
union hv_msi_data_register { /* HV_MSI_ENTRY.Data */
1238
+
u32 as_uint32;
1239
+
struct {
1240
+
u32 vector : 8;
1241
+
u32 delivery_mode : 3;
1242
+
u32 reserved1 : 3;
1243
+
u32 level_assert : 1;
1244
+
u32 trigger_mode : 1;
1245
+
u32 reserved2 : 16;
1246
+
};
1247
+
} __packed;
1248
+
1249
+
union hv_msi_entry { /* HV_MSI_ENTRY */
1250
+
1251
+
u64 as_uint64;
1252
+
struct {
1253
+
union hv_msi_address_register address;
1254
+
union hv_msi_data_register data;
1255
+
} __packed;
1256
+
};
1257
+
1258
+
#elif defined(CONFIG_ARM64) /* CONFIG_X86 */
1259
+
1260
+
union hv_msi_entry {
1261
+
u64 as_uint64[2];
1262
+
struct {
1263
+
u64 address;
1264
+
u32 data;
1265
+
u32 reserved;
1266
+
} __packed;
1267
+
};
1268
+
#endif /* CONFIG_ARM64 */
1269
+
1270
+
union hv_ioapic_rte {
1271
+
u64 as_uint64;
1272
+
1273
+
struct {
1274
+
u32 vector : 8;
1275
+
u32 delivery_mode : 3;
1276
+
u32 destination_mode : 1;
1277
+
u32 delivery_status : 1;
1278
+
u32 interrupt_polarity : 1;
1279
+
u32 remote_irr : 1;
1280
+
u32 trigger_mode : 1;
1281
+
u32 interrupt_mask : 1;
1282
+
u32 reserved1 : 15;
1283
+
1284
+
u32 reserved2 : 24;
1285
+
u32 destination_id : 8;
1286
+
};
1287
+
1288
+
struct {
1289
+
u32 low_uint32;
1290
+
u32 high_uint32;
1291
+
};
1292
+
} __packed;
1293
+
1294
+
enum hv_interrupt_source { /* HV_INTERRUPT_SOURCE */
1295
+
HV_INTERRUPT_SOURCE_MSI = 1, /* MSI and MSI-X */
1296
+
HV_INTERRUPT_SOURCE_IOAPIC,
1297
+
};
1298
+
1299
+
struct hv_interrupt_entry { /* HV_INTERRUPT_ENTRY */
1300
+
u32 source;
1301
+
u32 reserved1;
1302
+
union {
1303
+
union hv_msi_entry msi_entry;
1304
+
union hv_ioapic_rte ioapic_rte;
1305
+
};
1306
+
} __packed;
1307
+
1308
+
#define HV_DEVICE_INTERRUPT_TARGET_MULTICAST 1
1309
+
#define HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET 2
1310
+
1311
+
struct hv_device_interrupt_target { /* HV_DEVICE_INTERRUPT_TARGET */
1312
+
u32 vector;
1313
+
u32 flags; /* HV_DEVICE_INTERRUPT_TARGET_* above */
1314
+
union {
1315
+
u64 vp_mask;
1316
+
struct hv_vpset vp_set;
1317
+
};
1318
+
} __packed;
1319
+
1320
+
struct hv_retarget_device_interrupt { /* HV_INPUT_RETARGET_DEVICE_INTERRUPT */
1321
+
u64 partition_id; /* use "self" */
1322
+
u64 device_id;
1323
+
struct hv_interrupt_entry int_entry;
1324
+
u64 reserved2;
1325
+
struct hv_device_interrupt_target int_target;
1326
+
} __packed __aligned(8);
1327
+
1328
+
/* Data structures for HVCALL_MMIO_READ and HVCALL_MMIO_WRITE */
1329
+
#define HV_HYPERCALL_MMIO_MAX_DATA_LENGTH 64
1330
+
1331
+
struct hv_mmio_read_input { /* HV_INPUT_MEMORY_MAPPED_IO_READ */
1332
+
u64 gpa;
1333
+
u32 size;
1334
+
u32 reserved;
1335
+
} __packed;
1336
+
1337
+
struct hv_mmio_read_output {
1338
+
u8 data[HV_HYPERCALL_MMIO_MAX_DATA_LENGTH];
1339
+
} __packed;
1340
+
1341
+
struct hv_mmio_write_input {
1342
+
u64 gpa;
1343
+
u32 size;
1344
+
u32 reserved;
1345
+
u8 data[HV_HYPERCALL_MMIO_MAX_DATA_LENGTH];
1346
+
} __packed;
1347
+
1348
+
#endif /* _HV_HVGDK_MINI_H */
+733
include/hyperv/hvhdk.h
+733
include/hyperv/hvhdk.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0 */
2
+
/*
3
+
* Type definitions for the Microsoft hypervisor.
4
+
*/
5
+
#ifndef _HV_HVHDK_H
6
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#define _HV_HVHDK_H
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#include <linux/build_bug.h>
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#include "hvhdk_mini.h"
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#include "hvgdk.h"
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/* Bits for dirty mask of hv_vp_register_page */
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#define HV_X64_REGISTER_CLASS_GENERAL 0
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#define HV_X64_REGISTER_CLASS_IP 1
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#define HV_X64_REGISTER_CLASS_XMM 2
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#define HV_X64_REGISTER_CLASS_SEGMENT 3
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#define HV_X64_REGISTER_CLASS_FLAGS 4
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#define HV_VP_REGISTER_PAGE_VERSION_1 1u
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struct hv_vp_register_page {
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u16 version;
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u8 isvalid;
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u8 rsvdz;
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u32 dirty;
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union {
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struct {
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/* General purpose registers
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* (HV_X64_REGISTER_CLASS_GENERAL)
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*/
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union {
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struct {
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u64 rax;
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u64 rcx;
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u64 rdx;
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u64 rbx;
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u64 rsp;
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u64 rbp;
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u64 rsi;
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u64 rdi;
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u64 r8;
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u64 r9;
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u64 r10;
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u64 r11;
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u64 r12;
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u64 r13;
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u64 r14;
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u64 r15;
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} __packed;
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u64 gp_registers[16];
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};
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/* Instruction pointer (HV_X64_REGISTER_CLASS_IP) */
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u64 rip;
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/* Flags (HV_X64_REGISTER_CLASS_FLAGS) */
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u64 rflags;
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} __packed;
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u64 registers[18];
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};
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/* Volatile XMM registers (HV_X64_REGISTER_CLASS_XMM) */
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union {
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struct {
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struct hv_u128 xmm0;
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struct hv_u128 xmm1;
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struct hv_u128 xmm2;
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struct hv_u128 xmm3;
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struct hv_u128 xmm4;
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struct hv_u128 xmm5;
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} __packed;
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struct hv_u128 xmm_registers[6];
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};
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/* Segment registers (HV_X64_REGISTER_CLASS_SEGMENT) */
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union {
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struct {
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struct hv_x64_segment_register es;
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struct hv_x64_segment_register cs;
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struct hv_x64_segment_register ss;
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struct hv_x64_segment_register ds;
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struct hv_x64_segment_register fs;
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struct hv_x64_segment_register gs;
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} __packed;
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struct hv_x64_segment_register segment_registers[6];
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};
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/* Misc. control registers (cannot be set via this interface) */
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u64 cr0;
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u64 cr3;
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u64 cr4;
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u64 cr8;
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u64 efer;
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u64 dr7;
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union hv_x64_pending_interruption_register pending_interruption;
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union hv_x64_interrupt_state_register interrupt_state;
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u64 instruction_emulation_hints;
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} __packed;
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#define HV_PARTITION_PROCESSOR_FEATURES_BANKS 2
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union hv_partition_processor_features {
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u64 as_uint64[HV_PARTITION_PROCESSOR_FEATURES_BANKS];
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struct {
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u64 sse3_support : 1;
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u64 lahf_sahf_support : 1;
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u64 ssse3_support : 1;
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u64 sse4_1_support : 1;
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u64 sse4_2_support : 1;
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u64 sse4a_support : 1;
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u64 xop_support : 1;
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u64 pop_cnt_support : 1;
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u64 cmpxchg16b_support : 1;
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u64 altmovcr8_support : 1;
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u64 lzcnt_support : 1;
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u64 mis_align_sse_support : 1;
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u64 mmx_ext_support : 1;
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u64 amd3dnow_support : 1;
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u64 extended_amd3dnow_support : 1;
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u64 page_1gb_support : 1;
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u64 aes_support : 1;
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u64 pclmulqdq_support : 1;
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u64 pcid_support : 1;
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u64 fma4_support : 1;
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u64 f16c_support : 1;
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u64 rd_rand_support : 1;
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u64 rd_wr_fs_gs_support : 1;
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u64 smep_support : 1;
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u64 enhanced_fast_string_support : 1;
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u64 bmi1_support : 1;
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u64 bmi2_support : 1;
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u64 hle_support_deprecated : 1;
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u64 rtm_support_deprecated : 1;
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u64 movbe_support : 1;
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u64 npiep1_support : 1;
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u64 dep_x87_fpu_save_support : 1;
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u64 rd_seed_support : 1;
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u64 adx_support : 1;
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u64 intel_prefetch_support : 1;
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u64 smap_support : 1;
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u64 hle_support : 1;
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u64 rtm_support : 1;
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u64 rdtscp_support : 1;
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u64 clflushopt_support : 1;
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u64 clwb_support : 1;
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u64 sha_support : 1;
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u64 x87_pointers_saved_support : 1;
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u64 invpcid_support : 1;
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u64 ibrs_support : 1;
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u64 stibp_support : 1;
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u64 ibpb_support: 1;
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u64 unrestricted_guest_support : 1;
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u64 mdd_support : 1;
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u64 fast_short_rep_mov_support : 1;
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u64 l1dcache_flush_support : 1;
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u64 rdcl_no_support : 1;
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u64 ibrs_all_support : 1;
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u64 skip_l1df_support : 1;
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u64 ssb_no_support : 1;
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u64 rsb_a_no_support : 1;
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u64 virt_spec_ctrl_support : 1;
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u64 rd_pid_support : 1;
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u64 umip_support : 1;
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u64 mbs_no_support : 1;
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u64 mb_clear_support : 1;
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u64 taa_no_support : 1;
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u64 tsx_ctrl_support : 1;
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/*
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* N.B. The final processor feature bit in bank 0 is reserved to
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* simplify potential downlevel backports.
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*/
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u64 reserved_bank0 : 1;
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/* N.B. Begin bank 1 processor features. */
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u64 acount_mcount_support : 1;
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u64 tsc_invariant_support : 1;
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u64 cl_zero_support : 1;
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u64 rdpru_support : 1;
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u64 la57_support : 1;
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u64 mbec_support : 1;
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u64 nested_virt_support : 1;
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u64 psfd_support : 1;
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u64 cet_ss_support : 1;
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u64 cet_ibt_support : 1;
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u64 vmx_exception_inject_support : 1;
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u64 enqcmd_support : 1;
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u64 umwait_tpause_support : 1;
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u64 movdiri_support : 1;
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u64 movdir64b_support : 1;
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u64 cldemote_support : 1;
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u64 serialize_support : 1;
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u64 tsc_deadline_tmr_support : 1;
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u64 tsc_adjust_support : 1;
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u64 fzlrep_movsb : 1;
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u64 fsrep_stosb : 1;
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u64 fsrep_cmpsb : 1;
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u64 reserved_bank1 : 42;
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} __packed;
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};
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union hv_partition_processor_xsave_features {
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struct {
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u64 xsave_support : 1;
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u64 xsaveopt_support : 1;
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u64 avx_support : 1;
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u64 reserved1 : 61;
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} __packed;
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u64 as_uint64;
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};
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struct hv_partition_creation_properties {
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union hv_partition_processor_features disabled_processor_features;
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union hv_partition_processor_xsave_features
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disabled_processor_xsave_features;
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} __packed;
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+
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#define HV_PARTITION_SYNTHETIC_PROCESSOR_FEATURES_BANKS 1
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union hv_partition_synthetic_processor_features {
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u64 as_uint64[HV_PARTITION_SYNTHETIC_PROCESSOR_FEATURES_BANKS];
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struct {
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u64 hypervisor_present : 1;
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/* Support for HV#1: (CPUID leaves 0x40000000 - 0x40000006)*/
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u64 hv1 : 1;
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u64 access_vp_run_time_reg : 1; /* HV_X64_MSR_VP_RUNTIME */
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u64 access_partition_reference_counter : 1; /* HV_X64_MSR_TIME_REF_COUNT */
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u64 access_synic_regs : 1; /* SINT-related registers */
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/*
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* Access to HV_X64_MSR_STIMER0_CONFIG through
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* HV_X64_MSR_STIMER3_COUNT.
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*/
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u64 access_synthetic_timer_regs : 1;
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u64 access_intr_ctrl_regs : 1; /* APIC MSRs and VP assist page*/
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/* HV_X64_MSR_GUEST_OS_ID and HV_X64_MSR_HYPERCALL */
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u64 access_hypercall_regs : 1;
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u64 access_vp_index : 1;
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u64 access_partition_reference_tsc : 1;
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u64 access_guest_idle_reg : 1;
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u64 access_frequency_regs : 1;
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u64 reserved_z12 : 1;
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u64 reserved_z13 : 1;
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u64 reserved_z14 : 1;
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u64 enable_extended_gva_ranges_for_flush_virtual_address_list : 1;
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u64 reserved_z16 : 1;
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u64 reserved_z17 : 1;
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/* Use fast hypercall output. Corresponds to privilege. */
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u64 fast_hypercall_output : 1;
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u64 reserved_z19 : 1;
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u64 start_virtual_processor : 1; /* Can start VPs */
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u64 reserved_z21 : 1;
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/* Synthetic timers in direct mode. */
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u64 direct_synthetic_timers : 1;
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u64 reserved_z23 : 1;
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u64 extended_processor_masks : 1;
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/* Enable various hypercalls */
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u64 tb_flush_hypercalls : 1;
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u64 synthetic_cluster_ipi : 1;
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u64 notify_long_spin_wait : 1;
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u64 query_numa_distance : 1;
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u64 signal_events : 1;
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u64 retarget_device_interrupt : 1;
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u64 restore_time : 1;
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+
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/* EnlightenedVmcs nested enlightenment is supported. */
267
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u64 enlightened_vmcs : 1;
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u64 reserved : 31;
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} __packed;
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};
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+
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#define HV_MAKE_COMPATIBILITY_VERSION(major_, minor_) \
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((u32)((major_) << 8 | (minor_)))
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+
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#define HV_COMPATIBILITY_21_H2 HV_MAKE_COMPATIBILITY_VERSION(0X6, 0X9)
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+
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union hv_partition_isolation_properties {
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u64 as_uint64;
279
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struct {
280
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u64 isolation_type: 5;
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u64 isolation_host_type : 2;
282
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u64 rsvd_z: 5;
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u64 shared_gpa_boundary_page_number: 52;
284
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} __packed;
285
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};
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+
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/*
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* Various isolation types supported by MSHV.
289
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*/
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#define HV_PARTITION_ISOLATION_TYPE_NONE 0
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#define HV_PARTITION_ISOLATION_TYPE_SNP 2
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#define HV_PARTITION_ISOLATION_TYPE_TDX 3
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+
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/*
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* Various host isolation types supported by MSHV.
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*/
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#define HV_PARTITION_ISOLATION_HOST_TYPE_NONE 0x0
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#define HV_PARTITION_ISOLATION_HOST_TYPE_HARDWARE 0x1
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#define HV_PARTITION_ISOLATION_HOST_TYPE_RESERVED 0x2
300
+
301
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/* Note: Exo partition is enabled by default */
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#define HV_PARTITION_CREATION_FLAG_EXO_PARTITION BIT(8)
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#define HV_PARTITION_CREATION_FLAG_LAPIC_ENABLED BIT(13)
304
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#define HV_PARTITION_CREATION_FLAG_INTERCEPT_MESSAGE_PAGE_ENABLED BIT(19)
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#define HV_PARTITION_CREATION_FLAG_X2APIC_CAPABLE BIT(22)
306
+
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struct hv_input_create_partition {
308
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u64 flags;
309
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struct hv_proximity_domain_info proximity_domain_info;
310
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u32 compatibility_version;
311
+
u32 padding;
312
+
struct hv_partition_creation_properties partition_creation_properties;
313
+
union hv_partition_isolation_properties isolation_properties;
314
+
} __packed;
315
+
316
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struct hv_output_create_partition {
317
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u64 partition_id;
318
+
} __packed;
319
+
320
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struct hv_input_initialize_partition {
321
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u64 partition_id;
322
+
} __packed;
323
+
324
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struct hv_input_finalize_partition {
325
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u64 partition_id;
326
+
} __packed;
327
+
328
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struct hv_input_delete_partition {
329
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u64 partition_id;
330
+
} __packed;
331
+
332
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struct hv_input_get_partition_property {
333
+
u64 partition_id;
334
+
u32 property_code; /* enum hv_partition_property_code */
335
+
u32 padding;
336
+
} __packed;
337
+
338
+
struct hv_output_get_partition_property {
339
+
u64 property_value;
340
+
} __packed;
341
+
342
+
struct hv_input_set_partition_property {
343
+
u64 partition_id;
344
+
u32 property_code; /* enum hv_partition_property_code */
345
+
u32 padding;
346
+
u64 property_value;
347
+
} __packed;
348
+
349
+
enum hv_vp_state_page_type {
350
+
HV_VP_STATE_PAGE_REGISTERS = 0,
351
+
HV_VP_STATE_PAGE_INTERCEPT_MESSAGE = 1,
352
+
HV_VP_STATE_PAGE_COUNT
353
+
};
354
+
355
+
struct hv_input_map_vp_state_page {
356
+
u64 partition_id;
357
+
u32 vp_index;
358
+
u32 type; /* enum hv_vp_state_page_type */
359
+
} __packed;
360
+
361
+
struct hv_output_map_vp_state_page {
362
+
u64 map_location; /* GPA page number */
363
+
} __packed;
364
+
365
+
struct hv_input_unmap_vp_state_page {
366
+
u64 partition_id;
367
+
u32 vp_index;
368
+
u32 type; /* enum hv_vp_state_page_type */
369
+
} __packed;
370
+
371
+
struct hv_opaque_intercept_message {
372
+
u32 vp_index;
373
+
} __packed;
374
+
375
+
enum hv_port_type {
376
+
HV_PORT_TYPE_MESSAGE = 1,
377
+
HV_PORT_TYPE_EVENT = 2,
378
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HV_PORT_TYPE_MONITOR = 3,
379
+
HV_PORT_TYPE_DOORBELL = 4 /* Root Partition only */
380
+
};
381
+
382
+
struct hv_port_info {
383
+
u32 port_type; /* enum hv_port_type */
384
+
u32 padding;
385
+
union {
386
+
struct {
387
+
u32 target_sint;
388
+
u32 target_vp;
389
+
u64 rsvdz;
390
+
} message_port_info;
391
+
struct {
392
+
u32 target_sint;
393
+
u32 target_vp;
394
+
u16 base_flag_number;
395
+
u16 flag_count;
396
+
u32 rsvdz;
397
+
} event_port_info;
398
+
struct {
399
+
u64 monitor_address;
400
+
u64 rsvdz;
401
+
} monitor_port_info;
402
+
struct {
403
+
u32 target_sint;
404
+
u32 target_vp;
405
+
u64 rsvdz;
406
+
} doorbell_port_info;
407
+
};
408
+
} __packed;
409
+
410
+
struct hv_connection_info {
411
+
u32 port_type;
412
+
u32 padding;
413
+
union {
414
+
struct {
415
+
u64 rsvdz;
416
+
} message_connection_info;
417
+
struct {
418
+
u64 rsvdz;
419
+
} event_connection_info;
420
+
struct {
421
+
u64 monitor_address;
422
+
} monitor_connection_info;
423
+
struct {
424
+
u64 gpa;
425
+
u64 trigger_value;
426
+
u64 flags;
427
+
} doorbell_connection_info;
428
+
};
429
+
} __packed;
430
+
431
+
/* Define synthetic interrupt controller flag constants. */
432
+
#define HV_EVENT_FLAGS_COUNT (256 * 8)
433
+
#define HV_EVENT_FLAGS_BYTE_COUNT (256)
434
+
#define HV_EVENT_FLAGS32_COUNT (256 / sizeof(u32))
435
+
436
+
/* linux side we create long version of flags to use long bit ops on flags */
437
+
#define HV_EVENT_FLAGS_UL_COUNT (256 / sizeof(ulong))
438
+
439
+
/* Define the synthetic interrupt controller event flags format. */
440
+
union hv_synic_event_flags {
441
+
unsigned char flags8[HV_EVENT_FLAGS_BYTE_COUNT];
442
+
u32 flags32[HV_EVENT_FLAGS32_COUNT];
443
+
ulong flags[HV_EVENT_FLAGS_UL_COUNT]; /* linux only */
444
+
};
445
+
446
+
struct hv_synic_event_flags_page {
447
+
volatile union hv_synic_event_flags event_flags[HV_SYNIC_SINT_COUNT];
448
+
};
449
+
450
+
#define HV_SYNIC_EVENT_RING_MESSAGE_COUNT 63
451
+
452
+
struct hv_synic_event_ring {
453
+
u8 signal_masked;
454
+
u8 ring_full;
455
+
u16 reserved_z;
456
+
u32 data[HV_SYNIC_EVENT_RING_MESSAGE_COUNT];
457
+
} __packed;
458
+
459
+
struct hv_synic_event_ring_page {
460
+
struct hv_synic_event_ring sint_event_ring[HV_SYNIC_SINT_COUNT];
461
+
};
462
+
463
+
/* Define SynIC control register. */
464
+
union hv_synic_scontrol {
465
+
u64 as_uint64;
466
+
struct {
467
+
u64 enable : 1;
468
+
u64 reserved : 63;
469
+
} __packed;
470
+
};
471
+
472
+
/* Define the format of the SIEFP register */
473
+
union hv_synic_siefp {
474
+
u64 as_uint64;
475
+
struct {
476
+
u64 siefp_enabled : 1;
477
+
u64 preserved : 11;
478
+
u64 base_siefp_gpa : 52;
479
+
} __packed;
480
+
};
481
+
482
+
union hv_synic_sirbp {
483
+
u64 as_uint64;
484
+
struct {
485
+
u64 sirbp_enabled : 1;
486
+
u64 preserved : 11;
487
+
u64 base_sirbp_gpa : 52;
488
+
} __packed;
489
+
};
490
+
491
+
union hv_interrupt_control {
492
+
u64 as_uint64;
493
+
struct {
494
+
u32 interrupt_type; /* enum hv_interrupt_type */
495
+
u32 level_triggered : 1;
496
+
u32 logical_dest_mode : 1;
497
+
u32 rsvd : 30;
498
+
} __packed;
499
+
};
500
+
501
+
struct hv_stimer_state {
502
+
struct {
503
+
u32 undelivered_msg_pending : 1;
504
+
u32 reserved : 31;
505
+
} __packed flags;
506
+
u32 resvd;
507
+
u64 config;
508
+
u64 count;
509
+
u64 adjustment;
510
+
u64 undelivered_exp_time;
511
+
} __packed;
512
+
513
+
struct hv_synthetic_timers_state {
514
+
struct hv_stimer_state timers[HV_SYNIC_STIMER_COUNT];
515
+
u64 reserved[5];
516
+
} __packed;
517
+
518
+
union hv_input_delete_vp {
519
+
u64 as_uint64[2];
520
+
struct {
521
+
u64 partition_id;
522
+
u32 vp_index;
523
+
u8 reserved[4];
524
+
} __packed;
525
+
} __packed;
526
+
527
+
struct hv_input_assert_virtual_interrupt {
528
+
u64 partition_id;
529
+
union hv_interrupt_control control;
530
+
u64 dest_addr; /* cpu's apic id */
531
+
u32 vector;
532
+
u8 target_vtl;
533
+
u8 rsvd_z0;
534
+
u16 rsvd_z1;
535
+
} __packed;
536
+
537
+
struct hv_input_create_port {
538
+
u64 port_partition_id;
539
+
union hv_port_id port_id;
540
+
u8 port_vtl;
541
+
u8 min_connection_vtl;
542
+
u16 padding;
543
+
u64 connection_partition_id;
544
+
struct hv_port_info port_info;
545
+
struct hv_proximity_domain_info proximity_domain_info;
546
+
} __packed;
547
+
548
+
union hv_input_delete_port {
549
+
u64 as_uint64[2];
550
+
struct {
551
+
u64 port_partition_id;
552
+
union hv_port_id port_id;
553
+
u32 reserved;
554
+
};
555
+
} __packed;
556
+
557
+
struct hv_input_connect_port {
558
+
u64 connection_partition_id;
559
+
union hv_connection_id connection_id;
560
+
u8 connection_vtl;
561
+
u8 rsvdz0;
562
+
u16 rsvdz1;
563
+
u64 port_partition_id;
564
+
union hv_port_id port_id;
565
+
u32 reserved2;
566
+
struct hv_connection_info connection_info;
567
+
struct hv_proximity_domain_info proximity_domain_info;
568
+
} __packed;
569
+
570
+
union hv_input_disconnect_port {
571
+
u64 as_uint64[2];
572
+
struct {
573
+
u64 connection_partition_id;
574
+
union hv_connection_id connection_id;
575
+
u32 is_doorbell: 1;
576
+
u32 reserved: 31;
577
+
} __packed;
578
+
} __packed;
579
+
580
+
union hv_input_notify_port_ring_empty {
581
+
u64 as_uint64;
582
+
struct {
583
+
u32 sint_index;
584
+
u32 reserved;
585
+
};
586
+
} __packed;
587
+
588
+
struct hv_vp_state_data_xsave {
589
+
u64 flags;
590
+
union hv_x64_xsave_xfem_register states;
591
+
} __packed;
592
+
593
+
/*
594
+
* For getting and setting VP state, there are two options based on the state type:
595
+
*
596
+
* 1.) Data that is accessed by PFNs in the input hypercall page. This is used
597
+
* for state which may not fit into the hypercall pages.
598
+
* 2.) Data that is accessed directly in the input\output hypercall pages.
599
+
* This is used for state that will always fit into the hypercall pages.
600
+
*
601
+
* In the future this could be dynamic based on the size if needed.
602
+
*
603
+
* Note these hypercalls have an 8-byte aligned variable header size as per the tlfs
604
+
*/
605
+
606
+
#define HV_GET_SET_VP_STATE_TYPE_PFN BIT(31)
607
+
608
+
enum hv_get_set_vp_state_type {
609
+
/* HvGetSetVpStateLocalInterruptControllerState - APIC/GIC state */
610
+
HV_GET_SET_VP_STATE_LAPIC_STATE = 0 | HV_GET_SET_VP_STATE_TYPE_PFN,
611
+
HV_GET_SET_VP_STATE_XSAVE = 1 | HV_GET_SET_VP_STATE_TYPE_PFN,
612
+
HV_GET_SET_VP_STATE_SIM_PAGE = 2 | HV_GET_SET_VP_STATE_TYPE_PFN,
613
+
HV_GET_SET_VP_STATE_SIEF_PAGE = 3 | HV_GET_SET_VP_STATE_TYPE_PFN,
614
+
HV_GET_SET_VP_STATE_SYNTHETIC_TIMERS = 4,
615
+
};
616
+
617
+
struct hv_vp_state_data {
618
+
u32 type;
619
+
u32 rsvd;
620
+
struct hv_vp_state_data_xsave xsave;
621
+
} __packed;
622
+
623
+
struct hv_input_get_vp_state {
624
+
u64 partition_id;
625
+
u32 vp_index;
626
+
u8 input_vtl;
627
+
u8 rsvd0;
628
+
u16 rsvd1;
629
+
struct hv_vp_state_data state_data;
630
+
u64 output_data_pfns[];
631
+
} __packed;
632
+
633
+
union hv_output_get_vp_state {
634
+
struct hv_synthetic_timers_state synthetic_timers_state;
635
+
} __packed;
636
+
637
+
union hv_input_set_vp_state_data {
638
+
u64 pfns;
639
+
u8 bytes;
640
+
} __packed;
641
+
642
+
struct hv_input_set_vp_state {
643
+
u64 partition_id;
644
+
u32 vp_index;
645
+
u8 input_vtl;
646
+
u8 rsvd0;
647
+
u16 rsvd1;
648
+
struct hv_vp_state_data state_data;
649
+
union hv_input_set_vp_state_data data[];
650
+
} __packed;
651
+
652
+
/*
653
+
* Dispatch state for the VP communicated by the hypervisor to the
654
+
* VP-dispatching thread in the root on return from HVCALL_DISPATCH_VP.
655
+
*/
656
+
enum hv_vp_dispatch_state {
657
+
HV_VP_DISPATCH_STATE_INVALID = 0,
658
+
HV_VP_DISPATCH_STATE_BLOCKED = 1,
659
+
HV_VP_DISPATCH_STATE_READY = 2,
660
+
};
661
+
662
+
/*
663
+
* Dispatch event that caused the current dispatch state on return from
664
+
* HVCALL_DISPATCH_VP.
665
+
*/
666
+
enum hv_vp_dispatch_event {
667
+
HV_VP_DISPATCH_EVENT_INVALID = 0x00000000,
668
+
HV_VP_DISPATCH_EVENT_SUSPEND = 0x00000001,
669
+
HV_VP_DISPATCH_EVENT_INTERCEPT = 0x00000002,
670
+
};
671
+
672
+
#define HV_ROOT_SCHEDULER_MAX_VPS_PER_CHILD_PARTITION 1024
673
+
/* The maximum array size of HV_GENERIC_SET (vp_set) buffer */
674
+
#define HV_GENERIC_SET_QWORD_COUNT(max) (((((max) - 1) >> 6) + 1) + 2)
675
+
676
+
struct hv_vp_signal_bitset_scheduler_message {
677
+
u64 partition_id;
678
+
u32 overflow_count;
679
+
u16 vp_count;
680
+
u16 reserved;
681
+
682
+
#define BITSET_BUFFER_SIZE \
683
+
HV_GENERIC_SET_QWORD_COUNT(HV_ROOT_SCHEDULER_MAX_VPS_PER_CHILD_PARTITION)
684
+
union {
685
+
struct hv_vpset bitset;
686
+
u64 bitset_buffer[BITSET_BUFFER_SIZE];
687
+
} vp_bitset;
688
+
#undef BITSET_BUFFER_SIZE
689
+
} __packed;
690
+
691
+
static_assert(sizeof(struct hv_vp_signal_bitset_scheduler_message) <=
692
+
(sizeof(struct hv_message) - sizeof(struct hv_message_header)));
693
+
694
+
#define HV_MESSAGE_MAX_PARTITION_VP_PAIR_COUNT \
695
+
(((sizeof(struct hv_message) - sizeof(struct hv_message_header)) / \
696
+
(sizeof(u64 /* partition id */) + sizeof(u32 /* vp index */))) - 1)
697
+
698
+
struct hv_vp_signal_pair_scheduler_message {
699
+
u32 overflow_count;
700
+
u8 vp_count;
701
+
u8 reserved1[3];
702
+
703
+
u64 partition_ids[HV_MESSAGE_MAX_PARTITION_VP_PAIR_COUNT];
704
+
u32 vp_indexes[HV_MESSAGE_MAX_PARTITION_VP_PAIR_COUNT];
705
+
706
+
u8 reserved2[4];
707
+
} __packed;
708
+
709
+
static_assert(sizeof(struct hv_vp_signal_pair_scheduler_message) ==
710
+
(sizeof(struct hv_message) - sizeof(struct hv_message_header)));
711
+
712
+
/* Input and output structures for HVCALL_DISPATCH_VP */
713
+
#define HV_DISPATCH_VP_FLAG_CLEAR_INTERCEPT_SUSPEND 0x1
714
+
#define HV_DISPATCH_VP_FLAG_ENABLE_CALLER_INTERRUPTS 0x2
715
+
#define HV_DISPATCH_VP_FLAG_SET_CALLER_SPEC_CTRL 0x4
716
+
#define HV_DISPATCH_VP_FLAG_SKIP_VP_SPEC_FLUSH 0x8
717
+
#define HV_DISPATCH_VP_FLAG_SKIP_CALLER_SPEC_FLUSH 0x10
718
+
#define HV_DISPATCH_VP_FLAG_SKIP_CALLER_USER_SPEC_FLUSH 0x20
719
+
720
+
struct hv_input_dispatch_vp {
721
+
u64 partition_id;
722
+
u32 vp_index;
723
+
u32 flags;
724
+
u64 time_slice; /* in 100ns */
725
+
u64 spec_ctrl;
726
+
} __packed;
727
+
728
+
struct hv_output_dispatch_vp {
729
+
u32 dispatch_state; /* enum hv_vp_dispatch_state */
730
+
u32 dispatch_event; /* enum hv_vp_dispatch_event */
731
+
} __packed;
732
+
733
+
#endif /* _HV_HVHDK_H */
+311
include/hyperv/hvhdk_mini.h
+311
include/hyperv/hvhdk_mini.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0 */
2
+
/*
3
+
* Type definitions for the Microsoft Hypervisor.
4
+
*/
5
+
#ifndef _HV_HVHDK_MINI_H
6
+
#define _HV_HVHDK_MINI_H
7
+
8
+
#include "hvgdk_mini.h"
9
+
10
+
/*
11
+
* Doorbell connection_info flags.
12
+
*/
13
+
#define HV_DOORBELL_FLAG_TRIGGER_SIZE_MASK 0x00000007
14
+
#define HV_DOORBELL_FLAG_TRIGGER_SIZE_ANY 0x00000000
15
+
#define HV_DOORBELL_FLAG_TRIGGER_SIZE_BYTE 0x00000001
16
+
#define HV_DOORBELL_FLAG_TRIGGER_SIZE_WORD 0x00000002
17
+
#define HV_DOORBELL_FLAG_TRIGGER_SIZE_DWORD 0x00000003
18
+
#define HV_DOORBELL_FLAG_TRIGGER_SIZE_QWORD 0x00000004
19
+
#define HV_DOORBELL_FLAG_TRIGGER_ANY_VALUE 0x80000000
20
+
21
+
/* Each generic set contains 64 elements */
22
+
#define HV_GENERIC_SET_SHIFT (6)
23
+
#define HV_GENERIC_SET_MASK (63)
24
+
25
+
enum hv_generic_set_format {
26
+
HV_GENERIC_SET_SPARSE_4K,
27
+
HV_GENERIC_SET_ALL,
28
+
};
29
+
#define HV_GENERIC_SET_FORMAT hv_generic_set_format
30
+
31
+
enum hv_scheduler_type {
32
+
HV_SCHEDULER_TYPE_LP = 1, /* Classic scheduler w/o SMT */
33
+
HV_SCHEDULER_TYPE_LP_SMT = 2, /* Classic scheduler w/ SMT */
34
+
HV_SCHEDULER_TYPE_CORE_SMT = 3, /* Core scheduler */
35
+
HV_SCHEDULER_TYPE_ROOT = 4, /* Root / integrated scheduler */
36
+
HV_SCHEDULER_TYPE_MAX
37
+
};
38
+
39
+
enum hv_partition_property_code {
40
+
/* Privilege properties */
41
+
HV_PARTITION_PROPERTY_PRIVILEGE_FLAGS = 0x00010000,
42
+
HV_PARTITION_PROPERTY_SYNTHETIC_PROC_FEATURES = 0x00010001,
43
+
44
+
/* Resource properties */
45
+
HV_PARTITION_PROPERTY_GPA_PAGE_ACCESS_TRACKING = 0x00050005,
46
+
HV_PARTITION_PROPERTY_UNIMPLEMENTED_MSR_ACTION = 0x00050017,
47
+
48
+
/* Compatibility properties */
49
+
HV_PARTITION_PROPERTY_PROCESSOR_XSAVE_FEATURES = 0x00060002,
50
+
HV_PARTITION_PROPERTY_MAX_XSAVE_DATA_SIZE = 0x00060008,
51
+
HV_PARTITION_PROPERTY_PROCESSOR_CLOCK_FREQUENCY = 0x00060009,
52
+
};
53
+
54
+
enum hv_system_property {
55
+
/* Add more values when needed */
56
+
HV_SYSTEM_PROPERTY_SCHEDULER_TYPE = 15,
57
+
};
58
+
59
+
struct hv_input_get_system_property {
60
+
u32 property_id; /* enum hv_system_property */
61
+
union {
62
+
u32 as_uint32;
63
+
/* More fields to be filled in when needed */
64
+
};
65
+
} __packed;
66
+
67
+
struct hv_output_get_system_property {
68
+
union {
69
+
u32 scheduler_type; /* enum hv_scheduler_type */
70
+
};
71
+
} __packed;
72
+
73
+
struct hv_proximity_domain_flags {
74
+
u32 proximity_preferred : 1;
75
+
u32 reserved : 30;
76
+
u32 proximity_info_valid : 1;
77
+
} __packed;
78
+
79
+
struct hv_proximity_domain_info {
80
+
u32 domain_id;
81
+
struct hv_proximity_domain_flags flags;
82
+
} __packed;
83
+
84
+
/* HvDepositMemory hypercall */
85
+
struct hv_deposit_memory { /* HV_INPUT_DEPOSIT_MEMORY */
86
+
u64 partition_id;
87
+
u64 gpa_page_list[];
88
+
} __packed;
89
+
90
+
struct hv_input_withdraw_memory {
91
+
u64 partition_id;
92
+
struct hv_proximity_domain_info proximity_domain_info;
93
+
} __packed;
94
+
95
+
struct hv_output_withdraw_memory {
96
+
DECLARE_FLEX_ARRAY(u64, gpa_page_list);
97
+
} __packed;
98
+
99
+
/* HV Map GPA (Guest Physical Address) Flags */
100
+
#define HV_MAP_GPA_PERMISSIONS_NONE 0x0
101
+
#define HV_MAP_GPA_READABLE 0x1
102
+
#define HV_MAP_GPA_WRITABLE 0x2
103
+
#define HV_MAP_GPA_KERNEL_EXECUTABLE 0x4
104
+
#define HV_MAP_GPA_USER_EXECUTABLE 0x8
105
+
#define HV_MAP_GPA_EXECUTABLE 0xC
106
+
#define HV_MAP_GPA_PERMISSIONS_MASK 0xF
107
+
#define HV_MAP_GPA_ADJUSTABLE 0x8000
108
+
#define HV_MAP_GPA_NO_ACCESS 0x10000
109
+
#define HV_MAP_GPA_NOT_CACHED 0x200000
110
+
#define HV_MAP_GPA_LARGE_PAGE 0x80000000
111
+
112
+
struct hv_input_map_gpa_pages {
113
+
u64 target_partition_id;
114
+
u64 target_gpa_base;
115
+
u32 map_flags;
116
+
u32 padding;
117
+
u64 source_gpa_page_list[];
118
+
} __packed;
119
+
120
+
union hv_gpa_page_access_state_flags {
121
+
struct {
122
+
u64 clear_accessed : 1;
123
+
u64 set_accessed : 1;
124
+
u64 clear_dirty : 1;
125
+
u64 set_dirty : 1;
126
+
u64 reserved : 60;
127
+
} __packed;
128
+
u64 as_uint64;
129
+
};
130
+
131
+
struct hv_input_get_gpa_pages_access_state {
132
+
u64 partition_id;
133
+
union hv_gpa_page_access_state_flags flags;
134
+
u64 hv_gpa_page_number;
135
+
} __packed;
136
+
137
+
union hv_gpa_page_access_state {
138
+
struct {
139
+
u8 accessed : 1;
140
+
u8 dirty : 1;
141
+
u8 reserved: 6;
142
+
};
143
+
u8 as_uint8;
144
+
} __packed;
145
+
146
+
struct hv_lp_startup_status {
147
+
u64 hv_status;
148
+
u64 substatus1;
149
+
u64 substatus2;
150
+
u64 substatus3;
151
+
u64 substatus4;
152
+
u64 substatus5;
153
+
u64 substatus6;
154
+
} __packed;
155
+
156
+
struct hv_input_add_logical_processor {
157
+
u32 lp_index;
158
+
u32 apic_id;
159
+
struct hv_proximity_domain_info proximity_domain_info;
160
+
} __packed;
161
+
162
+
struct hv_output_add_logical_processor {
163
+
struct hv_lp_startup_status startup_status;
164
+
} __packed;
165
+
166
+
enum { /* HV_SUBNODE_TYPE */
167
+
HV_SUBNODE_ANY = 0,
168
+
HV_SUBNODE_SOCKET,
169
+
HV_SUBNODE_CLUSTER,
170
+
HV_SUBNODE_L3,
171
+
HV_SUBNODE_COUNT,
172
+
HV_SUBNODE_INVALID = -1
173
+
};
174
+
175
+
struct hv_create_vp { /* HV_INPUT_CREATE_VP */
176
+
u64 partition_id;
177
+
u32 vp_index;
178
+
u8 padding[3];
179
+
u8 subnode_type;
180
+
u64 subnode_id;
181
+
struct hv_proximity_domain_info proximity_domain_info;
182
+
u64 flags;
183
+
} __packed;
184
+
185
+
/* HV_INTERRUPT_TRIGGER_MODE */
186
+
enum hv_interrupt_trigger_mode {
187
+
HV_INTERRUPT_TRIGGER_MODE_EDGE = 0,
188
+
HV_INTERRUPT_TRIGGER_MODE_LEVEL = 1,
189
+
};
190
+
191
+
/* HV_DEVICE_INTERRUPT_DESCRIPTOR */
192
+
struct hv_device_interrupt_descriptor {
193
+
u32 interrupt_type;
194
+
u32 trigger_mode;
195
+
u32 vector_count;
196
+
u32 reserved;
197
+
struct hv_device_interrupt_target target;
198
+
} __packed;
199
+
200
+
/* HV_INPUT_MAP_DEVICE_INTERRUPT */
201
+
struct hv_input_map_device_interrupt {
202
+
u64 partition_id;
203
+
u64 device_id;
204
+
u32 flags;
205
+
u32 base_irt_idx;
206
+
struct hv_interrupt_entry logical_interrupt_entry;
207
+
struct hv_device_interrupt_descriptor interrupt_descriptor;
208
+
} __packed;
209
+
210
+
/* HV_OUTPUT_MAP_DEVICE_INTERRUPT */
211
+
struct hv_output_map_device_interrupt {
212
+
struct hv_interrupt_entry interrupt_entry;
213
+
} __packed;
214
+
215
+
/* HV_INPUT_UNMAP_DEVICE_INTERRUPT */
216
+
struct hv_input_unmap_device_interrupt {
217
+
u64 partition_id;
218
+
u64 device_id;
219
+
struct hv_interrupt_entry interrupt_entry;
220
+
u32 flags;
221
+
} __packed;
222
+
223
+
#define HV_SOURCE_SHADOW_NONE 0x0
224
+
#define HV_SOURCE_SHADOW_BRIDGE_BUS_RANGE 0x1
225
+
226
+
struct hv_send_ipi_ex { /* HV_INPUT_SEND_SYNTHETIC_CLUSTER_IPI_EX */
227
+
u32 vector;
228
+
u32 reserved;
229
+
struct hv_vpset vp_set;
230
+
} __packed;
231
+
232
+
typedef u16 hv_pci_rid; /* HV_PCI_RID */
233
+
typedef u16 hv_pci_segment; /* HV_PCI_SEGMENT */
234
+
typedef u64 hv_logical_device_id;
235
+
union hv_pci_bdf { /* HV_PCI_BDF */
236
+
u16 as_uint16;
237
+
238
+
struct {
239
+
u8 function : 3;
240
+
u8 device : 5;
241
+
u8 bus;
242
+
};
243
+
} __packed;
244
+
245
+
union hv_pci_bus_range {
246
+
u16 as_uint16;
247
+
248
+
struct {
249
+
u8 subordinate_bus;
250
+
u8 secondary_bus;
251
+
};
252
+
} __packed;
253
+
254
+
enum hv_device_type { /* HV_DEVICE_TYPE */
255
+
HV_DEVICE_TYPE_LOGICAL = 0,
256
+
HV_DEVICE_TYPE_PCI = 1,
257
+
HV_DEVICE_TYPE_IOAPIC = 2,
258
+
HV_DEVICE_TYPE_ACPI = 3,
259
+
};
260
+
261
+
union hv_device_id { /* HV_DEVICE_ID */
262
+
u64 as_uint64;
263
+
264
+
struct {
265
+
u64 reserved0 : 62;
266
+
u64 device_type : 2;
267
+
};
268
+
269
+
/* HV_DEVICE_TYPE_LOGICAL */
270
+
struct {
271
+
u64 id : 62;
272
+
u64 device_type : 2;
273
+
} logical;
274
+
275
+
/* HV_DEVICE_TYPE_PCI */
276
+
struct {
277
+
union {
278
+
hv_pci_rid rid;
279
+
union hv_pci_bdf bdf;
280
+
};
281
+
282
+
hv_pci_segment segment;
283
+
union hv_pci_bus_range shadow_bus_range;
284
+
285
+
u16 phantom_function_bits : 2;
286
+
u16 source_shadow : 1;
287
+
288
+
u16 rsvdz0 : 11;
289
+
u16 device_type : 2;
290
+
} pci;
291
+
292
+
/* HV_DEVICE_TYPE_IOAPIC */
293
+
struct {
294
+
u8 ioapic_id;
295
+
u8 rsvdz0;
296
+
u16 rsvdz1;
297
+
u16 rsvdz2;
298
+
299
+
u16 rsvdz3 : 14;
300
+
u16 device_type : 2;
301
+
} ioapic;
302
+
303
+
/* HV_DEVICE_TYPE_ACPI */
304
+
struct {
305
+
u32 input_mapping_base;
306
+
u32 input_mapping_count : 30;
307
+
u32 device_type : 2;
308
+
} acpi;
309
+
} __packed;
310
+
311
+
#endif /* _HV_HVHDK_MINI_H */
+1
-10
include/linux/hyperv.h
+1
-10
include/linux/hyperv.h
···
24
24
#include <linux/mod_devicetable.h>
25
25
#include <linux/interrupt.h>
26
26
#include <linux/reciprocal_div.h>
27
-
#include <asm/hyperv-tlfs.h>
27
+
#include <hyperv/hvhdk.h>
28
28
29
29
#define MAX_PAGE_BUFFER_COUNT 32
30
30
#define MAX_MULTIPAGE_BUFFER_COUNT 32 /* 128K */
···
766
766
struct vmbus_close_msg {
767
767
struct vmbus_channel_msginfo info;
768
768
struct vmbus_channel_close_channel msg;
769
-
};
770
-
771
-
/* Define connection identifier type. */
772
-
union hv_connection_id {
773
-
u32 asu32;
774
-
struct {
775
-
u32 id:24;
776
-
u32 reserved:8;
777
-
} u;
778
769
};
779
770
780
771
enum vmbus_device_type {
+3
-3
net/vmw_vsock/hyperv_transport.c
+3
-3
net/vmw_vsock/hyperv_transport.c
···
13
13
#include <linux/hyperv.h>
14
14
#include <net/sock.h>
15
15
#include <net/af_vsock.h>
16
-
#include <asm/hyperv-tlfs.h>
16
+
#include <hyperv/hvhdk.h>
17
17
18
18
/* Older (VMBUS version 'VERSION_WIN10' or before) Windows hosts have some
19
19
* stricter requirements on the hv_sock ring buffer size of six 4K pages.
20
-
* hyperv-tlfs defines HV_HYP_PAGE_SIZE as 4K. Newer hosts don't have this
21
-
* limitation; but, keep the defaults the same for compat.
20
+
* HV_HYP_PAGE_SIZE is defined as 4K. Newer hosts don't have this limitation;
21
+
* but, keep the defaults the same for compat.
22
22
*/
23
23
#define RINGBUFFER_HVS_RCV_SIZE (HV_HYP_PAGE_SIZE * 6)
24
24
#define RINGBUFFER_HVS_SND_SIZE (HV_HYP_PAGE_SIZE * 6)