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Merge branch 'fixes' of git://git.linaro.org/people/arnd/arm-soc

* 'fixes' of git://git.linaro.org/people/arnd/arm-soc:
mach-integrator: fix VGA base regression
arm/dt: Tegra: Update SDHCI nodes to match bindings
ARM: EXYNOS4: fix incorrect pad configuration for keypad row lines
ARM: SAMSUNG: fix to prevent declaring duplicated
ARM: SAMSUNG: fix watchdog reset issue with clk_get()
ARM: S3C64XX: Remove un-used code backlight code on SMDK6410
ARM: EXYNOS4: restart clocksource while system resumes
ARM: EXYNOS4: Fix routing timer interrupt to offline CPU
ARM: EXYNOS4: Fix return type of local_timer_setup()
ARM: EXYNOS4: Fix wrong pll type for vpll
ARM: Dove: fix second SPI initialization call

+52 -65
+6 -6
arch/arm/boot/dts/tegra-harmony.dts
··· 57 57 }; 58 58 59 59 sdhci@c8000200 { 60 - gpios = <&gpio 69 0>, /* cd, gpio PI5 */ 61 - <&gpio 57 0>, /* wp, gpio PH1 */ 62 - <&gpio 155 0>; /* power, gpio PT3 */ 60 + cd-gpios = <&gpio 69 0>; /* gpio PI5 */ 61 + wp-gpios = <&gpio 57 0>; /* gpio PH1 */ 62 + power-gpios = <&gpio 155 0>; /* gpio PT3 */ 63 63 }; 64 64 65 65 sdhci@c8000600 { 66 - gpios = <&gpio 58 0>, /* cd, gpio PH2 */ 67 - <&gpio 59 0>, /* wp, gpio PH3 */ 68 - <&gpio 70 0>; /* power, gpio PI6 */ 66 + cd-gpios = <&gpio 58 0>; /* gpio PH2 */ 67 + wp-gpios = <&gpio 59 0>; /* gpio PH3 */ 68 + power-gpios = <&gpio 70 0>; /* gpio PI6 */ 69 69 }; 70 70 };
+3 -3
arch/arm/boot/dts/tegra-seaboard.dts
··· 21 21 }; 22 22 23 23 sdhci@c8000400 { 24 - gpios = <&gpio 69 0>, /* cd, gpio PI5 */ 25 - <&gpio 57 0>, /* wp, gpio PH1 */ 26 - <&gpio 70 0>; /* power, gpio PI6 */ 24 + cd-gpios = <&gpio 69 0>; /* gpio PI5 */ 25 + wp-gpios = <&gpio 57 0>; /* gpio PH1 */ 26 + power-gpios = <&gpio 70 0>; /* gpio PI6 */ 27 27 }; 28 28 };
+1 -1
arch/arm/mach-dove/common.c
··· 158 158 159 159 void __init dove_spi1_init(void) 160 160 { 161 - orion_spi_init(DOVE_SPI1_PHYS_BASE, get_tclk()); 161 + orion_spi_1_init(DOVE_SPI1_PHYS_BASE, get_tclk()); 162 162 } 163 163 164 164 /*****************************************************************************
+1 -1
arch/arm/mach-exynos4/clock.c
··· 1160 1160 1161 1161 vpllsrc = clk_get_rate(&clk_vpllsrc.clk); 1162 1162 vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0), 1163 - __raw_readl(S5P_VPLL_CON1), pll_4650); 1163 + __raw_readl(S5P_VPLL_CON1), pll_4650c); 1164 1164 1165 1165 clk_fout_apll.ops = &exynos4_fout_apll_ops; 1166 1166 clk_fout_mpll.rate = mpll;
+9 -1
arch/arm/mach-exynos4/mct.c
··· 132 132 return ((cycle_t)hi << 32) | lo; 133 133 } 134 134 135 + static void exynos4_frc_resume(struct clocksource *cs) 136 + { 137 + exynos4_mct_frc_start(0, 0); 138 + } 139 + 135 140 struct clocksource mct_frc = { 136 141 .name = "mct-frc", 137 142 .rating = 400, 138 143 .read = exynos4_frc_read, 139 144 .mask = CLOCKSOURCE_MASK(64), 140 145 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 146 + .resume = exynos4_frc_resume, 141 147 }; 142 148 143 149 static void __init exynos4_clocksource_init(void) ··· 395 389 } 396 390 397 391 /* Setup the local clock events for a CPU */ 398 - void __cpuinit local_timer_setup(struct clock_event_device *evt) 392 + int __cpuinit local_timer_setup(struct clock_event_device *evt) 399 393 { 400 394 exynos4_mct_tick_init(evt); 395 + 396 + return 0; 401 397 } 402 398 403 399 int local_timer_ack(void)
+2
arch/arm/mach-exynos4/platsmp.c
··· 106 106 */ 107 107 spin_lock(&boot_lock); 108 108 spin_unlock(&boot_lock); 109 + 110 + set_cpu_online(cpu, true); 109 111 } 110 112 111 113 int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+6 -5
arch/arm/mach-exynos4/setup-keypad.c
··· 19 19 20 20 if (rows > 8) { 21 21 /* Set all the necessary GPX2 pins: KP_ROW[0~7] */ 22 - s3c_gpio_cfgrange_nopull(EXYNOS4_GPX2(0), 8, S3C_GPIO_SFN(3)); 22 + s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), 8, S3C_GPIO_SFN(3), 23 + S3C_GPIO_PULL_UP); 23 24 24 25 /* Set all the necessary GPX3 pins: KP_ROW[8~] */ 25 - s3c_gpio_cfgrange_nopull(EXYNOS4_GPX3(0), (rows - 8), 26 - S3C_GPIO_SFN(3)); 26 + s3c_gpio_cfgall_range(EXYNOS4_GPX3(0), (rows - 8), 27 + S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP); 27 28 } else { 28 29 /* Set all the necessary GPX2 pins: KP_ROW[x] */ 29 - s3c_gpio_cfgrange_nopull(EXYNOS4_GPX2(0), rows, 30 - S3C_GPIO_SFN(3)); 30 + s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), rows, S3C_GPIO_SFN(3), 31 + S3C_GPIO_PULL_UP); 31 32 } 32 33 33 34 /* Set all the necessary GPX1 pins to special-function 3: KP_COL[x] */
+2
arch/arm/mach-integrator/integrator_ap.c
··· 32 32 #include <linux/interrupt.h> 33 33 #include <linux/io.h> 34 34 #include <linux/mtd/physmap.h> 35 + #include <video/vga.h> 35 36 36 37 #include <mach/hardware.h> 37 38 #include <mach/platform.h> ··· 155 154 static void __init ap_map_io(void) 156 155 { 157 156 iotable_init(ap_io_desc, ARRAY_SIZE(ap_io_desc)); 157 + vga_base = PCI_MEMORY_VADDR; 158 158 } 159 159 160 160 #define INTEGRATOR_SC_VALID_INT 0x003fffff
-2
arch/arm/mach-integrator/pci_v3.c
··· 27 27 #include <linux/spinlock.h> 28 28 #include <linux/init.h> 29 29 #include <linux/io.h> 30 - #include <video/vga.h> 31 30 32 31 #include <mach/hardware.h> 33 32 #include <mach/platform.h> ··· 504 505 505 506 pcibios_min_io = 0x6000; 506 507 pcibios_min_mem = 0x00100000; 507 - vga_base = PCI_MEMORY_VADDR; 508 508 509 509 /* 510 510 * Hook in our fault handler for PCI errors
-39
arch/arm/mach-s3c64xx/mach-smdk6410.c
··· 262 262 .cols = 8, 263 263 }; 264 264 265 - static int smdk6410_backlight_init(struct device *dev) 266 - { 267 - int ret; 268 - 269 - ret = gpio_request(S3C64XX_GPF(15), "Backlight"); 270 - if (ret) { 271 - printk(KERN_ERR "failed to request GPF for PWM-OUT1\n"); 272 - return ret; 273 - } 274 - 275 - /* Configure GPIO pin with S3C64XX_GPF15_PWM_TOUT1 */ 276 - s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_SFN(2)); 277 - 278 - return 0; 279 - } 280 - 281 - static void smdk6410_backlight_exit(struct device *dev) 282 - { 283 - s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_OUTPUT); 284 - gpio_free(S3C64XX_GPF(15)); 285 - } 286 - 287 - static struct platform_pwm_backlight_data smdk6410_backlight_data = { 288 - .pwm_id = 1, 289 - .max_brightness = 255, 290 - .dft_brightness = 255, 291 - .pwm_period_ns = 78770, 292 - .init = smdk6410_backlight_init, 293 - .exit = smdk6410_backlight_exit, 294 - }; 295 - 296 - static struct platform_device smdk6410_backlight_device = { 297 - .name = "pwm-backlight", 298 - .dev = { 299 - .parent = &s3c_device_timer[1].dev, 300 - .platform_data = &smdk6410_backlight_data, 301 - }, 302 - }; 303 - 304 265 static struct map_desc smdk6410_iodesc[] = {}; 305 266 306 267 static struct platform_device *smdk6410_devices[] __initdata = {
+11
arch/arm/plat-samsung/clock.c
··· 64 64 */ 65 65 DEFINE_SPINLOCK(clocks_lock); 66 66 67 + /* Global watchdog clock used by arch_wtd_reset() callback */ 68 + struct clk *s3c2410_wdtclk; 69 + static int __init s3c_wdt_reset_init(void) 70 + { 71 + s3c2410_wdtclk = clk_get(NULL, "watchdog"); 72 + if (IS_ERR(s3c2410_wdtclk)) 73 + printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__); 74 + return 0; 75 + } 76 + arch_initcall(s3c_wdt_reset_init); 77 + 67 78 /* enable and disable calls for use with the clk struct */ 68 79 69 80 static int clk_null_enable(struct clk *clk, int enable)
+8
arch/arm/plat-samsung/include/plat/clock.h
··· 9 9 * published by the Free Software Foundation. 10 10 */ 11 11 12 + #ifndef __ASM_PLAT_CLOCK_H 13 + #define __ASM_PLAT_CLOCK_H __FILE__ 14 + 12 15 #include <linux/spinlock.h> 13 16 #include <linux/clkdev.h> 14 17 ··· 124 121 125 122 extern void s3c_pwmclk_init(void); 126 123 124 + /* Global watchdog clock used by arch_wtd_reset() callback */ 125 + 126 + extern struct clk *s3c2410_wdtclk; 127 + 128 + #endif /* __ASM_PLAT_CLOCK_H */
+3 -7
arch/arm/plat-samsung/include/plat/watchdog-reset.h
··· 10 10 * published by the Free Software Foundation. 11 11 */ 12 12 13 + #include <plat/clock.h> 13 14 #include <plat/regs-watchdog.h> 14 15 #include <mach/map.h> 15 16 ··· 20 19 21 20 static inline void arch_wdt_reset(void) 22 21 { 23 - struct clk *wdtclk; 24 - 25 22 printk("arch_reset: attempting watchdog reset\n"); 26 23 27 24 __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */ 28 25 29 - wdtclk = clk_get(NULL, "watchdog"); 30 - if (!IS_ERR(wdtclk)) { 31 - clk_enable(wdtclk); 32 - } else 33 - printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__); 26 + if (s3c2410_wdtclk) 27 + clk_enable(s3c2410_wdtclk); 34 28 35 29 /* put initial values into count and data */ 36 30 __raw_writel(0x80, S3C2410_WTCNT);