Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rmk/linux
Pull ARM updates from Russell King:
- ftrace: don't assume stack frames are contiguous in memory
- remove unused mod_inwind_map structure
- spelling fixes
- allow use of LD dead code/data elimination
- fix callchain_trace() return value
- add support for stackleak gcc plugin
- correct some reset asm function prototypes for CFI
[ Missed the merge window because Russell forgot to push out ]
* tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rmk/linux:
ARM: 9408/1: mm: CFI: Fix some erroneous reset prototypes
ARM: 9407/1: Add support for STACKLEAK gcc plugin
ARM: 9406/1: Fix callchain_trace() return value
ARM: 9404/1: arm32: enable HAVE_LD_DEAD_CODE_DATA_ELIMINATION
ARM: 9403/1: Alpine: Spelling s/initialiing/initializing/
ARM: 9402/1: Kconfig: Spelling s/Cortex A-/Cortex-A/
ARM: 9400/1: Remove unused struct 'mod_unwind_map'
+42
-27
+3
-1
arch/arm/Kconfig
+3
-1
arch/arm/Kconfig
···
87
87
select HAVE_ARCH_PFN_VALID
88
88
select HAVE_ARCH_SECCOMP
89
89
select HAVE_ARCH_SECCOMP_FILTER if AEABI && !OABI_COMPAT
90
+
select HAVE_ARCH_STACKLEAK
90
91
select HAVE_ARCH_THREAD_STRUCT_WHITELIST
91
92
select HAVE_ARCH_TRACEHOOK
92
93
select HAVE_ARCH_TRANSPARENT_HUGEPAGE if ARM_LPAE
···
117
116
select HAVE_KERNEL_XZ
118
117
select HAVE_KPROBES if !XIP_KERNEL && !CPU_ENDIAN_BE32 && !CPU_V7M
119
118
select HAVE_KRETPROBES if HAVE_KPROBES
119
+
select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
120
120
select HAVE_MOD_ARCH_SPECIFIC
121
121
select HAVE_NMI
122
122
select HAVE_OPTPROBES if !THUMB2_KERNEL
···
738
736
bool "ARM errata: Read to DBGPRSR and DBGOSLSR may generate Undefined instruction"
739
737
depends on CPU_V7
740
738
help
741
-
This option enables the workaround for the 764319 Cortex A-9 erratum.
739
+
This option enables the workaround for the 764319 Cortex-A9 erratum.
742
740
CP14 read accesses to the DBGPRSR and DBGOSLSR registers generate an
743
741
unexpected Undefined Instruction exception when the DBGSWENABLE
744
742
external pin is set to 0, even when the CP14 accesses are performed
+1
arch/arm/boot/compressed/Makefile
+1
arch/arm/boot/compressed/Makefile
+1
-1
arch/arm/boot/compressed/vmlinux.lds.S
+1
-1
arch/arm/boot/compressed/vmlinux.lds.S
+7
arch/arm/include/asm/stacktrace.h
+7
arch/arm/include/asm/stacktrace.h
···
26
26
#endif
27
27
};
28
28
29
+
static inline bool on_thread_stack(void)
30
+
{
31
+
unsigned long delta = current_stack_pointer ^ (unsigned long)current->stack;
32
+
33
+
return delta < THREAD_SIZE;
34
+
}
35
+
29
36
static __always_inline
30
37
void arm_get_current_stackframe(struct pt_regs *regs, struct stackframe *frame)
31
38
{
+1
-1
arch/arm/include/asm/vmlinux.lds.h
+1
-1
arch/arm/include/asm/vmlinux.lds.h
+3
arch/arm/kernel/entry-armv.S
+3
arch/arm/kernel/entry-armv.S
···
1065
1065
.globl vector_fiq
1066
1066
1067
1067
.section .vectors, "ax", %progbits
1068
+
.reloc .text, R_ARM_NONE, .
1068
1069
W(b) vector_rst
1069
1070
W(b) vector_und
1070
1071
ARM( .reloc ., R_ARM_LDR_PC_G0, .L__vector_swi )
···
1079
1078
1080
1079
#ifdef CONFIG_HARDEN_BRANCH_HISTORY
1081
1080
.section .vectors.bhb.loop8, "ax", %progbits
1081
+
.reloc .text, R_ARM_NONE, .
1082
1082
W(b) vector_rst
1083
1083
W(b) vector_bhb_loop8_und
1084
1084
ARM( .reloc ., R_ARM_LDR_PC_G0, .L__vector_bhb_loop8_swi )
···
1092
1090
W(b) vector_bhb_loop8_fiq
1093
1091
1094
1092
.section .vectors.bhb.bpiall, "ax", %progbits
1093
+
.reloc .text, R_ARM_NONE, .
1095
1094
W(b) vector_rst
1096
1095
W(b) vector_bhb_bpiall_und
1097
1096
ARM( .reloc ., R_ARM_LDR_PC_G0, .L__vector_bhb_bpiall_swi )
+3
arch/arm/kernel/entry-common.S
+3
arch/arm/kernel/entry-common.S
-5
arch/arm/kernel/module.c
-5
arch/arm/kernel/module.c
+1
-2
arch/arm/kernel/perf_callchain.c
+1
-2
arch/arm/kernel/perf_callchain.c
+2
-2
arch/arm/kernel/vmlinux-xip.lds.S
+2
-2
arch/arm/kernel/vmlinux-xip.lds.S
···
63
63
. = ALIGN(4);
64
64
__ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
65
65
__start___ex_table = .;
66
-
ARM_MMU_KEEP(*(__ex_table))
66
+
ARM_MMU_KEEP(KEEP(*(__ex_table)))
67
67
__stop___ex_table = .;
68
68
}
69
69
···
83
83
}
84
84
.init.arch.info : {
85
85
__arch_info_begin = .;
86
-
*(.arch.info.init)
86
+
KEEP(*(.arch.info.init))
87
87
__arch_info_end = .;
88
88
}
89
89
.init.tagtable : {
+3
-3
arch/arm/kernel/vmlinux.lds.S
+3
-3
arch/arm/kernel/vmlinux.lds.S
···
74
74
. = ALIGN(4);
75
75
__ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
76
76
__start___ex_table = .;
77
-
ARM_MMU_KEEP(*(__ex_table))
77
+
ARM_MMU_KEEP(KEEP(*(__ex_table)))
78
78
__stop___ex_table = .;
79
79
}
80
80
···
99
99
}
100
100
.init.arch.info : {
101
101
__arch_info_begin = .;
102
-
*(.arch.info.init)
102
+
KEEP(*(.arch.info.init))
103
103
__arch_info_end = .;
104
104
}
105
105
.init.tagtable : {
···
116
116
#endif
117
117
.init.pv_table : {
118
118
__pv_table_begin = .;
119
-
*(.pv_table)
119
+
KEEP(*(.pv_table))
120
120
__pv_table_end = .;
121
121
}
122
122
+1
-1
arch/arm/mach-alpine/alpine_cpu_pm.c
+1
-1
arch/arm/mach-alpine/alpine_cpu_pm.c
···
29
29
/*
30
30
* Set CPU resume address -
31
31
* secure firmware running on boot will jump to this address
32
-
* after setting proper CPU mode, and initialiing e.g. secure
32
+
* after setting proper CPU mode, and initializing e.g. secure
33
33
* regs (the same mode all CPUs are booted to - usually HYP)
34
34
*/
35
35
writel(phys_resume_addr,
+10
-10
arch/arm/mm/proc.c
+10
-10
arch/arm/mm/proc.c
···
17
17
__ADDRESSABLE(cpu_arm7tdmi_proc_init);
18
18
void cpu_arm7tdmi_proc_fin(void);
19
19
__ADDRESSABLE(cpu_arm7tdmi_proc_fin);
20
-
void cpu_arm7tdmi_reset(void);
20
+
void cpu_arm7tdmi_reset(unsigned long addr, bool hvc);
21
21
__ADDRESSABLE(cpu_arm7tdmi_reset);
22
22
int cpu_arm7tdmi_do_idle(void);
23
23
__ADDRESSABLE(cpu_arm7tdmi_do_idle);
···
32
32
__ADDRESSABLE(cpu_arm720_proc_init);
33
33
void cpu_arm720_proc_fin(void);
34
34
__ADDRESSABLE(cpu_arm720_proc_fin);
35
-
void cpu_arm720_reset(void);
35
+
void cpu_arm720_reset(unsigned long addr, bool hvc);
36
36
__ADDRESSABLE(cpu_arm720_reset);
37
37
int cpu_arm720_do_idle(void);
38
38
__ADDRESSABLE(cpu_arm720_do_idle);
···
49
49
__ADDRESSABLE(cpu_arm740_proc_init);
50
50
void cpu_arm740_proc_fin(void);
51
51
__ADDRESSABLE(cpu_arm740_proc_fin);
52
-
void cpu_arm740_reset(void);
52
+
void cpu_arm740_reset(unsigned long addr, bool hvc);
53
53
__ADDRESSABLE(cpu_arm740_reset);
54
54
int cpu_arm740_do_idle(void);
55
55
__ADDRESSABLE(cpu_arm740_do_idle);
···
64
64
__ADDRESSABLE(cpu_arm9tdmi_proc_init);
65
65
void cpu_arm9tdmi_proc_fin(void);
66
66
__ADDRESSABLE(cpu_arm9tdmi_proc_fin);
67
-
void cpu_arm9tdmi_reset(void);
67
+
void cpu_arm9tdmi_reset(unsigned long addr, bool hvc);
68
68
__ADDRESSABLE(cpu_arm9tdmi_reset);
69
69
int cpu_arm9tdmi_do_idle(void);
70
70
__ADDRESSABLE(cpu_arm9tdmi_do_idle);
···
79
79
__ADDRESSABLE(cpu_arm920_proc_init);
80
80
void cpu_arm920_proc_fin(void);
81
81
__ADDRESSABLE(cpu_arm920_proc_fin);
82
-
void cpu_arm920_reset(void);
82
+
void cpu_arm920_reset(unsigned long addr, bool hvc);
83
83
__ADDRESSABLE(cpu_arm920_reset);
84
84
int cpu_arm920_do_idle(void);
85
85
__ADDRESSABLE(cpu_arm920_do_idle);
···
102
102
__ADDRESSABLE(cpu_arm922_proc_init);
103
103
void cpu_arm922_proc_fin(void);
104
104
__ADDRESSABLE(cpu_arm922_proc_fin);
105
-
void cpu_arm922_reset(void);
105
+
void cpu_arm922_reset(unsigned long addr, bool hvc);
106
106
__ADDRESSABLE(cpu_arm922_reset);
107
107
int cpu_arm922_do_idle(void);
108
108
__ADDRESSABLE(cpu_arm922_do_idle);
···
119
119
__ADDRESSABLE(cpu_arm925_proc_init);
120
120
void cpu_arm925_proc_fin(void);
121
121
__ADDRESSABLE(cpu_arm925_proc_fin);
122
-
void cpu_arm925_reset(void);
122
+
void cpu_arm925_reset(unsigned long addr, bool hvc);
123
123
__ADDRESSABLE(cpu_arm925_reset);
124
124
int cpu_arm925_do_idle(void);
125
125
__ADDRESSABLE(cpu_arm925_do_idle);
···
159
159
__ADDRESSABLE(cpu_arm940_proc_init);
160
160
void cpu_arm940_proc_fin(void);
161
161
__ADDRESSABLE(cpu_arm940_proc_fin);
162
-
void cpu_arm940_reset(void);
162
+
void cpu_arm940_reset(unsigned long addr, bool hvc);
163
163
__ADDRESSABLE(cpu_arm940_reset);
164
164
int cpu_arm940_do_idle(void);
165
165
__ADDRESSABLE(cpu_arm940_do_idle);
···
174
174
__ADDRESSABLE(cpu_arm946_proc_init);
175
175
void cpu_arm946_proc_fin(void);
176
176
__ADDRESSABLE(cpu_arm946_proc_fin);
177
-
void cpu_arm946_reset(void);
177
+
void cpu_arm946_reset(unsigned long addr, bool hvc);
178
178
__ADDRESSABLE(cpu_arm946_reset);
179
179
int cpu_arm946_do_idle(void);
180
180
__ADDRESSABLE(cpu_arm946_do_idle);
···
429
429
__ADDRESSABLE(cpu_v7_proc_init);
430
430
void cpu_v7_proc_fin(void);
431
431
__ADDRESSABLE(cpu_v7_proc_fin);
432
-
void cpu_v7_reset(void);
432
+
void cpu_v7_reset(unsigned long addr, bool hvc);
433
433
__ADDRESSABLE(cpu_v7_reset);
434
434
int cpu_v7_do_idle(void);
435
435
__ADDRESSABLE(cpu_v7_do_idle);
+6
-1
drivers/firmware/efi/libstub/Makefile
+6
-1
drivers/firmware/efi/libstub/Makefile
···
27
27
cflags-$(CONFIG_ARM) += -DEFI_HAVE_STRLEN -DEFI_HAVE_STRNLEN \
28
28
-DEFI_HAVE_MEMCHR -DEFI_HAVE_STRRCHR \
29
29
-DEFI_HAVE_STRCMP -fno-builtin -fpic \
30
-
$(call cc-option,-mno-single-pic-base)
30
+
$(call cc-option,-mno-single-pic-base) \
31
+
$(DISABLE_STACKLEAK_PLUGIN)
31
32
cflags-$(CONFIG_RISCV) += -fpic -DNO_ALTERNATIVE -mno-relax \
32
33
$(DISABLE_STACKLEAK_PLUGIN)
33
34
cflags-$(CONFIG_LOONGARCH) += -fpie
···
57
56
KBUILD_CFLAGS := $(filter-out $(CC_FLAGS_CFI), $(KBUILD_CFLAGS))
58
57
# disable LTO
59
58
KBUILD_CFLAGS := $(filter-out $(CC_FLAGS_LTO), $(KBUILD_CFLAGS))
59
+
60
+
# The .data section would be renamed to .data.efistub, therefore, remove
61
+
# `-fdata-sections` flag from KBUILD_CFLAGS_KERNEL
62
+
KBUILD_CFLAGS_KERNEL := $(filter-out -fdata-sections, $(KBUILD_CFLAGS_KERNEL))
60
63
61
64
lib-y := efi-stub-helper.o gop.o secureboot.o tpm.o \
62
65
file.o mem.o random.o randomalloc.o pci.o \