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Merge tag 'mlx5-next-09-11' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux
Tariq Toukan says:
====================
mlx5-next updates 2025-09-17
This series by Carolina contains cleanups significantly touching shared
mlx5 net and rdma headers.
* tag 'mlx5-next-09-11' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux:
net/mlx5e: Prevent WQE metadata conflicts between timestamping and offloads
net/mlx5: Refactor MACsec WQE metadata shifts
net/mlx5: Remove VLAN insertion fields from WQE Ether segment
====================
Link: https://patch.msgid.link/1757574619-604874-1-git-send-email-tariqt@nvidia.com
Link: https://patch.msgid.link/1758104780-642426-1-git-send-email-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+31
-18
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c
···
1676
1676
if (!fs_id)
1677
1677
return;
1678
1678
1679
-
eseg->flow_table_metadata = cpu_to_be32(MLX5_ETH_WQE_FT_META_MACSEC | fs_id << 2);
1679
+
eseg->flow_table_metadata = cpu_to_be32(MLX5_MACSEC_TX_METADATA(fs_id));
1680
1680
}
1681
1681
1682
1682
void mlx5e_macsec_offload_handle_rx_skb(struct net_device *netdev,
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/en_tx.c
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/en_tx.c
+6
-8
drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.c
+6
-8
drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.c
···
45
45
#define MLX5_SECTAG_HEADER_SIZE_WITHOUT_SCI 0x8
46
46
#define MLX5_SECTAG_HEADER_SIZE_WITH_SCI (MLX5_SECTAG_HEADER_SIZE_WITHOUT_SCI + MACSEC_SCI_LEN)
47
47
48
-
/* MACsec RX flow steering */
49
-
#define MLX5_ETH_WQE_FT_META_MACSEC_MASK 0x3E
50
-
51
48
/* MACsec fs_id handling for steering */
52
-
#define macsec_fs_set_tx_fs_id(fs_id) (MLX5_ETH_WQE_FT_META_MACSEC | (fs_id) << 2)
53
49
#define macsec_fs_set_rx_fs_id(fs_id) ((fs_id) | BIT(30))
54
50
55
51
struct mlx5_sectag_header {
···
593
597
MLX5_SET(fte_match_param, spec->match_criteria, misc_parameters_2.metadata_reg_a,
594
598
MLX5_ETH_WQE_FT_META_MACSEC_MASK);
595
599
MLX5_SET(fte_match_param, spec->match_value, misc_parameters_2.metadata_reg_a,
596
-
macsec_fs_set_tx_fs_id(id));
600
+
MLX5_MACSEC_TX_METADATA(id));
597
601
598
602
*fs_id = id;
599
603
flow_act->crypto.type = MLX5_FLOW_CONTEXT_ENCRYPT_DECRYPT_TYPE_MACSEC;
···
2215
2219
2216
2220
MLX5_SET(set_action_in, action, action_type, MLX5_ACTION_TYPE_SET);
2217
2221
MLX5_SET(set_action_in, action, field, MLX5_ACTION_IN_FIELD_METADATA_REG_A);
2218
-
MLX5_SET(set_action_in, action, data, macsec_fs_set_tx_fs_id(fs_id));
2219
-
MLX5_SET(set_action_in, action, offset, 0);
2220
-
MLX5_SET(set_action_in, action, length, 32);
2222
+
MLX5_SET(set_action_in, action, data,
2223
+
mlx5_macsec_fs_set_tx_fs_id(fs_id));
2224
+
MLX5_SET(set_action_in, action, offset,
2225
+
MLX5_ETH_WQE_FT_META_MACSEC_SHIFT);
2226
+
MLX5_SET(set_action_in, action, length, 8);
2221
2227
2222
2228
modify_hdr = mlx5_modify_header_alloc(mdev, MLX5_FLOW_NAMESPACE_RDMA_TX_MACSEC,
2223
2229
1, action);
+15
drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.h
+15
drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.h
···
12
12
#define MLX5_MACSEC_METADATA_MARKER(metadata) ((((metadata) >> 30) & 0x3) == 0x1)
13
13
#define MLX5_MACSEC_RX_METADAT_HANDLE(metadata) ((metadata) & MLX5_MACSEC_RX_FS_ID_MASK)
14
14
15
+
/* MACsec TX flow steering */
16
+
#define MLX5_ETH_WQE_FT_META_MACSEC_MASK \
17
+
(MLX5_ETH_WQE_FT_META_MACSEC | MLX5_ETH_WQE_FT_META_MACSEC_FS_ID_MASK)
18
+
#define MLX5_ETH_WQE_FT_META_MACSEC_SHIFT MLX5_ETH_WQE_FT_META_SHIFT
19
+
20
+
/* MACsec fs_id handling for steering */
21
+
#define mlx5_macsec_fs_set_tx_fs_id(fs_id) \
22
+
(((MLX5_ETH_WQE_FT_META_MACSEC) >> MLX5_ETH_WQE_FT_META_MACSEC_SHIFT) \
23
+
| ((fs_id) << 2))
24
+
25
+
#define MLX5_MACSEC_TX_METADATA(fs_id) \
26
+
(mlx5_macsec_fs_set_tx_fs_id(fs_id) << \
27
+
MLX5_ETH_WQE_FT_META_MACSEC_SHIFT)
28
+
29
+
/* MACsec fs_id uses 4 bits, supports up to 16 interfaces */
15
30
#define MLX5_MACSEC_NUM_OF_SUPPORTED_INTERFACES 16
16
31
17
32
struct mlx5_macsec_fs;
+8
-8
include/linux/mlx5/qp.h
+8
-8
include/linux/mlx5/qp.h
···
237
237
};
238
238
239
239
enum {
240
-
MLX5_ETH_WQE_SVLAN = 1 << 0,
241
240
MLX5_ETH_WQE_TRAILER_HDR_OUTER_IP_ASSOC = 1 << 26,
242
241
MLX5_ETH_WQE_TRAILER_HDR_OUTER_L4_ASSOC = 1 << 27,
243
242
MLX5_ETH_WQE_TRAILER_HDR_INNER_IP_ASSOC = 3 << 26,
244
243
MLX5_ETH_WQE_TRAILER_HDR_INNER_L4_ASSOC = 1 << 28,
245
244
MLX5_ETH_WQE_INSERT_TRAILER = 1 << 30,
246
-
MLX5_ETH_WQE_INSERT_VLAN = 1 << 15,
247
245
};
248
246
249
247
enum {
···
251
253
MLX5_ETH_WQE_SWP_OUTER_L4_UDP = 1 << 5,
252
254
};
253
255
256
+
/* Metadata bits 0-7 are used by timestamping */
257
+
/* Base shift for metadata bits used by IPsec and MACsec */
258
+
#define MLX5_ETH_WQE_FT_META_SHIFT 8
259
+
254
260
enum {
255
-
MLX5_ETH_WQE_FT_META_IPSEC = BIT(0),
256
-
MLX5_ETH_WQE_FT_META_MACSEC = BIT(1),
261
+
MLX5_ETH_WQE_FT_META_IPSEC = BIT(0) << MLX5_ETH_WQE_FT_META_SHIFT,
262
+
MLX5_ETH_WQE_FT_META_MACSEC = BIT(1) << MLX5_ETH_WQE_FT_META_SHIFT,
263
+
MLX5_ETH_WQE_FT_META_MACSEC_FS_ID_MASK =
264
+
GENMASK(5, 2) << MLX5_ETH_WQE_FT_META_SHIFT,
257
265
};
258
266
259
267
struct mlx5_wqe_eth_seg {
···
279
275
DECLARE_FLEX_ARRAY(u8, data);
280
276
};
281
277
} inline_hdr;
282
-
struct {
283
-
__be16 type;
284
-
__be16 vlan_tci;
285
-
} insert;
286
278
__be32 trailer;
287
279
};
288
280
};