Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
powerpc: dts: mpc8313erdb: Use IRQ_TYPE_* macros
This increases readability, because "0x8" isn't very descriptive.
mpc8313erdb.dtb remains identical after this patch.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Link: https://patch.msgid.link/20260303-mpc83xx-cleanup-v2-1-187d3a13effa@posteo.net
authored by
J. Neuschäfer
and committed by
Madhavan Srinivasan
38ce944d
691417ff
+34
-25
+34
-25
arch/powerpc/boot/dts/mpc8313erdb.dts
+34
-25
arch/powerpc/boot/dts/mpc8313erdb.dts
···
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*/
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/dts-v1/;
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+
#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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model = "MPC8313ERDB";
···
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#size-cells = <1>;
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compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus";
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reg = <0xe0005000 0x1000>;
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-
interrupts = <77 0x8>;
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interrupts = <77 IRQ_TYPE_LEVEL_LOW>;
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interrupt-parent = <&ipic>;
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// CS0 and CS1 are swapped when
···
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cell-index = <0>;
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compatible = "fsl-i2c";
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reg = <0x3000 0x100>;
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-
interrupts = <14 0x8>;
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+
interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
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interrupt-parent = <&ipic>;
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dfsrr;
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rtc@68 {
···
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compatible = "fsl,sec2.2", "fsl,sec2.1",
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"fsl,sec2.0";
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reg = <0x30000 0x10000>;
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-
interrupts = <11 0x8>;
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+
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
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interrupt-parent = <&ipic>;
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fsl,num-channels = <1>;
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fsl,channel-fifo-len = <24>;
···
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cell-index = <1>;
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compatible = "fsl-i2c";
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reg = <0x3100 0x100>;
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-
interrupts = <15 0x8>;
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+
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
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interrupt-parent = <&ipic>;
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dfsrr;
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};
···
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cell-index = <0>;
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compatible = "fsl,spi";
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reg = <0x7000 0x1000>;
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-
interrupts = <16 0x8>;
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+
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
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interrupt-parent = <&ipic>;
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mode = "cpu";
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};
···
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&ipic>;
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-
interrupts = <38 0x8>;
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+
interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
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phy_type = "utmi_wide";
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sleep = <&pmc 0x00300000>;
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};
···
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ptp_clock@24E00 {
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compatible = "fsl,etsec-ptp";
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reg = <0x24E00 0xB0>;
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-
interrupts = <12 0x8 13 0x8>;
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+
interrupts = <12 IRQ_TYPE_LEVEL_LOW>,
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+
<13 IRQ_TYPE_LEVEL_LOW>;
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interrupt-parent = < &ipic >;
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fsl,tclk-period = <10>;
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fsl,tmr-prsc = <100>;
···
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compatible = "gianfar";
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reg = <0x24000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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-
interrupts = <37 0x8 36 0x8 35 0x8>;
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+
interrupts = <37 IRQ_TYPE_LEVEL_LOW>,
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<36 IRQ_TYPE_LEVEL_LOW>,
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<35 IRQ_TYPE_LEVEL_LOW>;
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interrupt-parent = <&ipic>;
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tbi-handle = < &tbi0 >;
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/* Vitesse 7385 isn't on the MDIO bus */
···
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reg = <0x520 0x20>;
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phy4: ethernet-phy@4 {
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interrupt-parent = <&ipic>;
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-
interrupts = <20 0x8>;
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interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
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reg = <0x4>;
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};
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tbi0: tbi-phy@11 {
···
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reg = <0x25000 0x1000>;
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ranges = <0x0 0x25000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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-
interrupts = <34 0x8 33 0x8 32 0x8>;
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+
interrupts = <34 IRQ_TYPE_LEVEL_LOW>,
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+
<33 IRQ_TYPE_LEVEL_LOW>,
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+
<32 IRQ_TYPE_LEVEL_LOW>;
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interrupt-parent = <&ipic>;
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tbi-handle = < &tbi1 >;
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phy-handle = < &phy4 >;
···
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compatible = "fsl,ns16550", "ns16550";
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reg = <0x4500 0x100>;
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clock-frequency = <0>;
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-
interrupts = <9 0x8>;
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+
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
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interrupt-parent = <&ipic>;
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};
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···
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compatible = "fsl,ns16550", "ns16550";
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reg = <0x4600 0x100>;
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clock-frequency = <0>;
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-
interrupts = <10 0x8>;
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+
interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
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interrupt-parent = <&ipic>;
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};
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/* IPIC
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-
* interrupts cell = <intr #, sense>
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-
* sense values match linux IORESOURCE_IRQ_* defines:
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* sense == 8: Level, low assertion
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-
* sense == 2: Edge, high-to-low change
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* interrupts cell = <intr #, type>
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*/
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ipic: pic@700 {
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interrupt-controller;
···
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pmc: power@b00 {
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compatible = "fsl,mpc8313-pmc", "fsl,mpc8349-pmc";
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reg = <0xb00 0x100 0xa00 0x100>;
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-
interrupts = <80 8>;
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+
interrupts = <80 IRQ_TYPE_LEVEL_LOW>;
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interrupt-parent = <&ipic>;
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fsl,mpc8313-wakeup-timer = <>m1>;
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···
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gtm1: timer@500 {
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compatible = "fsl,mpc8313-gtm", "fsl,gtm";
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reg = <0x500 0x100>;
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-
interrupts = <90 8 78 8 84 8 72 8>;
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+
interrupts = <90 IRQ_TYPE_LEVEL_LOW>,
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+
<78 IRQ_TYPE_LEVEL_LOW>,
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+
<84 IRQ_TYPE_LEVEL_LOW>,
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+
<72 IRQ_TYPE_LEVEL_LOW>;
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interrupt-parent = <&ipic>;
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};
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timer@600 {
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compatible = "fsl,mpc8313-gtm", "fsl,gtm";
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reg = <0x600 0x100>;
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-
interrupts = <91 8 79 8 85 8 73 8>;
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+
interrupts = <91 IRQ_TYPE_LEVEL_LOW>,
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+
<79 IRQ_TYPE_LEVEL_LOW>,
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+
<85 IRQ_TYPE_LEVEL_LOW>,
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<73 IRQ_TYPE_LEVEL_LOW>;
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interrupt-parent = <&ipic>;
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};
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};
···
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0x7800 0x0 0x0 0x3 &ipic 17 0x8
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0x7800 0x0 0x0 0x4 &ipic 18 0x8>;
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interrupt-parent = <&ipic>;
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-
interrupts = <66 0x8>;
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+
interrupts = <66 IRQ_TYPE_LEVEL_LOW>;
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bus-range = <0x0 0x0>;
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ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
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0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
···
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reg = <0xe00082a8 4>;
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ranges = <0 0xe0008100 0x1a8>;
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interrupt-parent = <&ipic>;
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-
interrupts = <71 8>;
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+
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
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dma-channel@0 {
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compatible = "fsl,mpc8313-dma-channel",
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"fsl,elo-dma-channel";
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reg = <0 0x28>;
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interrupt-parent = <&ipic>;
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-
interrupts = <71 8>;
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+
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
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cell-index = <0>;
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};
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···
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"fsl,elo-dma-channel";
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reg = <0x80 0x28>;
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interrupt-parent = <&ipic>;
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-
interrupts = <71 8>;
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+
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
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cell-index = <1>;
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};
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···
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"fsl,elo-dma-channel";
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reg = <0x100 0x28>;
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interrupt-parent = <&ipic>;
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-
interrupts = <71 8>;
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+
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
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cell-index = <2>;
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};
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···
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"fsl,elo-dma-channel";
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reg = <0x180 0x28>;
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interrupt-parent = <&ipic>;
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-
interrupts = <71 8>;
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+
interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
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cell-index = <3>;
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};
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403
};