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Merge branch 'octeontx2-af-rpm-misc-feaures'

Hariprasad Kelam says:

====================
Octeontx2-af: RPM: misc feaures

This series patches adds different features like debugfs
support for shared firmware structure and DMAC filter
related enhancements.

Patch1: Saves interface MAC address configured from DMAC filters.

Patch2: Disables the stale DMAC filters in driver initialization

Patch3: Configure dma mask for CGX/RPM drivers

Patch4: Debugfs support for shared firmware data.
====================

Link: https://patch.msgid.link/20250720163638.1560323-1-hkelam@marvell.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>

Paolo Abeni 391daec3 2094200b

+196 -15
+19
drivers/net/ethernet/marvell/octeontx2/af/cgx.c
··· 1704 1704 1705 1705 static int cgx_lmac_init(struct cgx *cgx) 1706 1706 { 1707 + u8 max_dmac_filters; 1707 1708 struct lmac *lmac; 1708 1709 u64 lmac_list; 1709 1710 int i, err; 1711 + int filter; 1710 1712 1711 1713 /* lmac_list specifies which lmacs are enabled 1712 1714 * when bit n is set to 1, LMAC[n] is enabled ··· 1747 1745 cgx->mac_ops->dmac_filter_count / 1748 1746 cgx->lmac_count; 1749 1747 1748 + max_dmac_filters = lmac->mac_to_index_bmap.max; 1749 + 1750 1750 err = rvu_alloc_bitmap(&lmac->mac_to_index_bmap); 1751 1751 if (err) 1752 1752 goto err_name_free; ··· 1778 1774 set_bit(lmac->lmac_id, &cgx->lmac_bmap); 1779 1775 cgx->mac_ops->mac_pause_frm_config(cgx, lmac->lmac_id, true); 1780 1776 lmac->lmac_type = cgx->mac_ops->get_lmac_type(cgx, lmac->lmac_id); 1777 + 1778 + /* Disable stale DMAC filters for sane state */ 1779 + for (filter = 0; filter < max_dmac_filters; filter++) 1780 + cgx_lmac_addr_del(cgx->cgx_id, lmac->lmac_id, filter); 1781 + 1782 + /* As cgx_lmac_addr_del does not clear entry for index 0 1783 + * so it needs to be done explicitly 1784 + */ 1785 + cgx_lmac_addr_reset(cgx->cgx_id, lmac->lmac_id); 1781 1786 } 1782 1787 1783 1788 /* Start X2P reset on given MAC block */ ··· 1962 1949 if (err) { 1963 1950 dev_err(dev, "PCI request regions failed 0x%x\n", err); 1964 1951 goto err_disable_device; 1952 + } 1953 + 1954 + err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(48)); 1955 + if (err) { 1956 + dev_err(dev, "DMA mask config failed, abort\n"); 1957 + goto err_release_regions; 1965 1958 } 1966 1959 1967 1960 /* MAP configuration registers */
+6 -1
drivers/net/ethernet/marvell/octeontx2/af/mbox.h
··· 664 664 /* Only applicable if SFP/QSFP slot is present */ 665 665 struct sfp_eeprom_s sfp_eeprom; 666 666 struct phy_s phy; 667 - #define LMAC_FWDATA_RESERVED_MEM 1021 667 + u32 lmac_type; 668 + u32 portm_idx; 669 + u64 mgmt_port:1; 670 + u64 advertised_an:1; 671 + u64 port; 672 + #define LMAC_FWDATA_RESERVED_MEM 1018 668 673 u64 reserved[LMAC_FWDATA_RESERVED_MEM]; 669 674 }; 670 675
+9 -14
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
··· 682 682 struct cgx_mac_addr_set_or_get *rsp) 683 683 { 684 684 int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc); 685 + struct rvu_pfvf *pfvf; 685 686 u8 cgx_id, lmac_id; 686 687 687 - if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc)) 688 - return -EPERM; 688 + if (!is_pf_cgxmapped(rvu, pf)) 689 + return LMAC_AF_ERR_PF_NOT_MAPPED; 689 690 690 691 if (rvu_npc_exact_has_match_table(rvu)) 691 692 return rvu_npc_exact_mac_addr_set(rvu, req, rsp); 692 693 693 694 rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id); 694 695 696 + pfvf = &rvu->pf[pf]; 697 + ether_addr_copy(pfvf->mac_addr, req->mac_addr); 695 698 cgx_lmac_addr_set(cgx_id, lmac_id, req->mac_addr); 696 699 697 700 return 0; ··· 772 769 struct cgx_mac_addr_set_or_get *req, 773 770 struct cgx_mac_addr_set_or_get *rsp) 774 771 { 775 - int pf = rvu_get_pf(rvu->pdev, req->hdr.pcifunc); 776 - u8 cgx_id, lmac_id; 777 - int rc = 0; 778 - u64 cfg; 772 + struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc); 779 773 780 - if (!is_cgx_config_permitted(rvu, req->hdr.pcifunc)) 781 - return -EPERM; 774 + if (!is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, req->hdr.pcifunc))) 775 + return LMAC_AF_ERR_PF_NOT_MAPPED; 782 776 783 - rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id); 784 - 785 - rsp->hdr.rc = rc; 786 - cfg = cgx_lmac_addr_get(cgx_id, lmac_id); 787 - /* copy 48 bit mac address to req->mac_addr */ 788 - u64_to_ether_addr(cfg, rsp->mac_addr); 777 + ether_addr_copy(rsp->mac_addr, pfvf->mac_addr); 789 778 return 0; 790 779 } 791 780
+162
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c
··· 867 867 868 868 RVU_DEBUG_SEQ_FOPS(rvu_pf_cgx_map, rvu_pf_cgx_map_display, NULL); 869 869 870 + static int rvu_dbg_rvu_fwdata_display(struct seq_file *s, void *unused) 871 + { 872 + struct rvu *rvu = s->private; 873 + struct rvu_fwdata *fwdata; 874 + u8 mac[ETH_ALEN]; 875 + int count = 0, i; 876 + 877 + if (!rvu->fwdata) 878 + return -EAGAIN; 879 + 880 + fwdata = rvu->fwdata; 881 + seq_puts(s, "\nRVU Firmware Data:\n"); 882 + seq_puts(s, "\n\t\tPTP INFORMATION\n"); 883 + seq_puts(s, "\t\t===============\n"); 884 + seq_printf(s, "\t\texternal clockrate \t :%x\n", 885 + fwdata->ptp_ext_clk_rate); 886 + seq_printf(s, "\t\texternal timestamp \t :%x\n", 887 + fwdata->ptp_ext_tstamp); 888 + seq_puts(s, "\n"); 889 + 890 + seq_puts(s, "\n\t\tSDP CHANNEL INFORMATION\n"); 891 + seq_puts(s, "\t\t=======================\n"); 892 + seq_printf(s, "\t\tValid \t\t\t :%x\n", fwdata->channel_data.valid); 893 + seq_printf(s, "\t\tNode ID \t\t :%x\n", 894 + fwdata->channel_data.info.node_id); 895 + seq_printf(s, "\t\tNumber of VFs \t\t :%x\n", 896 + fwdata->channel_data.info.max_vfs); 897 + seq_printf(s, "\t\tNumber of PF-Rings \t :%x\n", 898 + fwdata->channel_data.info.num_pf_rings); 899 + seq_printf(s, "\t\tPF SRN \t\t\t :%x\n", 900 + fwdata->channel_data.info.pf_srn); 901 + seq_puts(s, "\n"); 902 + 903 + seq_puts(s, "\n\t\tPF-INDEX MACADDRESS\n"); 904 + seq_puts(s, "\t\t====================\n"); 905 + for (i = 0; i < PF_MACNUM_MAX; i++) { 906 + u64_to_ether_addr(fwdata->pf_macs[i], mac); 907 + if (!is_zero_ether_addr(mac)) { 908 + seq_printf(s, "\t\t %d %pM\n", i, mac); 909 + count++; 910 + } 911 + } 912 + 913 + if (!count) 914 + seq_puts(s, "\t\tNo valid address found\n"); 915 + 916 + seq_puts(s, "\n\t\tVF-INDEX MACADDRESS\n"); 917 + seq_puts(s, "\t\t====================\n"); 918 + count = 0; 919 + for (i = 0; i < VF_MACNUM_MAX; i++) { 920 + u64_to_ether_addr(fwdata->vf_macs[i], mac); 921 + if (!is_zero_ether_addr(mac)) { 922 + seq_printf(s, "\t\t %d %pM\n", i, mac); 923 + count++; 924 + } 925 + } 926 + 927 + if (!count) 928 + seq_puts(s, "\t\tNo valid address found\n"); 929 + 930 + return 0; 931 + } 932 + 933 + RVU_DEBUG_SEQ_FOPS(rvu_fwdata, rvu_fwdata_display, NULL); 934 + 870 935 static bool rvu_dbg_is_valid_lf(struct rvu *rvu, int blkaddr, int lf, 871 936 u16 *pcifunc) 872 937 { ··· 2988 2923 2989 2924 RVU_DEBUG_SEQ_FOPS(cgx_dmac_flt, cgx_dmac_flt_display, NULL); 2990 2925 2926 + static int cgx_print_fwdata(struct seq_file *s, int lmac_id) 2927 + { 2928 + struct cgx_lmac_fwdata_s *fwdata; 2929 + void *cgxd = s->private; 2930 + struct phy_s *phy; 2931 + struct rvu *rvu; 2932 + int cgx_id, i; 2933 + 2934 + rvu = pci_get_drvdata(pci_get_device(PCI_VENDOR_ID_CAVIUM, 2935 + PCI_DEVID_OCTEONTX2_RVU_AF, NULL)); 2936 + if (!rvu) 2937 + return -ENODEV; 2938 + 2939 + if (!rvu->fwdata) 2940 + return -EAGAIN; 2941 + 2942 + cgx_id = cgx_get_cgxid(cgxd); 2943 + 2944 + if (rvu->hw->lmac_per_cgx == CGX_LMACS_USX) 2945 + fwdata = &rvu->fwdata->cgx_fw_data_usx[cgx_id][lmac_id]; 2946 + else 2947 + fwdata = &rvu->fwdata->cgx_fw_data[cgx_id][lmac_id]; 2948 + 2949 + seq_puts(s, "\nFIRMWARE SHARED:\n"); 2950 + seq_puts(s, "\t\tSUPPORTED LINK INFORMATION\t\t\n"); 2951 + seq_puts(s, "\t\t==========================\n"); 2952 + seq_printf(s, "\t\t Link modes \t\t :%llx\n", 2953 + fwdata->supported_link_modes); 2954 + seq_printf(s, "\t\t Autoneg \t\t :%llx\n", fwdata->supported_an); 2955 + seq_printf(s, "\t\t FEC \t\t\t :%llx\n", fwdata->supported_fec); 2956 + seq_puts(s, "\n"); 2957 + 2958 + seq_puts(s, "\t\tADVERTISED LINK INFORMATION\t\t\n"); 2959 + seq_puts(s, "\t\t==========================\n"); 2960 + seq_printf(s, "\t\t Link modes \t\t :%llx\n", 2961 + (u64)fwdata->advertised_link_modes); 2962 + seq_printf(s, "\t\t Autoneg \t\t :%x\n", fwdata->advertised_an); 2963 + seq_printf(s, "\t\t FEC \t\t\t :%llx\n", fwdata->advertised_fec); 2964 + seq_puts(s, "\n"); 2965 + 2966 + seq_puts(s, "\t\tLMAC CONFIG\t\t\n"); 2967 + seq_puts(s, "\t\t============\n"); 2968 + seq_printf(s, "\t\t rw_valid \t\t :%x\n", fwdata->rw_valid); 2969 + seq_printf(s, "\t\t lmac_type \t\t :%x\n", fwdata->lmac_type); 2970 + seq_printf(s, "\t\t portm_idx \t\t :%x\n", fwdata->portm_idx); 2971 + seq_printf(s, "\t\t mgmt_port \t\t :%x\n", fwdata->mgmt_port); 2972 + seq_printf(s, "\t\t Link modes own \t :%llx\n", 2973 + (u64)fwdata->advertised_link_modes_own); 2974 + seq_puts(s, "\n"); 2975 + 2976 + seq_puts(s, "\n\t\tEEPROM DATA\n"); 2977 + seq_puts(s, "\t\t===========\n"); 2978 + seq_printf(s, "\t\t sff_id \t\t :%x\n", fwdata->sfp_eeprom.sff_id); 2979 + seq_puts(s, "\t\t data \t\t\t :\n"); 2980 + seq_puts(s, "\t\t"); 2981 + for (i = 0; i < SFP_EEPROM_SIZE; i++) { 2982 + seq_printf(s, "%x", fwdata->sfp_eeprom.buf[i]); 2983 + if ((i + 1) % 16 == 0) { 2984 + seq_puts(s, "\n"); 2985 + seq_puts(s, "\t\t"); 2986 + } 2987 + } 2988 + seq_puts(s, "\n"); 2989 + 2990 + phy = &fwdata->phy; 2991 + seq_puts(s, "\n\t\tPHY INFORMATION\n"); 2992 + seq_puts(s, "\t\t===============\n"); 2993 + seq_printf(s, "\t\t Mod type configurable \t\t :%x\n", 2994 + phy->misc.can_change_mod_type); 2995 + seq_printf(s, "\t\t Mod type \t\t\t :%x\n", phy->misc.mod_type); 2996 + seq_printf(s, "\t\t Support FEC \t\t\t :%x\n", phy->misc.has_fec_stats); 2997 + seq_printf(s, "\t\t RSFEC corrected words \t\t :%x\n", 2998 + phy->fec_stats.rsfec_corr_cws); 2999 + seq_printf(s, "\t\t RSFEC uncorrected words \t :%x\n", 3000 + phy->fec_stats.rsfec_uncorr_cws); 3001 + seq_printf(s, "\t\t BRFEC corrected words \t\t :%x\n", 3002 + phy->fec_stats.brfec_corr_blks); 3003 + seq_printf(s, "\t\t BRFEC uncorrected words \t :%x\n", 3004 + phy->fec_stats.brfec_uncorr_blks); 3005 + seq_puts(s, "\n"); 3006 + 3007 + return 0; 3008 + } 3009 + 3010 + static int rvu_dbg_cgx_fwdata_display(struct seq_file *s, void *unused) 3011 + { 3012 + return cgx_print_fwdata(s, rvu_dbg_derive_lmacid(s)); 3013 + } 3014 + 3015 + RVU_DEBUG_SEQ_FOPS(cgx_fwdata, cgx_fwdata_display, NULL); 3016 + 2991 3017 static void rvu_dbg_cgx_init(struct rvu *rvu) 2992 3018 { 2993 3019 struct mac_ops *mac_ops; ··· 3118 2962 debugfs_create_file_aux_num("mac_filter", 0600, 3119 2963 rvu->rvu_dbg.lmac, cgx, lmac_id, 3120 2964 &rvu_dbg_cgx_dmac_flt_fops); 2965 + debugfs_create_file("fwdata", 0600, 2966 + rvu->rvu_dbg.lmac, cgx, 2967 + &rvu_dbg_cgx_fwdata_fops); 3121 2968 } 3122 2969 } 3123 2970 } ··· 3966 3807 if (!is_rvu_otx2(rvu)) 3967 3808 debugfs_create_file("lmtst_map_table", 0444, rvu->rvu_dbg.root, 3968 3809 rvu, &rvu_dbg_lmtst_map_table_fops); 3810 + 3811 + debugfs_create_file("rvu_fwdata", 0444, rvu->rvu_dbg.root, rvu, 3812 + &rvu_dbg_rvu_fwdata_fops); 3969 3813 3970 3814 if (!cgx_get_cgxcnt_max()) 3971 3815 goto create;