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Merge tag 'powerpc-4.9-6' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux

Pull powerpc fixes from Michael Ellerman:
"Fixes marked for stable:
- Set missing wakeup bit in LPCR on POWER9
- Fix the early OPAL console wrappers
- Fixup kernel read only mapping

Fixes for code merged this cycle:
- Fix missing CRCs, add more asm-prototypes.h declarations"

* tag 'powerpc-4.9-6' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
powerpc/mm: Fixup kernel read only mapping
powerpc/boot: Fix the early OPAL console wrappers
powerpc: Fix missing CRCs, add more asm-prototypes.h declarations
powerpc: Set missing wakeup bit in LPCR on POWER9

+64 -12
+6 -2
arch/powerpc/boot/main.c
··· 232 232 console_ops.close(); 233 233 234 234 kentry = (kernel_entry_t) vmlinux.addr; 235 - if (ft_addr) 236 - kentry(ft_addr, 0, NULL); 235 + if (ft_addr) { 236 + if(platform_ops.kentry) 237 + platform_ops.kentry(ft_addr, vmlinux.addr); 238 + else 239 + kentry(ft_addr, 0, NULL); 240 + } 237 241 else 238 242 kentry((unsigned long)initrd.addr, initrd.size, 239 243 loader_info.promptr);
+13
arch/powerpc/boot/opal-calls.S
··· 12 12 13 13 .text 14 14 15 + .globl opal_kentry 16 + opal_kentry: 17 + /* r3 is the fdt ptr */ 18 + mtctr r4 19 + li r4, 0 20 + li r5, 0 21 + li r6, 0 22 + li r7, 0 23 + ld r11,opal@got(r2) 24 + ld r8,0(r11) 25 + ld r9,8(r11) 26 + bctr 27 + 15 28 #define OPAL_CALL(name, token) \ 16 29 .globl name; \ 17 30 name: \
+11
arch/powerpc/boot/opal.c
··· 23 23 24 24 static u32 opal_con_id; 25 25 26 + /* see opal-wrappers.S */ 26 27 int64_t opal_console_write(int64_t term_number, u64 *length, const u8 *buffer); 27 28 int64_t opal_console_read(int64_t term_number, uint64_t *length, u8 *buffer); 28 29 int64_t opal_console_write_buffer_space(uint64_t term_number, uint64_t *length); 29 30 int64_t opal_console_flush(uint64_t term_number); 30 31 int64_t opal_poll_events(uint64_t *outstanding_event_mask); 31 32 33 + void opal_kentry(unsigned long fdt_addr, void *vmlinux_addr); 34 + 32 35 static int opal_con_open(void) 33 36 { 37 + /* 38 + * When OPAL loads the boot kernel it stashes the OPAL base and entry 39 + * address in r8 and r9 so the kernel can use the OPAL console 40 + * before unflattening the devicetree. While executing the wrapper will 41 + * probably trash r8 and r9 so this kentry hook restores them before 42 + * entering the decompressed kernel. 43 + */ 44 + platform_ops.kentry = opal_kentry; 34 45 return 0; 35 46 } 36 47
+1
arch/powerpc/boot/ops.h
··· 30 30 void * (*realloc)(void *ptr, unsigned long size); 31 31 void (*exit)(void); 32 32 void * (*vmlinux_alloc)(unsigned long size); 33 + void (*kentry)(unsigned long fdt_addr, void *vmlinux_addr); 33 34 }; 34 35 extern struct platform_ops platform_ops; 35 36
+12
arch/powerpc/include/asm/asm-prototypes.h
··· 14 14 15 15 #include <linux/threads.h> 16 16 #include <linux/kprobes.h> 17 + #include <asm/cacheflush.h> 18 + #include <asm/checksum.h> 19 + #include <asm/uaccess.h> 20 + #include <asm/epapr_hcalls.h> 17 21 18 22 #include <uapi/asm/ucontext.h> 19 23 ··· 112 108 113 109 /* time */ 114 110 void accumulate_stolen_time(void); 111 + 112 + /* misc runtime */ 113 + extern u64 __bswapdi2(u64); 114 + extern s64 __lshrdi3(s64, int); 115 + extern s64 __ashldi3(s64, int); 116 + extern s64 __ashrdi3(s64, int); 117 + extern int __cmpdi2(s64, s64); 118 + extern int __ucmpdi2(u64, u64); 115 119 116 120 #endif /* _ASM_POWERPC_ASM_PROTOTYPES_H */
+10 -4
arch/powerpc/include/asm/mmu.h
··· 29 29 */ 30 30 31 31 /* 32 + * Kernel read only support. 33 + * We added the ppp value 0b110 in ISA 2.04. 34 + */ 35 + #define MMU_FTR_KERNEL_RO ASM_CONST(0x00004000) 36 + 37 + /* 32 38 * We need to clear top 16bits of va (from the remaining 64 bits )in 33 39 * tlbie* instructions 34 40 */ ··· 109 103 #define MMU_FTRS_POWER4 MMU_FTRS_DEFAULT_HPTE_ARCH_V2 110 104 #define MMU_FTRS_PPC970 MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA 111 105 #define MMU_FTRS_POWER5 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE 112 - #define MMU_FTRS_POWER6 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE 113 - #define MMU_FTRS_POWER7 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE 114 - #define MMU_FTRS_POWER8 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE 115 - #define MMU_FTRS_POWER9 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE 106 + #define MMU_FTRS_POWER6 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_KERNEL_RO 107 + #define MMU_FTRS_POWER7 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_KERNEL_RO 108 + #define MMU_FTRS_POWER8 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_KERNEL_RO 109 + #define MMU_FTRS_POWER9 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_KERNEL_RO 116 110 #define MMU_FTRS_CELL MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \ 117 111 MMU_FTR_CI_LARGE_PAGE 118 112 #define MMU_FTRS_PA6T MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
+1
arch/powerpc/include/asm/reg.h
··· 355 355 #define LPCR_PECE0 ASM_CONST(0x0000000000004000) /* ext. exceptions can cause exit */ 356 356 #define LPCR_PECE1 ASM_CONST(0x0000000000002000) /* decrementer can cause exit */ 357 357 #define LPCR_PECE2 ASM_CONST(0x0000000000001000) /* machine check etc can cause exit */ 358 + #define LPCR_PECE_HVEE ASM_CONST(0x0000400000000000) /* P9 Wakeup on HV interrupts */ 358 359 #define LPCR_MER ASM_CONST(0x0000000000000800) /* Mediated External Exception */ 359 360 #define LPCR_MER_SH 11 360 361 #define LPCR_TC ASM_CONST(0x0000000000000200) /* Translation control */
+4 -4
arch/powerpc/kernel/cpu_setup_power.S
··· 98 98 li r0,0 99 99 mtspr SPRN_LPID,r0 100 100 mfspr r3,SPRN_LPCR 101 - ori r3, r3, LPCR_PECEDH 102 - ori r3, r3, LPCR_HVICE 101 + LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE) 102 + or r3, r3, r4 103 103 bl __init_LPCR 104 104 bl __init_HFSCR 105 105 bl __init_tlb_power9 ··· 118 118 li r0,0 119 119 mtspr SPRN_LPID,r0 120 120 mfspr r3,SPRN_LPCR 121 - ori r3, r3, LPCR_PECEDH 122 - ori r3, r3, LPCR_HVICE 121 + LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE) 122 + or r3, r3, r4 123 123 bl __init_LPCR 124 124 bl __init_HFSCR 125 125 bl __init_tlb_power9
+6 -2
arch/powerpc/mm/hash_utils_64.c
··· 193 193 /* 194 194 * Kernel read only mapped with ppp bits 0b110 195 195 */ 196 - if (!(pteflags & _PAGE_WRITE)) 197 - rflags |= (HPTE_R_PP0 | 0x2); 196 + if (!(pteflags & _PAGE_WRITE)) { 197 + if (mmu_has_feature(MMU_FTR_KERNEL_RO)) 198 + rflags |= (HPTE_R_PP0 | 0x2); 199 + else 200 + rflags |= 0x3; 201 + } 198 202 } else { 199 203 if (pteflags & _PAGE_RWX) 200 204 rflags |= 0x2;