tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull timer fixes from Thomas Gleixner:
"The following trilogy of patches brings you:

- fix for a long standing math overflow issue with HZ < 60

- an onliner fix for a corner case in the dreaded tick broadcast
mechanism affecting a certain range of AMD machines which are
infested with the infamous automagic C1E power control misfeature

- a fix for one of the ARM platforms which allows the kernel to
proceed and boot instead of stupidly panicing for no good reason.
The patch is slightly larger than necessary, but it's less ugly
than the alternative 5 liner"

* 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
tick: Clear broadcast pending bit when switching to oneshot
clocksource: Kona: Print warning rather than panic
time: Fix overflow when HZ is smaller than 60

Linus Torvalds 3a19c07c 9bd01b9b

+35 -26
+28 -26
drivers/clocksource/bcm_kona_timer.c
··· 99 99 return; 100 100 } 101 101 102 - static void __init kona_timers_init(struct device_node *node) 103 - { 104 - u32 freq; 105 - struct clk *external_clk; 106 - 107 - external_clk = of_clk_get_by_name(node, NULL); 108 - 109 - if (!IS_ERR(external_clk)) { 110 - arch_timer_rate = clk_get_rate(external_clk); 111 - clk_prepare_enable(external_clk); 112 - } else if (!of_property_read_u32(node, "clock-frequency", &freq)) { 113 - arch_timer_rate = freq; 114 - } else { 115 - panic("unable to determine clock-frequency"); 116 - } 117 - 118 - /* Setup IRQ numbers */ 119 - timers.tmr_irq = irq_of_parse_and_map(node, 0); 120 - 121 - /* Setup IO addresses */ 122 - timers.tmr_regs = of_iomap(node, 0); 123 - 124 - kona_timer_disable_and_clear(timers.tmr_regs); 125 - } 126 - 127 102 static int kona_timer_set_next_event(unsigned long clc, 128 103 struct clock_event_device *unused) 129 104 { ··· 173 198 174 199 static void __init kona_timer_init(struct device_node *node) 175 200 { 176 - kona_timers_init(node); 201 + u32 freq; 202 + struct clk *external_clk; 203 + 204 + if (!of_device_is_available(node)) { 205 + pr_info("Kona Timer v1 marked as disabled in device tree\n"); 206 + return; 207 + } 208 + 209 + external_clk = of_clk_get_by_name(node, NULL); 210 + 211 + if (!IS_ERR(external_clk)) { 212 + arch_timer_rate = clk_get_rate(external_clk); 213 + clk_prepare_enable(external_clk); 214 + } else if (!of_property_read_u32(node, "clock-frequency", &freq)) { 215 + arch_timer_rate = freq; 216 + } else { 217 + pr_err("Kona Timer v1 unable to determine clock-frequency"); 218 + return; 219 + } 220 + 221 + /* Setup IRQ numbers */ 222 + timers.tmr_irq = irq_of_parse_and_map(node, 0); 223 + 224 + /* Setup IO addresses */ 225 + timers.tmr_regs = of_iomap(node, 0); 226 + 227 + kona_timer_disable_and_clear(timers.tmr_regs); 228 + 177 229 kona_timer_clockevents_init(); 178 230 setup_irq(timers.tmr_irq, &kona_timer_irq); 179 231 kona_timer_set_next_event((arch_timer_rate / HZ), NULL);
+6
kernel/time/jiffies.c
··· 51 51 * HZ shrinks, so values greater than 8 overflow 32bits when 52 52 * HZ=100. 53 53 */ 54 + #if HZ < 34 55 + #define JIFFIES_SHIFT 6 56 + #elif HZ < 67 57 + #define JIFFIES_SHIFT 7 58 + #else 54 59 #define JIFFIES_SHIFT 8 60 + #endif 55 61 56 62 static cycle_t jiffies_read(struct clocksource *cs) 57 63 {
+1
kernel/time/tick-broadcast.c
··· 756 756 static void tick_broadcast_clear_oneshot(int cpu) 757 757 { 758 758 cpumask_clear_cpu(cpu, tick_broadcast_oneshot_mask); 759 + cpumask_clear_cpu(cpu, tick_broadcast_pending_mask); 759 760 } 760 761 761 762 static void tick_broadcast_init_next_event(struct cpumask *mask,