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dmaengine: ti: k3-psil-j721s2: Add psil threads for sa2ul

Add endpoint configuration for the four ingress and two egress
threads for main domain crypto accelerator.

Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Link: https://lore.kernel.org/r/20220628050232.331956-1-j-choudhary@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Jayesh Choudhary and committed by
Vinod Koul 3a4413b7 0cae0437

+8
+8
drivers/dma/ti/k3-psil-j721s2.c
··· 112 112 PSIL_PDMA_XY_PKT(0x4707), 113 113 PSIL_PDMA_XY_PKT(0x4708), 114 114 PSIL_PDMA_XY_PKT(0x4709), 115 + /* MAIN SA2UL */ 116 + PSIL_SA2UL(0x4a40, 0), 117 + PSIL_SA2UL(0x4a41, 0), 118 + PSIL_SA2UL(0x4a42, 0), 119 + PSIL_SA2UL(0x4a43, 0), 115 120 /* CPSW0 */ 116 121 PSIL_ETHERNET(0x7000), 117 122 /* MCU_PDMA0 (MCU_PDMA_MISC_G0) - SPI0 */ ··· 149 144 150 145 /* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */ 151 146 static struct psil_ep j721s2_dst_ep_map[] = { 147 + /* MAIN SA2UL */ 148 + PSIL_SA2UL(0xca40, 1), 149 + PSIL_SA2UL(0xca41, 1), 152 150 /* CPSW0 */ 153 151 PSIL_ETHERNET(0xf000), 154 152 PSIL_ETHERNET(0xf001),