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net: phy: realtek: enable serdes option mode for RTL8226-CG

The RTL8226-CG can make use of the serdes option mode feature to
dynamically switch between SGMII and 2500base-X. From what is
known the setup sequence is much simpler with no magic values.

Convert the exiting config_init() into a helper that configures
the PHY depending on generation 1 or 2. Call the helper from two
separated new config_init() functions.

Finally convert the phy_driver specs of the RTL8226-CG to make
use of the new configuration and switch over to the extended
read_status() function to dynamically change the interface
according to the serdes mode.

Remark! The logic could be simpler if the serdes mode could be
set before all other generation 2 magic values. Due to missing
RTL8221B test hardware the mmd command order was kept.

Tested on Zyxel XGS1210-12.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://patch.msgid.link/20250815082009.3678865-1-markus.stockhausen@gmx.de
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

authored by

Markus Stockhausen and committed by
Jakub Kicinski 3a752e67 09bde6fd

+20 -6
+20 -6
drivers/net/phy/realtek/realtek_main.c
··· 1146 1146 return 0; 1147 1147 } 1148 1148 1149 - static int rtl822xb_config_init(struct phy_device *phydev) 1149 + static int rtl822x_set_serdes_option_mode(struct phy_device *phydev, bool gen1) 1150 1150 { 1151 1151 bool has_2500, has_sgmii; 1152 1152 u16 mode; ··· 1181 1181 /* the following sequence with magic numbers sets up the SerDes 1182 1182 * option mode 1183 1183 */ 1184 - ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x75f3, 0); 1185 - if (ret < 0) 1186 - return ret; 1184 + 1185 + if (!gen1) { 1186 + ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x75f3, 0); 1187 + if (ret < 0) 1188 + return ret; 1189 + } 1187 1190 1188 1191 ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND1, 1189 1192 RTL822X_VND1_SERDES_OPTION, 1190 1193 RTL822X_VND1_SERDES_OPTION_MODE_MASK, 1191 1194 mode); 1192 - if (ret < 0) 1195 + if (gen1 || ret < 0) 1193 1196 return ret; 1194 1197 1195 1198 ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6a04, 0x0503); ··· 1204 1201 return ret; 1205 1202 1206 1203 return phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f11, 0x8020); 1204 + } 1205 + 1206 + static int rtl822x_config_init(struct phy_device *phydev) 1207 + { 1208 + return rtl822x_set_serdes_option_mode(phydev, true); 1209 + } 1210 + 1211 + static int rtl822xb_config_init(struct phy_device *phydev) 1212 + { 1213 + return rtl822x_set_serdes_option_mode(phydev, false); 1207 1214 } 1208 1215 1209 1216 static int rtl822xb_get_rate_matching(struct phy_device *phydev, ··· 1814 1801 .soft_reset = rtl822x_c45_soft_reset, 1815 1802 .get_features = rtl822x_c45_get_features, 1816 1803 .config_aneg = rtl822x_c45_config_aneg, 1817 - .read_status = rtl822x_c45_read_status, 1804 + .config_init = rtl822x_config_init, 1805 + .read_status = rtl822xb_c45_read_status, 1818 1806 .suspend = genphy_c45_pma_suspend, 1819 1807 .resume = rtlgen_c45_resume, 1820 1808 }, {