tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc

* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc:
ARM: mach-footbridge: add missing header file <video/vga.h>
ARM: mach-orion5x: add missing header file <linux/vga.h>
arm: fix compile failure in orion5x/dns323-setup.c
at91: at91sam9261.c: fix typo in t2_clk alias for atmel_tcb.0
ARM: S5P: fix bug in spdif_clk_get_rate
ARM: EXYNOS4: Add restart hook for proper reboot
ARM: EXYNOS4: Increase reset delay for USB HOST PHY
ARM: S5P: add required chained_irq_enter/exit to gpio-int code
ARM: EXYNOS4: add required chained_irq_enter/exit to eint code
ARM: SAMSUNG: Add chained enrty/exit call to timer interrupt handler
ARM: S3C64XX: Fix build break in PM debug
ARM: S5PV210: Fix build warning
ARM: EXYNOS4: Fix the IRQ definitions for MIPI CSIS device
ARM: EXYNOS4: remove duplicated inclusion
ARM: EXYNOS4: Fix wrong devname to support clkdev
ARM: EXYNOS4: Use the correct regulator names on universal_c210
ARM: SAMSUNG: Fix Section mismatch in samsung_bl_set()
ARM: S5P64X0: Replace irq_gc_ack() with irq_gc_ack_set_bit()

Linus Torvalds 3ae627b5 d4d7b2a1

+45 -14
+1 -1
arch/arm/mach-at91/at91sam9261.c
··· 157 157 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), 158 158 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk), 159 159 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk), 160 - CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc1_clk), 160 + CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk), 161 161 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), 162 162 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), 163 163 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
+1 -1
arch/arm/mach-exynos4/clock.c
··· 520 520 .ctrlbit = (1 << 21), 521 521 }, { 522 522 .name = "ac97", 523 - .id = -1, 523 + .devname = "samsung-ac97", 524 524 .enable = exynos4_clk_ip_peril_ctrl, 525 525 .ctrlbit = (1 << 27), 526 526 }, {
+10 -1
arch/arm/mach-exynos4/cpu.c
··· 24 24 #include <plat/exynos4.h> 25 25 #include <plat/adc-core.h> 26 26 #include <plat/sdhci.h> 27 - #include <plat/devs.h> 28 27 #include <plat/fb-core.h> 29 28 #include <plat/fimc-core.h> 30 29 #include <plat/iic-core.h> 30 + #include <plat/reset.h> 31 31 32 32 #include <mach/regs-irq.h> 33 + #include <mach/regs-pmu.h> 33 34 34 35 extern int combiner_init(unsigned int combiner_nr, void __iomem *base, 35 36 unsigned int irq_start); ··· 127 126 cpu_do_idle(); 128 127 129 128 local_irq_enable(); 129 + } 130 + 131 + static void exynos4_sw_reset(void) 132 + { 133 + __raw_writel(0x1, S5P_SWRESET); 130 134 } 131 135 132 136 /* ··· 246 240 247 241 /* set idle function */ 248 242 pm_idle = exynos4_idle; 243 + 244 + /* set sw_reset function */ 245 + s5p_reset_hook = exynos4_sw_reset; 249 246 250 247 return sysdev_register(&exynos4_sysdev); 251 248 }
+2 -3
arch/arm/mach-exynos4/include/mach/irqs.h
··· 80 80 #define IRQ_HSMMC3 IRQ_SPI(76) 81 81 #define IRQ_DWMCI IRQ_SPI(77) 82 82 83 - #define IRQ_MIPICSI0 IRQ_SPI(78) 84 - 85 - #define IRQ_MIPICSI1 IRQ_SPI(80) 83 + #define IRQ_MIPI_CSIS0 IRQ_SPI(78) 84 + #define IRQ_MIPI_CSIS1 IRQ_SPI(80) 86 85 87 86 #define IRQ_ONENAND_AUDI IRQ_SPI(82) 88 87 #define IRQ_ROTATOR IRQ_SPI(83)
+2
arch/arm/mach-exynos4/include/mach/regs-pmu.h
··· 29 29 #define S5P_USE_STANDBY_WFE1 (1 << 25) 30 30 #define S5P_USE_MASK ((0x3 << 16) | (0x3 << 24)) 31 31 32 + #define S5P_SWRESET S5P_PMUREG(0x0400) 33 + 32 34 #define S5P_WAKEUP_STAT S5P_PMUREG(0x0600) 33 35 #define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604) 34 36 #define S5P_WAKEUP_MASK S5P_PMUREG(0x0608)
+7
arch/arm/mach-exynos4/irq-eint.c
··· 23 23 24 24 #include <mach/regs-gpio.h> 25 25 26 + #include <asm/mach/irq.h> 27 + 26 28 static DEFINE_SPINLOCK(eint_lock); 27 29 28 30 static unsigned int eint0_15_data[16]; ··· 186 184 187 185 static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) 188 186 { 187 + struct irq_chip *chip = irq_get_chip(irq); 188 + chained_irq_enter(chip, desc); 189 189 exynos4_irq_demux_eint(IRQ_EINT(16)); 190 190 exynos4_irq_demux_eint(IRQ_EINT(24)); 191 + chained_irq_exit(chip, desc); 191 192 } 192 193 193 194 static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc) ··· 198 193 u32 *irq_data = irq_get_handler_data(irq); 199 194 struct irq_chip *chip = irq_get_chip(irq); 200 195 196 + chained_irq_enter(chip, desc); 201 197 chip->irq_mask(&desc->irq_data); 202 198 203 199 if (chip->irq_ack) ··· 207 201 generic_handle_irq(*irq_data); 208 202 209 203 chip->irq_unmask(&desc->irq_data); 204 + chained_irq_exit(chip, desc); 210 205 } 211 206 212 207 int __init exynos4_init_irq_eint(void)
+2 -2
arch/arm/mach-exynos4/mach-universal_c210.c
··· 79 79 }; 80 80 81 81 static struct regulator_consumer_supply max8952_consumer = 82 - REGULATOR_SUPPLY("vddarm", NULL); 82 + REGULATOR_SUPPLY("vdd_arm", NULL); 83 83 84 84 static struct max8952_platform_data universal_max8952_pdata __initdata = { 85 85 .gpio_vid0 = EXYNOS4_GPX0(3), ··· 105 105 }; 106 106 107 107 static struct regulator_consumer_supply lp3974_buck1_consumer = 108 - REGULATOR_SUPPLY("vddint", NULL); 108 + REGULATOR_SUPPLY("vdd_int", NULL); 109 109 110 110 static struct regulator_consumer_supply lp3974_buck2_consumer = 111 111 REGULATOR_SUPPLY("vddg3d", NULL);
+1 -1
arch/arm/mach-exynos4/setup-usb-phy.c
··· 82 82 83 83 rstcon &= ~(HOST_LINK_PORT_SWRST_MASK | PHY1_SWRST_MASK); 84 84 writel(rstcon, EXYNOS4_RSTCON); 85 - udelay(50); 85 + udelay(80); 86 86 87 87 clk_disable(otg_clk); 88 88 clk_put(otg_clk);
+1
arch/arm/mach-footbridge/dc21285.c
··· 18 18 #include <linux/irq.h> 19 19 #include <linux/io.h> 20 20 #include <linux/spinlock.h> 21 + #include <video/vga.h> 21 22 22 23 #include <asm/irq.h> 23 24 #include <asm/system.h>
+1 -1
arch/arm/mach-orion5x/dns323-setup.c
··· 77 77 /* 78 78 * Check for devices with hard-wired IRQs. 79 79 */ 80 - irq = orion5x_pci_map_irq(const dev, slot, pin); 80 + irq = orion5x_pci_map_irq(dev, slot, pin); 81 81 if (irq != -1) 82 82 return irq; 83 83
+1
arch/arm/mach-orion5x/pci.c
··· 14 14 #include <linux/pci.h> 15 15 #include <linux/slab.h> 16 16 #include <linux/mbus.h> 17 + #include <video/vga.h> 17 18 #include <asm/irq.h> 18 19 #include <asm/mach/pci.h> 19 20 #include <plat/pcie.h>
+1
arch/arm/mach-s3c64xx/pm.c
··· 16 16 #include <linux/suspend.h> 17 17 #include <linux/serial_core.h> 18 18 #include <linux/io.h> 19 + #include <linux/gpio.h> 19 20 20 21 #include <mach/map.h> 21 22 #include <mach/irqs.h>
+1 -1
arch/arm/mach-s5p64x0/irq-eint.c
··· 129 129 } 130 130 131 131 ct = gc->chip_types; 132 - ct->chip.irq_ack = irq_gc_ack; 132 + ct->chip.irq_ack = irq_gc_ack_set_bit; 133 133 ct->chip.irq_mask = irq_gc_mask_set_bit; 134 134 ct->chip.irq_unmask = irq_gc_mask_clr_bit; 135 135 ct->chip.irq_set_type = s5p64x0_irq_eint_set_type;
+1 -1
arch/arm/mach-s5pv210/pm.c
··· 88 88 SAVE_ITEM(S3C2410_TCNTO(0)), 89 89 }; 90 90 91 - void s5pv210_cpu_suspend(unsigned long arg) 91 + static int s5pv210_cpu_suspend(unsigned long arg) 92 92 { 93 93 unsigned long tmp; 94 94
+1 -1
arch/arm/plat-s5p/clock.c
··· 192 192 if (IS_ERR(pclk)) 193 193 return -EINVAL; 194 194 195 - rate = pclk->ops->get_rate(clk); 195 + rate = pclk->ops->get_rate(pclk); 196 196 clk_put(pclk); 197 197 198 198 return rate;
+6
arch/arm/plat-s5p/irq-gpioint.c
··· 23 23 #include <plat/gpio-core.h> 24 24 #include <plat/gpio-cfg.h> 25 25 26 + #include <asm/mach/irq.h> 27 + 26 28 #define GPIO_BASE(chip) (((unsigned long)(chip)->base) & 0xFFFFF000u) 27 29 28 30 #define CON_OFFSET 0x700 ··· 83 81 int group, pend_offset, mask_offset; 84 82 unsigned int pend, mask; 85 83 84 + struct irq_chip *chip = irq_get_chip(irq); 85 + chained_irq_enter(chip, desc); 86 + 86 87 for (group = 0; group < bank->nr_groups; group++) { 87 88 struct s3c_gpio_chip *chip = bank->chips[group]; 88 89 if (!chip) ··· 107 102 pend &= ~BIT(offset); 108 103 } 109 104 } 105 + chained_irq_exit(chip, desc); 110 106 } 111 107 112 108 static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
+1 -1
arch/arm/plat-samsung/include/plat/backlight.h
··· 20 20 int func; 21 21 }; 22 22 23 - extern void samsung_bl_set(struct samsung_bl_gpio_info *gpio_info, 23 + extern void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info, 24 24 struct platform_pwm_backlight_data *bl_data); 25 25 26 26 #endif /* __ASM_PLAT_BACKLIGHT_H */
+5
arch/arm/plat-samsung/irq-vic-timer.c
··· 22 22 #include <plat/irq-vic-timer.h> 23 23 #include <plat/regs-timer.h> 24 24 25 + #include <asm/mach/irq.h> 26 + 25 27 static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc) 26 28 { 29 + struct irq_chip *chip = irq_get_chip(irq); 30 + chained_irq_enter(chip, desc); 27 31 generic_handle_irq((int)desc->irq_data.handler_data); 32 + chained_irq_exit(chip, desc); 28 33 } 29 34 30 35 /* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */