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Merge tag 'xilinx-defconfig-for-6.20' of https://github.com/Xilinx/linux-xlnx into soc/defconfig

arm64: Xilinx defconfig changes for 6.20

- Enable missing drivers by default

* tag 'xilinx-defconfig-for-6.20' of https://github.com/Xilinx/linux-xlnx:
arm64: defconfig: Drop duplicate CONFIG_OMAP_USB2 entry
arm64: defconfig: Enable missing AMD/Xilinx drivers

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+42
+42
arch/arm64/configs/defconfig
··· 236 236 CONFIG_PCIE_RENESAS_RZG3S_HOST=y 237 237 CONFIG_PCIE_ROCKCHIP_HOST=m 238 238 CONFIG_PCI_XGENE=y 239 + CONFIG_PCIE_XILINX=y 240 + CONFIG_PCIE_XILINX_DMA_PL=y 241 + CONFIG_PCIE_XILINX_NWL=y 242 + CONFIG_PCIE_XILINX_CPM=y 239 243 CONFIG_PCI_IMX6_HOST=y 240 244 CONFIG_PCI_LAYERSCAPE=y 241 245 CONFIG_PCI_HISI=y ··· 280 276 CONFIG_QCOM_QSEECOM_UEFISECAPP=y 281 277 CONFIG_EXYNOS_ACPM_PROTOCOL=m 282 278 CONFIG_TEGRA_BPMP=y 279 + CONFIG_ZYNQMP_FIRMWARE_DEBUG=y 283 280 CONFIG_GNSS=m 284 281 CONFIG_GNSS_MTK_SERIAL=m 285 282 CONFIG_MTD=y ··· 314 309 CONFIG_QCOM_FASTRPC=m 315 310 CONFIG_SRAM=y 316 311 CONFIG_PCI_ENDPOINT_TEST=m 312 + CONFIG_XILINX_SDFEC=m 317 313 CONFIG_EEPROM_AT24=m 318 314 CONFIG_EEPROM_AT25=m 319 315 CONFIG_UACCE=m ··· 404 398 CONFIG_DWMAC_TEGRA=m 405 399 CONFIG_TI_K3_AM65_CPSW_NUSS=y 406 400 CONFIG_TI_ICSSG_PRUETH=m 401 + CONFIG_XILINX_AXI_EMAC=m 407 402 CONFIG_QCOM_IPA=m 408 403 CONFIG_MESON_GXL_PHY=m 409 404 CONFIG_AQUANTIA_PHY=y ··· 421 414 CONFIG_DP83869_PHY=m 422 415 CONFIG_DP83TD510_PHY=y 423 416 CONFIG_VITESSE_PHY=y 417 + CONFIG_XILINX_GMII2RGMII=m 424 418 CONFIG_CAN_FLEXCAN=m 419 + CONFIG_CAN_XILINXCAN=m 425 420 CONFIG_CAN_M_CAN=m 426 421 CONFIG_CAN_M_CAN_PLATFORM=m 427 422 CONFIG_CAN_RCAR=m ··· 577 568 CONFIG_I2C_SH_MOBILE=y 578 569 CONFIG_I2C_TEGRA=y 579 570 CONFIG_I2C_UNIPHIER_F=y 571 + CONFIG_I2C_XILINX=m 580 572 CONFIG_I2C_RCAR=y 581 573 CONFIG_I2C_CROS_EC_TUNNEL=y 582 574 CONFIG_SPI=y ··· 616 606 CONFIG_SPI_SUN6I=y 617 607 CONFIG_SPI_TEGRA210_QUAD=m 618 608 CONFIG_SPI_TEGRA114=m 609 + CONFIG_SPI_XILINX=m 610 + CONFIG_SPI_ZYNQMP_GQSPI=m 619 611 CONFIG_SPI_SPIDEV=m 620 612 CONFIG_SPMI=y 621 613 CONFIG_SPMI_APPLE=m ··· 712 700 CONFIG_GPIO_VF610=y 713 701 CONFIG_GPIO_XGENE=y 714 702 CONFIG_GPIO_XGENE_SB=y 703 + CONFIG_GPIO_XILINX=m 704 + CONFIG_GPIO_ZYNQ=m 715 705 CONFIG_GPIO_MAX732X=y 716 706 CONFIG_GPIO_PCA953X=y 717 707 CONFIG_GPIO_PCA953X_IRQ=y ··· 788 774 CONFIG_UNIPHIER_THERMAL=y 789 775 CONFIG_KHADAS_MCU_FAN_THERMAL=m 790 776 CONFIG_WATCHDOG=y 777 + CONFIG_XILINX_WATCHDOG=m 778 + CONFIG_XILINX_WINDOW_WATCHDOG=m 791 779 CONFIG_SL28CPLD_WATCHDOG=m 792 780 CONFIG_ARM_SP805_WATCHDOG=y 793 781 CONFIG_ARM_SBSA_WATCHDOG=y ··· 1038 1022 CONFIG_DRM_PANFROST=m 1039 1023 CONFIG_DRM_PANTHOR=m 1040 1024 CONFIG_DRM_TIDSS=m 1025 + CONFIG_DRM_ZYNQMP_DPSUB=m 1026 + CONFIG_DRM_ZYNQMP_DPSUB_AUDIO=y 1041 1027 CONFIG_DRM_POWERVR=m 1042 1028 CONFIG_FB=y 1043 1029 CONFIG_FB_EFI=y ··· 1128 1110 CONFIG_SND_SOC_TEGRA_AUDIO_GRAPH_CARD=m 1129 1111 CONFIG_SND_SOC_DAVINCI_MCASP=m 1130 1112 CONFIG_SND_SOC_J721E_EVM=m 1113 + CONFIG_SND_SOC_XILINX_I2S=m 1114 + CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER=m 1115 + CONFIG_SND_SOC_XILINX_SPDIF=m 1131 1116 CONFIG_SND_SOC_AK4613=m 1132 1117 CONFIG_SND_SOC_AK4619=m 1133 1118 CONFIG_SND_SOC_DA7213=m ··· 1215 1194 CONFIG_USB_QCOM_EUD=m 1216 1195 CONFIG_USB_HSIC_USB3503=y 1217 1196 CONFIG_USB_ONBOARD_DEV=m 1197 + CONFIG_USB_ONBOARD_DEV_USB5744=y 1218 1198 CONFIG_NOP_USB_XCEIV=y 1219 1199 CONFIG_USB_MXS_PHY=m 1220 1200 CONFIG_USB_GADGET=y ··· 1319 1297 CONFIG_EDAC=y 1320 1298 CONFIG_EDAC_GHES=y 1321 1299 CONFIG_EDAC_LAYERSCAPE=m 1300 + CONFIG_EDAC_ZYNQMP=m 1301 + CONFIG_EDAC_VERSAL=m 1322 1302 CONFIG_RTC_CLASS=y 1323 1303 CONFIG_RTC_DRV_DS1307=m 1324 1304 CONFIG_RTC_DRV_HYM8563=m ··· 1341 1317 CONFIG_RTC_DRV_PCF2127=m 1342 1318 CONFIG_RTC_DRV_DA9063=m 1343 1319 CONFIG_RTC_DRV_EFI=y 1320 + CONFIG_RTC_DRV_ZYNQMP=m 1344 1321 CONFIG_RTC_DRV_CROS_EC=y 1345 1322 CONFIG_RTC_DRV_FSL_FTM_ALARM=m 1346 1323 CONFIG_RTC_DRV_S3C=y ··· 1373 1348 CONFIG_TEGRA186_GPC_DMA=y 1374 1349 CONFIG_TEGRA20_APB_DMA=y 1375 1350 CONFIG_TEGRA210_ADMA=m 1351 + CONFIG_XILINX_DMA=m 1352 + CONFIG_XILINX_ZYNQMP_DMA=m 1353 + CONFIG_XILINX_ZYNQMP_DPDMA=m 1376 1354 CONFIG_MTK_UART_APDMA=m 1377 1355 CONFIG_QCOM_BAM_DMA=y 1378 1356 CONFIG_QCOM_GPI_DMA=m ··· 1549 1521 CONFIG_CLK_RENESAS_VBATTB=m 1550 1522 CONFIG_EXYNOS_ACPM_CLK=m 1551 1523 CONFIG_CLK_SOPHGO_CV1800=y 1524 + CONFIG_XILINX_VCU=m 1525 + CONFIG_COMMON_CLK_XLNX_CLKWZRD=m 1552 1526 CONFIG_HWSPINLOCK=y 1553 1527 CONFIG_HWSPINLOCK_OMAP=m 1554 1528 CONFIG_HWSPINLOCK_QCOM=y ··· 1667 1637 CONFIG_SOPHGO_CV1800B_ADC=m 1668 1638 CONFIG_TI_ADS1015=m 1669 1639 CONFIG_TI_AM335X_ADC=m 1640 + CONFIG_XILINX_XADC=m 1641 + CONFIG_XILINX_AMS=m 1670 1642 CONFIG_IIO_CROS_EC_SENSORS_CORE=m 1671 1643 CONFIG_IIO_CROS_EC_SENSORS=m 1672 1644 CONFIG_IIO_ST_LSM6DSX=m ··· 1702 1670 CONFIG_PWM_TIECAP=m 1703 1671 CONFIG_PWM_TIEHRPWM=m 1704 1672 CONFIG_PWM_VISCONTI=m 1673 + CONFIG_PWM_XILINX=m 1705 1674 CONFIG_SL28CPLD_INTC=y 1675 + CONFIG_XILINX_INTC=y 1706 1676 CONFIG_QCOM_PDC=y 1707 1677 CONFIG_QCOM_MPM=y 1708 1678 CONFIG_TI_SCI_INTR_IRQCHIP=y ··· 1770 1736 CONFIG_PHY_TEGRA_XUSB=y 1771 1737 CONFIG_PHY_AM654_SERDES=m 1772 1738 CONFIG_PHY_J721E_WIZ=m 1739 + CONFIG_PHY_XILINX_ZYNQMP=m 1773 1740 CONFIG_ARM_CCI_PMU=m 1774 1741 CONFIG_ARM_CCN=m 1775 1742 CONFIG_ARM_CMN=m ··· 1804 1769 CONFIG_NVMEM_SPMI_SDAM=m 1805 1770 CONFIG_NVMEM_SUNXI_SID=y 1806 1771 CONFIG_NVMEM_UNIPHIER_EFUSE=y 1772 + CONFIG_NVMEM_ZYNQMP=m 1807 1773 CONFIG_FPGA=y 1808 1774 CONFIG_FPGA_MGR_ALTERA_CVP=m 1809 1775 CONFIG_FPGA_MGR_STRATIX10_SOC=m 1810 1776 CONFIG_FPGA_BRIDGE=m 1811 1777 CONFIG_ALTERA_FREEZE_BRIDGE=m 1778 + CONFIG_XILINX_PR_DECOUPLER=m 1812 1779 CONFIG_FPGA_REGION=m 1813 1780 CONFIG_OF_FPGA_REGION=m 1814 1781 CONFIG_OF_OVERLAY=y 1782 + CONFIG_FPGA_MGR_ZYNQMP_FPGA=m 1783 + CONFIG_FPGA_MGR_VERSAL_FPGA=m 1815 1784 CONFIG_TEE=y 1816 1785 CONFIG_OPTEE=y 1817 1786 CONFIG_MUX_GPIO=m ··· 1910 1871 CONFIG_CRYPTO_DEV_QCE=m 1911 1872 CONFIG_CRYPTO_DEV_QCOM_RNG=m 1912 1873 CONFIG_CRYPTO_DEV_TEGRA=m 1874 + CONFIG_CRYPTO_DEV_XILINX_TRNG=m 1875 + CONFIG_CRYPTO_DEV_ZYNQMP_AES=m 1876 + CONFIG_CRYPTO_DEV_ZYNQMP_SHA3=m 1913 1877 CONFIG_CRYPTO_DEV_CCREE=m 1914 1878 CONFIG_CRYPTO_DEV_HISI_SEC2=m 1915 1879 CONFIG_CRYPTO_DEV_HISI_ZIP=m