Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
iio: adc: ad7606: dynamically allocate channel info
Refactor the ad7606 drivers to dynamically allocate the channel info.
The channel info was getting a bit unwieldy. In some cases, the
indio_dev->channels field was getting assigned up to 3 different times,
each in a different function, making it difficult to see where the info
was coming from. This problem stems from the number of permutations of
the channel array needed to support various modes of operation and data
buses. We already have 4 per chip (hardware mode, software mode, AXI ADC
backend and AXI ADC backend with software mode) and we intend to add two
more per chip when adding SPI offload support.
To make it easier to read and maintain, move all of the channel setup
to a single function that dynamically allocates and fills in the channel
info.
Additionally, this lets us remove some hacks where we had to compute an
offset due to the fact that sometimes there was a soft timestamp channel
at the start of the array. Now the timestamp channel is always at the
end of the array as is typical in other drivers.
Reviewed-by: Nuno Sá <nuno.sa@analog.com>
Signed-off-by: David Lechner <dlechner@baylibre.com>
Link: https://patch.msgid.link/20250318-iio-adc-ad7606-improvements-v2-9-4b605427774c@baylibre.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
authored by
David Lechner
and committed by
Jonathan Cameron
3b5b55ca
c1f571c3
+101
-324
+96
-134
drivers/iio/adc/ad7606.c
+96
-134
drivers/iio/adc/ad7606.c
···
95
95
1, 2, 4, 8, 16, 32, 64, 128,
96
96
};
97
97
98
-
static const struct iio_chan_spec ad7605_channels[] = {
99
-
IIO_CHAN_SOFT_TIMESTAMP(4),
100
-
AD7605_CHANNEL(0),
101
-
AD7605_CHANNEL(1),
102
-
AD7605_CHANNEL(2),
103
-
AD7605_CHANNEL(3),
104
-
};
105
-
106
-
static const struct iio_chan_spec ad7606_channels_16bit[] = {
107
-
IIO_CHAN_SOFT_TIMESTAMP(8),
108
-
AD7606_CHANNEL(0, 16),
109
-
AD7606_CHANNEL(1, 16),
110
-
AD7606_CHANNEL(2, 16),
111
-
AD7606_CHANNEL(3, 16),
112
-
AD7606_CHANNEL(4, 16),
113
-
AD7606_CHANNEL(5, 16),
114
-
AD7606_CHANNEL(6, 16),
115
-
AD7606_CHANNEL(7, 16),
116
-
};
117
-
118
-
static const struct iio_chan_spec ad7606_channels_18bit[] = {
119
-
IIO_CHAN_SOFT_TIMESTAMP(8),
120
-
AD7606_CHANNEL(0, 18),
121
-
AD7606_CHANNEL(1, 18),
122
-
AD7606_CHANNEL(2, 18),
123
-
AD7606_CHANNEL(3, 18),
124
-
AD7606_CHANNEL(4, 18),
125
-
AD7606_CHANNEL(5, 18),
126
-
AD7606_CHANNEL(6, 18),
127
-
AD7606_CHANNEL(7, 18),
128
-
};
129
-
130
-
static const struct iio_chan_spec ad7607_channels[] = {
131
-
IIO_CHAN_SOFT_TIMESTAMP(8),
132
-
AD7606_CHANNEL(0, 14),
133
-
AD7606_CHANNEL(1, 14),
134
-
AD7606_CHANNEL(2, 14),
135
-
AD7606_CHANNEL(3, 14),
136
-
AD7606_CHANNEL(4, 14),
137
-
AD7606_CHANNEL(5, 14),
138
-
AD7606_CHANNEL(6, 14),
139
-
AD7606_CHANNEL(7, 14),
140
-
};
141
-
142
-
static const struct iio_chan_spec ad7608_channels[] = {
143
-
IIO_CHAN_SOFT_TIMESTAMP(8),
144
-
AD7606_CHANNEL(0, 18),
145
-
AD7606_CHANNEL(1, 18),
146
-
AD7606_CHANNEL(2, 18),
147
-
AD7606_CHANNEL(3, 18),
148
-
AD7606_CHANNEL(4, 18),
149
-
AD7606_CHANNEL(5, 18),
150
-
AD7606_CHANNEL(6, 18),
151
-
AD7606_CHANNEL(7, 18),
152
-
};
153
-
154
-
/*
155
-
* The current assumption that this driver makes for AD7616, is that it's
156
-
* working in Hardware Mode with Serial, Burst and Sequencer modes activated.
157
-
* To activate them, following pins must be pulled high:
158
-
* -SER/PAR
159
-
* -SEQEN
160
-
* And following pins must be pulled low:
161
-
* -WR/BURST
162
-
* -DB4/SER1W
163
-
*/
164
-
static const struct iio_chan_spec ad7616_channels[] = {
165
-
IIO_CHAN_SOFT_TIMESTAMP(16),
166
-
AD7606_CHANNEL(0, 16),
167
-
AD7606_CHANNEL(1, 16),
168
-
AD7606_CHANNEL(2, 16),
169
-
AD7606_CHANNEL(3, 16),
170
-
AD7606_CHANNEL(4, 16),
171
-
AD7606_CHANNEL(5, 16),
172
-
AD7606_CHANNEL(6, 16),
173
-
AD7606_CHANNEL(7, 16),
174
-
AD7606_CHANNEL(8, 16),
175
-
AD7606_CHANNEL(9, 16),
176
-
AD7606_CHANNEL(10, 16),
177
-
AD7606_CHANNEL(11, 16),
178
-
AD7606_CHANNEL(12, 16),
179
-
AD7606_CHANNEL(13, 16),
180
-
AD7606_CHANNEL(14, 16),
181
-
AD7606_CHANNEL(15, 16),
182
-
};
183
-
184
98
static int ad7606c_18bit_chan_scale_setup(struct iio_dev *indio_dev,
185
99
struct iio_chan_spec *chan);
186
100
static int ad7606c_16bit_chan_scale_setup(struct iio_dev *indio_dev,
···
112
198
113
199
const struct ad7606_chip_info ad7605_4_info = {
114
200
.max_samplerate = 300 * KILO,
115
-
.channels = ad7605_channels,
116
201
.name = "ad7605-4",
202
+
.bits = 16,
117
203
.num_adc_channels = 4,
118
-
.num_channels = 5,
119
204
.scale_setup_cb = ad7606_16bit_chan_scale_setup,
120
205
};
121
206
EXPORT_SYMBOL_NS_GPL(ad7605_4_info, "IIO_AD7606");
122
207
123
208
const struct ad7606_chip_info ad7606_8_info = {
124
209
.max_samplerate = 200 * KILO,
125
-
.channels = ad7606_channels_16bit,
126
210
.name = "ad7606-8",
211
+
.bits = 16,
127
212
.num_adc_channels = 8,
128
-
.num_channels = 9,
129
213
.oversampling_avail = ad7606_oversampling_avail,
130
214
.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
131
215
.scale_setup_cb = ad7606_16bit_chan_scale_setup,
···
132
220
133
221
const struct ad7606_chip_info ad7606_6_info = {
134
222
.max_samplerate = 200 * KILO,
135
-
.channels = ad7606_channels_16bit,
136
223
.name = "ad7606-6",
224
+
.bits = 16,
137
225
.num_adc_channels = 6,
138
-
.num_channels = 7,
139
226
.oversampling_avail = ad7606_oversampling_avail,
140
227
.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
141
228
.scale_setup_cb = ad7606_16bit_chan_scale_setup,
···
143
232
144
233
const struct ad7606_chip_info ad7606_4_info = {
145
234
.max_samplerate = 200 * KILO,
146
-
.channels = ad7606_channels_16bit,
147
235
.name = "ad7606-4",
236
+
.bits = 16,
148
237
.num_adc_channels = 4,
149
-
.num_channels = 5,
150
238
.oversampling_avail = ad7606_oversampling_avail,
151
239
.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
152
240
.scale_setup_cb = ad7606_16bit_chan_scale_setup,
···
153
243
EXPORT_SYMBOL_NS_GPL(ad7606_4_info, "IIO_AD7606");
154
244
155
245
const struct ad7606_chip_info ad7606b_info = {
156
-
.channels = ad7606_channels_16bit,
157
246
.max_samplerate = 800 * KILO,
158
247
.name = "ad7606b",
248
+
.bits = 16,
159
249
.num_adc_channels = 8,
160
-
.num_channels = 9,
161
250
.oversampling_avail = ad7606_oversampling_avail,
162
251
.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
163
252
.scale_setup_cb = ad7606_16bit_chan_scale_setup,
···
166
257
167
258
const struct ad7606_chip_info ad7606c_16_info = {
168
259
.max_samplerate = 1 * MEGA,
169
-
.channels = ad7606_channels_16bit,
170
260
.name = "ad7606c16",
261
+
.bits = 16,
171
262
.num_adc_channels = 8,
172
-
.num_channels = 9,
173
263
.oversampling_avail = ad7606_oversampling_avail,
174
264
.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
175
265
.scale_setup_cb = ad7606c_16bit_chan_scale_setup,
···
178
270
179
271
const struct ad7606_chip_info ad7607_info = {
180
272
.max_samplerate = 200 * KILO,
181
-
.channels = ad7607_channels,
182
273
.name = "ad7607",
274
+
.bits = 14,
183
275
.num_adc_channels = 8,
184
-
.num_channels = 9,
185
276
.oversampling_avail = ad7606_oversampling_avail,
186
277
.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
187
278
.scale_setup_cb = ad7607_chan_scale_setup,
···
189
282
190
283
const struct ad7606_chip_info ad7608_info = {
191
284
.max_samplerate = 200 * KILO,
192
-
.channels = ad7608_channels,
193
285
.name = "ad7608",
286
+
.bits = 18,
194
287
.num_adc_channels = 8,
195
-
.num_channels = 9,
196
288
.oversampling_avail = ad7606_oversampling_avail,
197
289
.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
198
290
.scale_setup_cb = ad7608_chan_scale_setup,
···
200
294
201
295
const struct ad7606_chip_info ad7609_info = {
202
296
.max_samplerate = 200 * KILO,
203
-
.channels = ad7608_channels,
204
297
.name = "ad7609",
298
+
.bits = 18,
205
299
.num_adc_channels = 8,
206
-
.num_channels = 9,
207
300
.oversampling_avail = ad7606_oversampling_avail,
208
301
.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
209
302
.scale_setup_cb = ad7609_chan_scale_setup,
···
211
306
212
307
const struct ad7606_chip_info ad7606c_18_info = {
213
308
.max_samplerate = 1 * MEGA,
214
-
.channels = ad7606_channels_18bit,
215
309
.name = "ad7606c18",
310
+
.bits = 18,
216
311
.num_adc_channels = 8,
217
-
.num_channels = 9,
218
312
.oversampling_avail = ad7606_oversampling_avail,
219
313
.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
220
314
.scale_setup_cb = ad7606c_18bit_chan_scale_setup,
···
223
319
224
320
const struct ad7606_chip_info ad7616_info = {
225
321
.max_samplerate = 1 * MEGA,
226
-
.channels = ad7616_channels,
227
322
.init_delay_ms = 15,
228
323
.name = "ad7616",
324
+
.bits = 16,
229
325
.num_adc_channels = 16,
230
-
.num_channels = 17,
231
326
.oversampling_avail = ad7616_oversampling_avail,
232
327
.oversampling_num = ARRAY_SIZE(ad7616_oversampling_avail),
233
328
.os_req_reset = true,
···
276
373
{
277
374
struct ad7606_state *st = iio_priv(indio_dev);
278
375
unsigned int num_channels = st->chip_info->num_adc_channels;
279
-
unsigned int offset = indio_dev->num_channels - st->chip_info->num_adc_channels;
280
376
struct device *dev = st->dev;
281
377
int ret;
282
378
···
291
389
continue;
292
390
293
391
/* channel number (here) is from 1 to num_channels */
294
-
if (reg < offset || reg > num_channels) {
392
+
if (reg < 1 || reg > num_channels) {
295
393
dev_warn(dev,
296
394
"Invalid channel number (ignoring): %d\n", reg);
297
395
continue;
···
608
706
int *val)
609
707
{
610
708
struct ad7606_state *st = iio_priv(indio_dev);
611
-
unsigned int realbits = st->chip_info->channels[1].scan_type.realbits;
612
709
const struct iio_chan_spec *chan;
710
+
unsigned int realbits;
613
711
int ret;
614
712
615
713
if (st->gpio_convst) {
···
641
739
if (ret)
642
740
goto error_ret;
643
741
644
-
chan = &indio_dev->channels[ch + 1];
742
+
chan = &indio_dev->channels[ch];
743
+
realbits = chan->scan_type.realbits;
744
+
645
745
if (chan->scan_type.sign == 'u') {
646
746
if (realbits > 16)
647
747
*val = st->data.buf32[ch];
···
1188
1284
return st->bops->sw_mode_config(indio_dev);
1189
1285
}
1190
1286
1191
-
static int ad7606_chan_scales_setup(struct iio_dev *indio_dev)
1287
+
static int ad7606_probe_channels(struct iio_dev *indio_dev)
1192
1288
{
1193
1289
struct ad7606_state *st = iio_priv(indio_dev);
1194
-
unsigned int offset = indio_dev->num_channels - st->chip_info->num_adc_channels;
1195
-
struct iio_chan_spec *chans;
1196
-
size_t size;
1197
-
int ch, ret;
1290
+
struct device *dev = indio_dev->dev.parent;
1291
+
struct iio_chan_spec *channels;
1292
+
bool slow_bus;
1293
+
int ret, i;
1198
1294
1199
-
/* Clone IIO channels, since some may be differential */
1200
-
size = indio_dev->num_channels * sizeof(*indio_dev->channels);
1201
-
chans = devm_kzalloc(st->dev, size, GFP_KERNEL);
1202
-
if (!chans)
1295
+
slow_bus = !st->bops->iio_backend_config;
1296
+
indio_dev->num_channels = st->chip_info->num_adc_channels;
1297
+
1298
+
/* Slow buses also get 1 more channel for soft timestamp */
1299
+
if (slow_bus)
1300
+
indio_dev->num_channels++;
1301
+
1302
+
channels = devm_kcalloc(dev, indio_dev->num_channels, sizeof(*channels),
1303
+
GFP_KERNEL);
1304
+
if (!channels)
1203
1305
return -ENOMEM;
1204
1306
1205
-
memcpy(chans, indio_dev->channels, size);
1206
-
indio_dev->channels = chans;
1307
+
for (i = 0; i < st->chip_info->num_adc_channels; i++) {
1308
+
struct iio_chan_spec *chan = &channels[i];
1207
1309
1208
-
for (ch = 0; ch < st->chip_info->num_adc_channels; ch++) {
1209
-
ret = st->chip_info->scale_setup_cb(indio_dev, &chans[ch + offset]);
1310
+
chan->type = IIO_VOLTAGE;
1311
+
chan->indexed = 1;
1312
+
chan->channel = i;
1313
+
chan->scan_index = i;
1314
+
chan->scan_type.sign = 's';
1315
+
chan->scan_type.realbits = st->chip_info->bits;
1316
+
chan->scan_type.storagebits = st->chip_info->bits > 16 ? 32 : 16;
1317
+
chan->scan_type.endianness = IIO_CPU;
1318
+
1319
+
if (indio_dev->modes & INDIO_DIRECT_MODE)
1320
+
chan->info_mask_separate |= BIT(IIO_CHAN_INFO_RAW);
1321
+
1322
+
if (st->sw_mode_en) {
1323
+
chan->info_mask_separate |= BIT(IIO_CHAN_INFO_SCALE);
1324
+
chan->info_mask_separate_available |=
1325
+
BIT(IIO_CHAN_INFO_SCALE);
1326
+
1327
+
/*
1328
+
* All chips with software mode support oversampling,
1329
+
* so we skip the oversampling_available check. And the
1330
+
* shared_by_type instead of shared_by_all on slow
1331
+
* buses is for backward compatibility.
1332
+
*/
1333
+
if (slow_bus)
1334
+
chan->info_mask_shared_by_type |=
1335
+
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO);
1336
+
else
1337
+
chan->info_mask_shared_by_all |=
1338
+
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO);
1339
+
1340
+
chan->info_mask_shared_by_all_available |=
1341
+
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO);
1342
+
} else {
1343
+
chan->info_mask_shared_by_type |=
1344
+
BIT(IIO_CHAN_INFO_SCALE);
1345
+
1346
+
if (st->chip_info->oversampling_avail)
1347
+
chan->info_mask_shared_by_all |=
1348
+
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO);
1349
+
}
1350
+
1351
+
if (!slow_bus)
1352
+
chan->info_mask_shared_by_all |=
1353
+
BIT(IIO_CHAN_INFO_SAMP_FREQ);
1354
+
1355
+
ret = st->chip_info->scale_setup_cb(indio_dev, chan);
1210
1356
if (ret)
1211
1357
return ret;
1212
1358
}
1359
+
1360
+
if (slow_bus)
1361
+
channels[i] = (struct iio_chan_spec)IIO_CHAN_SOFT_TIMESTAMP(i);
1362
+
1363
+
indio_dev->channels = channels;
1213
1364
1214
1365
return 0;
1215
1366
}
···
1297
1338
st->bops = bops;
1298
1339
st->base_address = base_address;
1299
1340
st->oversampling = 1;
1341
+
st->sw_mode_en = device_property_read_bool(dev, "adi,sw-mode");
1342
+
1343
+
if (st->sw_mode_en && !chip_info->sw_setup_cb)
1344
+
return dev_err_probe(dev, -EINVAL,
1345
+
"Software mode is not supported for this chip\n");
1300
1346
1301
1347
ret = devm_regulator_get_enable(dev, "avcc");
1302
1348
if (ret)
···
1330
1366
else
1331
1367
indio_dev->info = &ad7606_info_no_os_or_range;
1332
1368
}
1333
-
indio_dev->modes = INDIO_DIRECT_MODE;
1369
+
1370
+
/* AXI ADC backend doesn't support single read. */
1371
+
indio_dev->modes = st->bops->iio_backend_config ? 0 : INDIO_DIRECT_MODE;
1334
1372
indio_dev->name = chip_info->name;
1335
-
indio_dev->channels = st->chip_info->channels;
1336
-
indio_dev->num_channels = st->chip_info->num_channels;
1373
+
1374
+
ret = ad7606_probe_channels(indio_dev);
1375
+
if (ret)
1376
+
return ret;
1337
1377
1338
1378
ret = ad7606_reset(st);
1339
1379
if (ret)
···
1428
1460
st->write_scale = ad7606_write_scale_hw;
1429
1461
st->write_os = ad7606_write_os_hw;
1430
1462
1431
-
st->sw_mode_en = st->chip_info->sw_setup_cb &&
1432
-
device_property_present(st->dev, "adi,sw-mode");
1433
1463
if (st->sw_mode_en) {
1434
1464
indio_dev->info = &ad7606_info_sw_mode;
1435
1465
st->chip_info->sw_setup_cb(indio_dev);
1436
1466
}
1437
-
1438
-
ret = ad7606_chan_scales_setup(indio_dev);
1439
-
if (ret)
1440
-
return ret;
1441
1467
1442
1468
return devm_iio_device_register(dev, indio_dev);
1443
1469
}
+2
-74
drivers/iio/adc/ad7606.h
+2
-74
drivers/iio/adc/ad7606.h
···
40
40
#define AD7606_RANGE_CH_ADDR(ch) (0x03 + ((ch) >> 1))
41
41
#define AD7606_OS_MODE 0x08
42
42
43
-
#define AD760X_CHANNEL(num, mask_sep, mask_type, mask_all, \
44
-
mask_sep_avail, mask_all_avail, bits) { \
45
-
.type = IIO_VOLTAGE, \
46
-
.indexed = 1, \
47
-
.channel = num, \
48
-
.info_mask_separate = mask_sep, \
49
-
.info_mask_separate_available = \
50
-
mask_sep_avail, \
51
-
.info_mask_shared_by_type = mask_type, \
52
-
.info_mask_shared_by_all = mask_all, \
53
-
.info_mask_shared_by_all_available = \
54
-
mask_all_avail, \
55
-
.scan_index = num, \
56
-
.scan_type = { \
57
-
.sign = 's', \
58
-
.realbits = (bits), \
59
-
.storagebits = (bits) > 16 ? 32 : 16, \
60
-
.endianness = IIO_CPU, \
61
-
}, \
62
-
}
63
-
64
-
#define AD7606_SW_CHANNEL(num, bits) \
65
-
AD760X_CHANNEL(num, \
66
-
/* mask separate */ \
67
-
BIT(IIO_CHAN_INFO_RAW) | \
68
-
BIT(IIO_CHAN_INFO_SCALE), \
69
-
/* mask type */ \
70
-
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
71
-
/* mask all */ \
72
-
0, \
73
-
/* mask separate available */ \
74
-
BIT(IIO_CHAN_INFO_SCALE), \
75
-
/* mask all available */ \
76
-
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
77
-
bits)
78
-
79
-
#define AD7605_CHANNEL(num) \
80
-
AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW), \
81
-
BIT(IIO_CHAN_INFO_SCALE), 0, 0, 0, 16)
82
-
83
-
#define AD7606_CHANNEL(num, bits) \
84
-
AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW), \
85
-
BIT(IIO_CHAN_INFO_SCALE), \
86
-
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
87
-
0, 0, bits)
88
-
89
-
#define AD7616_CHANNEL(num) AD7606_SW_CHANNEL(num, 16)
90
-
91
-
#define AD7606_BI_CHANNEL(num) \
92
-
AD760X_CHANNEL(num, 0, \
93
-
BIT(IIO_CHAN_INFO_SCALE), \
94
-
BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
95
-
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
96
-
0, 0, 16)
97
-
98
-
#define AD7606_BI_SW_CHANNEL(num) \
99
-
AD760X_CHANNEL(num, \
100
-
/* mask separate */ \
101
-
BIT(IIO_CHAN_INFO_SCALE), \
102
-
/* mask type */ \
103
-
0, \
104
-
/* mask all */ \
105
-
BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
106
-
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
107
-
/* mask separate available */ \
108
-
BIT(IIO_CHAN_INFO_SCALE), \
109
-
/* mask all available */ \
110
-
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
111
-
16)
112
-
113
43
struct ad7606_state;
114
44
115
45
typedef int (*ad7606_scale_setup_cb_t)(struct iio_dev *indio_dev,
···
48
118
49
119
/**
50
120
* struct ad7606_chip_info - chip specific information
51
-
* @channels: channel specification
52
121
* @max_samplerate: maximum supported sample rate
53
122
* @name: device name
123
+
* @bits: data width in bits
54
124
* @num_adc_channels: the number of physical voltage inputs
55
-
* @num_channels: number of IIO channels
56
125
* @scale_setup_cb: callback to setup the scales for each channel
57
126
* @sw_setup_cb: callback to setup the software mode if available.
58
127
* @oversampling_avail: pointer to the array which stores the available
···
62
133
* after a restart
63
134
*/
64
135
struct ad7606_chip_info {
65
-
const struct iio_chan_spec *channels;
66
136
unsigned int max_samplerate;
67
137
const char *name;
138
+
unsigned int bits;
68
139
unsigned int num_adc_channels;
69
-
unsigned int num_channels;
70
140
ad7606_scale_setup_cb_t scale_setup_cb;
71
141
ad7606_sw_setup_cb_t sw_setup_cb;
72
142
const unsigned int *oversampling_avail;
-33
drivers/iio/adc/ad7606_par.c
-33
drivers/iio/adc/ad7606_par.c
···
21
21
#include "ad7606.h"
22
22
#include "ad7606_bus_iface.h"
23
23
24
-
static const struct iio_chan_spec ad7606b_bi_channels[] = {
25
-
AD7606_BI_CHANNEL(0),
26
-
AD7606_BI_CHANNEL(1),
27
-
AD7606_BI_CHANNEL(2),
28
-
AD7606_BI_CHANNEL(3),
29
-
AD7606_BI_CHANNEL(4),
30
-
AD7606_BI_CHANNEL(5),
31
-
AD7606_BI_CHANNEL(6),
32
-
AD7606_BI_CHANNEL(7),
33
-
};
34
-
35
-
static const struct iio_chan_spec ad7606b_bi_sw_channels[] = {
36
-
AD7606_BI_SW_CHANNEL(0),
37
-
AD7606_BI_SW_CHANNEL(1),
38
-
AD7606_BI_SW_CHANNEL(2),
39
-
AD7606_BI_SW_CHANNEL(3),
40
-
AD7606_BI_SW_CHANNEL(4),
41
-
AD7606_BI_SW_CHANNEL(5),
42
-
AD7606_BI_SW_CHANNEL(6),
43
-
AD7606_BI_SW_CHANNEL(7),
44
-
};
45
-
46
24
static int ad7606_par_bus_update_scan_mode(struct iio_dev *indio_dev,
47
25
const unsigned long *scan_mask)
48
26
{
···
72
94
return ret;
73
95
}
74
96
75
-
indio_dev->channels = ad7606b_bi_channels;
76
-
indio_dev->num_channels = 8;
77
-
78
97
return 0;
79
98
}
80
99
···
95
120
return pdata->bus_reg_write(st->back, addr, val);
96
121
}
97
122
98
-
static int ad7606_par_bus_sw_mode_config(struct iio_dev *indio_dev)
99
-
{
100
-
indio_dev->channels = ad7606b_bi_sw_channels;
101
-
102
-
return 0;
103
-
}
104
-
105
123
static const struct ad7606_bus_ops ad7606_bi_bops = {
106
124
.iio_backend_config = ad7606_par_bus_setup_iio_backend,
107
125
.update_scan_mode = ad7606_par_bus_update_scan_mode,
108
126
.reg_read = ad7606_par_bus_reg_read,
109
127
.reg_write = ad7606_par_bus_reg_write,
110
-
.sw_mode_config = ad7606_par_bus_sw_mode_config,
111
128
};
112
129
113
130
static int ad7606_par16_read_block(struct device *dev,
+3
-83
drivers/iio/adc/ad7606_spi.c
+3
-83
drivers/iio/adc/ad7606_spi.c
···
15
15
16
16
#define MAX_SPI_FREQ_HZ 23500000 /* VDRIVE above 4.75 V */
17
17
18
-
static const struct iio_chan_spec ad7616_sw_channels[] = {
19
-
IIO_CHAN_SOFT_TIMESTAMP(16),
20
-
AD7616_CHANNEL(0),
21
-
AD7616_CHANNEL(1),
22
-
AD7616_CHANNEL(2),
23
-
AD7616_CHANNEL(3),
24
-
AD7616_CHANNEL(4),
25
-
AD7616_CHANNEL(5),
26
-
AD7616_CHANNEL(6),
27
-
AD7616_CHANNEL(7),
28
-
AD7616_CHANNEL(8),
29
-
AD7616_CHANNEL(9),
30
-
AD7616_CHANNEL(10),
31
-
AD7616_CHANNEL(11),
32
-
AD7616_CHANNEL(12),
33
-
AD7616_CHANNEL(13),
34
-
AD7616_CHANNEL(14),
35
-
AD7616_CHANNEL(15),
36
-
};
37
-
38
-
static const struct iio_chan_spec ad7606b_sw_channels[] = {
39
-
IIO_CHAN_SOFT_TIMESTAMP(8),
40
-
AD7606_SW_CHANNEL(0, 16),
41
-
AD7606_SW_CHANNEL(1, 16),
42
-
AD7606_SW_CHANNEL(2, 16),
43
-
AD7606_SW_CHANNEL(3, 16),
44
-
AD7606_SW_CHANNEL(4, 16),
45
-
AD7606_SW_CHANNEL(5, 16),
46
-
AD7606_SW_CHANNEL(6, 16),
47
-
AD7606_SW_CHANNEL(7, 16),
48
-
};
49
-
50
-
static const struct iio_chan_spec ad7606c_18_sw_channels[] = {
51
-
IIO_CHAN_SOFT_TIMESTAMP(8),
52
-
AD7606_SW_CHANNEL(0, 18),
53
-
AD7606_SW_CHANNEL(1, 18),
54
-
AD7606_SW_CHANNEL(2, 18),
55
-
AD7606_SW_CHANNEL(3, 18),
56
-
AD7606_SW_CHANNEL(4, 18),
57
-
AD7606_SW_CHANNEL(5, 18),
58
-
AD7606_SW_CHANNEL(6, 18),
59
-
AD7606_SW_CHANNEL(7, 18),
60
-
};
61
-
62
18
static u16 ad7616_spi_rd_wr_cmd(int addr, char is_write_op)
63
19
{
64
20
/*
···
116
160
return spi_write(spi, &st->d16[0], sizeof(st->d16[0]));
117
161
}
118
162
119
-
static int ad7616_sw_mode_config(struct iio_dev *indio_dev)
120
-
{
121
-
/*
122
-
* Scale can be configured individually for each channel
123
-
* in software mode.
124
-
*/
125
-
indio_dev->channels = ad7616_sw_channels;
126
-
127
-
return 0;
128
-
}
129
-
130
163
static int ad7606b_sw_mode_config(struct iio_dev *indio_dev)
131
164
{
132
165
struct ad7606_state *st = iio_priv(indio_dev);
133
-
int ret;
134
166
135
167
/* Configure device spi to output on a single channel */
136
-
ret = st->bops->reg_write(st, AD7606_CONFIGURATION_REGISTER,
137
-
AD7606_SINGLE_DOUT);
138
-
if (ret)
139
-
return ret;
140
-
141
-
/*
142
-
* Scale can be configured individually for each channel
143
-
* in software mode.
144
-
*/
145
-
indio_dev->channels = ad7606b_sw_channels;
146
-
147
-
return 0;
148
-
}
149
-
150
-
static int ad7606c_18_sw_mode_config(struct iio_dev *indio_dev)
151
-
{
152
-
int ret;
153
-
154
-
ret = ad7606b_sw_mode_config(indio_dev);
155
-
if (ret)
156
-
return ret;
157
-
158
-
indio_dev->channels = ad7606c_18_sw_channels;
159
-
160
-
return 0;
168
+
return st->bops->reg_write(st, AD7606_CONFIGURATION_REGISTER,
169
+
AD7606_SINGLE_DOUT);
161
170
}
162
171
163
172
static const struct ad7606_bus_ops ad7606_spi_bops = {
···
142
221
.reg_read = ad7606_spi_reg_read,
143
222
.reg_write = ad7606_spi_reg_write,
144
223
.rd_wr_cmd = ad7616_spi_rd_wr_cmd,
145
-
.sw_mode_config = ad7616_sw_mode_config,
146
224
};
147
225
148
226
static const struct ad7606_bus_ops ad7606b_spi_bops = {
···
157
237
.reg_read = ad7606_spi_reg_read,
158
238
.reg_write = ad7606_spi_reg_write,
159
239
.rd_wr_cmd = ad7606b_spi_rd_wr_cmd,
160
-
.sw_mode_config = ad7606c_18_sw_mode_config,
240
+
.sw_mode_config = ad7606b_sw_mode_config,
161
241
};
162
242
163
243
static const struct ad7606_bus_info ad7605_4_bus_info = {