tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge branch 'x86/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull miscellaneous x86 fixes from Peter Anvin:
"The biggest ones are fixing suspend/resume breakage on 32 bits, and an
interrim fix for mapping over holes that allows AMD kit with more than
1 TB.

A final solution for the latter is in the works, but involves some
fairly invasive changes that will probably mean it will only be
appropriate for 3.8."

* 'x86/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86, MCE: Remove bios_cmci_threshold sysfs attribute
x86, amd, mce: Avoid NULL pointer reference on CPU northbridge lookup
x86: Exclude E820_RESERVED regions and memory holes above 4 GB from direct mapping.
x86/cache_info: Use ARRAY_SIZE() in amd_l3_attrs()
x86/reboot: Remove quirk entry for SBC FITPC
x86, suspend: Correct the restore of CR4, EFER; skip computing EFLAGS.ID

Linus Torvalds 3b641bf4 4a1f2b0f

+24 -34
+1 -1
arch/x86/kernel/cpu/intel_cacheinfo.c
··· 991 991 if (attrs) 992 992 return attrs; 993 993 994 - n = sizeof (default_attrs) / sizeof (struct attribute *); 994 + n = ARRAY_SIZE(default_attrs); 995 995 996 996 if (amd_nb_has_feature(AMD_NB_L3_INDEX_DISABLE)) 997 997 n += 2;
-6
arch/x86/kernel/cpu/mcheck/mce.c
··· 2209 2209 &mce_cmci_disabled 2210 2210 }; 2211 2211 2212 - static struct dev_ext_attribute dev_attr_bios_cmci_threshold = { 2213 - __ATTR(bios_cmci_threshold, 0444, device_show_int, NULL), 2214 - &mce_bios_cmci_threshold 2215 - }; 2216 - 2217 2212 static struct device_attribute *mce_device_attrs[] = { 2218 2213 &dev_attr_tolerant.attr, 2219 2214 &dev_attr_check_interval.attr, ··· 2217 2222 &dev_attr_dont_log_ce.attr, 2218 2223 &dev_attr_ignore_ce.attr, 2219 2224 &dev_attr_cmci_disabled.attr, 2220 - &dev_attr_bios_cmci_threshold.attr, 2221 2225 NULL 2222 2226 }; 2223 2227
+5 -5
arch/x86/kernel/cpu/mcheck/mce_amd.c
··· 576 576 int err = 0; 577 577 578 578 if (shared_bank[bank]) { 579 - 580 579 nb = node_to_amd_nb(amd_get_nb_id(cpu)); 581 - WARN_ON(!nb); 582 580 583 581 /* threshold descriptor already initialized on this node? */ 584 - if (nb->bank4) { 582 + if (nb && nb->bank4) { 585 583 /* yes, use it */ 586 584 b = nb->bank4; 587 585 err = kobject_add(b->kobj, &dev->kobj, name); ··· 613 615 atomic_set(&b->cpus, 1); 614 616 615 617 /* nb is already initialized, see above */ 616 - WARN_ON(nb->bank4); 617 - nb->bank4 = b; 618 + if (nb) { 619 + WARN_ON(nb->bank4); 620 + nb->bank4 = b; 621 + } 618 622 } 619 623 620 624 err = allocate_threshold_blocks(cpu, bank, 0,
-8
arch/x86/kernel/reboot.c
··· 358 358 DMI_MATCH(DMI_PRODUCT_NAME, "VGN-Z540N"), 359 359 }, 360 360 }, 361 - { /* Handle problems with rebooting on CompuLab SBC-FITPC2 */ 362 - .callback = set_bios_reboot, 363 - .ident = "CompuLab SBC-FITPC2", 364 - .matches = { 365 - DMI_MATCH(DMI_SYS_VENDOR, "CompuLab"), 366 - DMI_MATCH(DMI_PRODUCT_NAME, "SBC-FITPC2"), 367 - }, 368 - }, 369 361 { /* Handle problems with rebooting on ASUS P4S800 */ 370 362 .callback = set_bios_reboot, 371 363 .ident = "ASUS P4S800",
+15 -2
arch/x86/kernel/setup.c
··· 920 920 921 921 #ifdef CONFIG_X86_64 922 922 if (max_pfn > max_low_pfn) { 923 - max_pfn_mapped = init_memory_mapping(1UL<<32, 924 - max_pfn<<PAGE_SHIFT); 923 + int i; 924 + for (i = 0; i < e820.nr_map; i++) { 925 + struct e820entry *ei = &e820.map[i]; 926 + 927 + if (ei->addr + ei->size <= 1UL << 32) 928 + continue; 929 + 930 + if (ei->type == E820_RESERVED) 931 + continue; 932 + 933 + max_pfn_mapped = init_memory_mapping( 934 + ei->addr < 1UL << 32 ? 1UL << 32 : ei->addr, 935 + ei->addr + ei->size); 936 + } 937 + 925 938 /* can we preseve max_low_pfn ?*/ 926 939 max_low_pfn = max_pfn; 927 940 }
+3 -12
arch/x86/realmode/rm/wakeup_asm.S
··· 74 74 75 75 lidtl wakeup_idt 76 76 77 - /* Clear the EFLAGS but remember if we have EFLAGS.ID */ 78 - movl $X86_EFLAGS_ID, %ecx 79 - pushl %ecx 80 - popfl 81 - pushfl 82 - popl %edi 77 + /* Clear the EFLAGS */ 83 78 pushl $0 84 79 popfl 85 - pushfl 86 - popl %edx 87 - xorl %edx, %edi 88 - andl %ecx, %edi /* %edi is zero iff CPUID & %cr4 are missing */ 89 80 90 81 /* Check header signature... */ 91 82 movl signature, %eax ··· 111 120 movl %eax, %cr3 112 121 113 122 btl $WAKEUP_BEHAVIOR_RESTORE_CR4, %edi 114 - jz 1f 123 + jnc 1f 115 124 movl pmode_cr4, %eax 116 125 movl %eax, %cr4 117 126 1: 118 127 btl $WAKEUP_BEHAVIOR_RESTORE_EFER, %edi 119 - jz 1f 128 + jnc 1f 120 129 movl pmode_efer, %eax 121 130 movl pmode_efer + 4, %edx 122 131 movl $MSR_EFER, %ecx