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drm/amd/pm: drop unnecessary gfxoff controls

Those gfxoff controls added for some specific ASICs are unnecessary.
The functionalities are not affected without them. Also to align with
other ASICs, they should also be dropped.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Evan Quan and committed by
Alex Deucher
3bce90bf 837d542a

+1 -42
-4
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
··· 1542 1542 struct amdgpu_device *adev = smu->adev; 1543 1543 int ret; 1544 1544 1545 - amdgpu_gfx_off_ctrl(smu->adev, false); 1546 - 1547 1545 ret = smu_hw_fini(adev); 1548 1546 if (ret) 1549 1547 return ret; ··· 1553 1555 ret = smu_late_init(adev); 1554 1556 if (ret) 1555 1557 return ret; 1556 - 1557 - amdgpu_gfx_off_ctrl(smu->adev, true); 1558 1558 1559 1559 return 0; 1560 1560 }
+1 -24
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
··· 1036 1036 if (ret) 1037 1037 goto print_clk_out; 1038 1038 1039 - /* no need to disable gfxoff when retrieving the current gfxclk */ 1040 - if ((clk_type == SMU_GFXCLK) || (clk_type == SMU_SCLK)) 1041 - amdgpu_gfx_off_ctrl(adev, false); 1042 - 1043 1039 ret = smu_v11_0_get_dpm_level_count(smu, clk_type, &count); 1044 1040 if (ret) 1045 1041 goto print_clk_out; ··· 1164 1168 } 1165 1169 1166 1170 print_clk_out: 1167 - if ((clk_type == SMU_GFXCLK) || (clk_type == SMU_SCLK)) 1168 - amdgpu_gfx_off_ctrl(adev, true); 1169 - 1170 1171 return size; 1171 1172 } 1172 1173 1173 1174 static int sienna_cichlid_force_clk_levels(struct smu_context *smu, 1174 1175 enum smu_clk_type clk_type, uint32_t mask) 1175 1176 { 1176 - struct amdgpu_device *adev = smu->adev; 1177 1177 int ret = 0; 1178 1178 uint32_t soft_min_level = 0, soft_max_level = 0, min_freq = 0, max_freq = 0; 1179 1179 1180 1180 soft_min_level = mask ? (ffs(mask) - 1) : 0; 1181 1181 soft_max_level = mask ? (fls(mask) - 1) : 0; 1182 - 1183 - if ((clk_type == SMU_GFXCLK) || (clk_type == SMU_SCLK)) 1184 - amdgpu_gfx_off_ctrl(adev, false); 1185 1182 1186 1183 switch (clk_type) { 1187 1184 case SMU_GFXCLK: ··· 1209 1220 } 1210 1221 1211 1222 forec_level_out: 1212 - if ((clk_type == SMU_GFXCLK) || (clk_type == SMU_SCLK)) 1213 - amdgpu_gfx_off_ctrl(adev, true); 1214 - 1215 1223 return 0; 1216 1224 } 1217 1225 ··· 1851 1865 enum smu_clk_type clk_type, 1852 1866 uint32_t *min, uint32_t *max) 1853 1867 { 1854 - struct amdgpu_device *adev = smu->adev; 1855 - int ret; 1856 - 1857 - if (clk_type == SMU_GFXCLK) 1858 - amdgpu_gfx_off_ctrl(adev, false); 1859 - ret = smu_v11_0_get_dpm_ultimate_freq(smu, clk_type, min, max); 1860 - if (clk_type == SMU_GFXCLK) 1861 - amdgpu_gfx_off_ctrl(adev, true); 1862 - 1863 - return ret; 1868 + return smu_v11_0_get_dpm_ultimate_freq(smu, clk_type, min, max); 1864 1869 } 1865 1870 1866 1871 static void sienna_cichlid_dump_od_table(struct smu_context *smu,
-7
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
··· 1798 1798 uint32_t min, 1799 1799 uint32_t max) 1800 1800 { 1801 - struct amdgpu_device *adev = smu->adev; 1802 1801 int ret = 0, clk_id = 0; 1803 1802 uint32_t param; 1804 1803 ··· 1809 1810 clk_type); 1810 1811 if (clk_id < 0) 1811 1812 return clk_id; 1812 - 1813 - if (clk_type == SMU_GFXCLK) 1814 - amdgpu_gfx_off_ctrl(adev, false); 1815 1813 1816 1814 if (max > 0) { 1817 1815 param = (uint32_t)((clk_id << 16) | (max & 0xffff)); ··· 1827 1831 } 1828 1832 1829 1833 out: 1830 - if (clk_type == SMU_GFXCLK) 1831 - amdgpu_gfx_off_ctrl(adev, true); 1832 - 1833 1834 return ret; 1834 1835 } 1835 1836
-7
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
··· 1533 1533 uint32_t min, 1534 1534 uint32_t max) 1535 1535 { 1536 - struct amdgpu_device *adev = smu->adev; 1537 1536 int ret = 0, clk_id = 0; 1538 1537 uint32_t param; 1539 1538 ··· 1544 1545 clk_type); 1545 1546 if (clk_id < 0) 1546 1547 return clk_id; 1547 - 1548 - if (clk_type == SMU_GFXCLK) 1549 - amdgpu_gfx_off_ctrl(adev, false); 1550 1548 1551 1549 if (max > 0) { 1552 1550 param = (uint32_t)((clk_id << 16) | (max & 0xffff)); ··· 1562 1566 } 1563 1567 1564 1568 out: 1565 - if (clk_type == SMU_GFXCLK) 1566 - amdgpu_gfx_off_ctrl(adev, true); 1567 - 1568 1569 return ret; 1569 1570 } 1570 1571