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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
Merge branch 'mlx5-hardware-steering-part-2'
Tariq Toukan says:
====================
mlx5 Hardware Steering part 2
This series contain HWS code cleanups, enhancements, bug fixes, and
additions. Note that some of these patches are fixing bugs in existing
code, but we submit them without 'Fixes' tag to avoid the unnecessary
burden for stable releases, as HWS still couldn't be enabled.
Patches 1-5:
HWS, various code cleanups and enhancements
Patches 6-14:
HWS, various bug fixes and additions
Patch 15:
HWS, setting timeout on polling
====================
Link: https://patch.msgid.link/20250102181415.1477316-1-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+226
-298
+102
-57
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.c
+102
-57
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.c
···
11
11
/* This is the longest supported action sequence for FDB table:
12
12
* DECAP, POP_VLAN, MODIFY, CTR, ASO, PUSH_VLAN, MODIFY, ENCAP, Term.
13
13
*/
14
-
static const u32 action_order_arr[MLX5HWS_TABLE_TYPE_MAX][MLX5HWS_ACTION_TYP_MAX] = {
15
-
[MLX5HWS_TABLE_TYPE_FDB] = {
16
-
BIT(MLX5HWS_ACTION_TYP_REMOVE_HEADER) |
17
-
BIT(MLX5HWS_ACTION_TYP_REFORMAT_TNL_L2_TO_L2) |
18
-
BIT(MLX5HWS_ACTION_TYP_REFORMAT_TNL_L3_TO_L2),
19
-
BIT(MLX5HWS_ACTION_TYP_POP_VLAN),
20
-
BIT(MLX5HWS_ACTION_TYP_POP_VLAN),
21
-
BIT(MLX5HWS_ACTION_TYP_MODIFY_HDR),
22
-
BIT(MLX5HWS_ACTION_TYP_PUSH_VLAN),
23
-
BIT(MLX5HWS_ACTION_TYP_PUSH_VLAN),
24
-
BIT(MLX5HWS_ACTION_TYP_INSERT_HEADER) |
25
-
BIT(MLX5HWS_ACTION_TYP_REFORMAT_L2_TO_TNL_L2) |
26
-
BIT(MLX5HWS_ACTION_TYP_REFORMAT_L2_TO_TNL_L3),
27
-
BIT(MLX5HWS_ACTION_TYP_CTR),
28
-
BIT(MLX5HWS_ACTION_TYP_TAG),
29
-
BIT(MLX5HWS_ACTION_TYP_ASO_METER),
30
-
BIT(MLX5HWS_ACTION_TYP_MODIFY_HDR),
31
-
BIT(MLX5HWS_ACTION_TYP_TBL) |
32
-
BIT(MLX5HWS_ACTION_TYP_VPORT) |
33
-
BIT(MLX5HWS_ACTION_TYP_DROP) |
34
-
BIT(MLX5HWS_ACTION_TYP_SAMPLER) |
35
-
BIT(MLX5HWS_ACTION_TYP_RANGE) |
36
-
BIT(MLX5HWS_ACTION_TYP_DEST_ARRAY),
37
-
BIT(MLX5HWS_ACTION_TYP_LAST),
38
-
},
14
+
static const u32 action_order_arr[MLX5HWS_ACTION_TYP_MAX] = {
15
+
BIT(MLX5HWS_ACTION_TYP_REMOVE_HEADER) |
16
+
BIT(MLX5HWS_ACTION_TYP_REFORMAT_TNL_L2_TO_L2) |
17
+
BIT(MLX5HWS_ACTION_TYP_REFORMAT_TNL_L3_TO_L2),
18
+
BIT(MLX5HWS_ACTION_TYP_POP_VLAN),
19
+
BIT(MLX5HWS_ACTION_TYP_POP_VLAN),
20
+
BIT(MLX5HWS_ACTION_TYP_MODIFY_HDR),
21
+
BIT(MLX5HWS_ACTION_TYP_PUSH_VLAN),
22
+
BIT(MLX5HWS_ACTION_TYP_PUSH_VLAN),
23
+
BIT(MLX5HWS_ACTION_TYP_INSERT_HEADER) |
24
+
BIT(MLX5HWS_ACTION_TYP_REFORMAT_L2_TO_TNL_L2) |
25
+
BIT(MLX5HWS_ACTION_TYP_REFORMAT_L2_TO_TNL_L3),
26
+
BIT(MLX5HWS_ACTION_TYP_CTR),
27
+
BIT(MLX5HWS_ACTION_TYP_TAG),
28
+
BIT(MLX5HWS_ACTION_TYP_ASO_METER),
29
+
BIT(MLX5HWS_ACTION_TYP_MODIFY_HDR),
30
+
BIT(MLX5HWS_ACTION_TYP_TBL) |
31
+
BIT(MLX5HWS_ACTION_TYP_VPORT) |
32
+
BIT(MLX5HWS_ACTION_TYP_DROP) |
33
+
BIT(MLX5HWS_ACTION_TYP_SAMPLER) |
34
+
BIT(MLX5HWS_ACTION_TYP_RANGE) |
35
+
BIT(MLX5HWS_ACTION_TYP_DEST_ARRAY),
36
+
BIT(MLX5HWS_ACTION_TYP_LAST),
39
37
};
40
38
41
39
static const char * const mlx5hws_action_type_str[] = {
···
81
83
int ret;
82
84
83
85
mutex_lock(&ctx->ctrl_lock);
84
-
if (ctx->common_res[tbl_type].shared_stc[stc_type]) {
85
-
ctx->common_res[tbl_type].shared_stc[stc_type]->refcount++;
86
+
if (ctx->common_res.shared_stc[stc_type]) {
87
+
ctx->common_res.shared_stc[stc_type]->refcount++;
86
88
mutex_unlock(&ctx->ctrl_lock);
87
89
return 0;
88
90
}
···
122
124
goto free_shared_stc;
123
125
}
124
126
125
-
ctx->common_res[tbl_type].shared_stc[stc_type] = shared_stc;
126
-
ctx->common_res[tbl_type].shared_stc[stc_type]->refcount = 1;
127
+
ctx->common_res.shared_stc[stc_type] = shared_stc;
128
+
ctx->common_res.shared_stc[stc_type]->refcount = 1;
127
129
128
130
mutex_unlock(&ctx->ctrl_lock);
129
131
···
176
178
}
177
179
178
180
mutex_lock(&ctx->ctrl_lock);
179
-
if (--ctx->common_res[tbl_type].shared_stc[stc_type]->refcount) {
181
+
if (--ctx->common_res.shared_stc[stc_type]->refcount) {
180
182
mutex_unlock(&ctx->ctrl_lock);
181
183
return;
182
184
}
183
185
184
-
shared_stc = ctx->common_res[tbl_type].shared_stc[stc_type];
186
+
shared_stc = ctx->common_res.shared_stc[stc_type];
185
187
186
188
mlx5hws_action_free_single_stc(ctx, tbl_type, &shared_stc->stc_chunk);
187
189
kfree(shared_stc);
188
-
ctx->common_res[tbl_type].shared_stc[stc_type] = NULL;
190
+
ctx->common_res.shared_stc[stc_type] = NULL;
189
191
mutex_unlock(&ctx->ctrl_lock);
190
192
}
191
193
···
204
206
enum mlx5hws_action_type *user_actions,
205
207
enum mlx5hws_table_type table_type)
206
208
{
207
-
const u32 *order_arr = action_order_arr[table_type];
209
+
const u32 *order_arr = action_order_arr;
210
+
bool valid_combo;
208
211
u8 order_idx = 0;
209
212
u8 user_idx = 0;
210
-
bool valid_combo;
211
213
212
214
if (table_type >= MLX5HWS_TABLE_TYPE_MAX) {
213
215
mlx5hws_err(ctx, "Invalid table_type %d", table_type);
···
319
321
__must_hold(&ctx->ctrl_lock)
320
322
{
321
323
struct mlx5hws_cmd_stc_modify_attr cleanup_stc_attr = {0};
322
-
struct mlx5hws_pool *stc_pool = ctx->stc_pool[table_type];
323
324
struct mlx5hws_cmd_stc_modify_attr fixup_stc_attr = {0};
325
+
struct mlx5hws_pool *stc_pool = ctx->stc_pool;
324
326
bool use_fixup;
325
327
u32 obj_0_id;
326
328
int ret;
···
385
387
struct mlx5hws_pool_chunk *stc)
386
388
__must_hold(&ctx->ctrl_lock)
387
389
{
388
-
struct mlx5hws_pool *stc_pool = ctx->stc_pool[table_type];
389
390
struct mlx5hws_cmd_stc_modify_attr stc_attr = {0};
391
+
struct mlx5hws_pool *stc_pool = ctx->stc_pool;
390
392
u32 obj_id;
391
393
392
394
/* Modify the STC not to point to an object */
···
471
473
break;
472
474
case MLX5HWS_ACTION_TYP_TBL:
473
475
case MLX5HWS_ACTION_TYP_DEST_ARRAY:
476
+
case MLX5HWS_ACTION_TYP_SAMPLER:
474
477
attr->action_type = MLX5_IFC_STC_ACTION_TYPE_JUMP_TO_FT;
475
478
attr->action_offset = MLX5HWS_ACTION_OFFSET_HIT;
476
479
attr->dest_table_id = obj_id;
···
560
561
if (action->flags & MLX5HWS_ACTION_FLAG_HWS_FDB) {
561
562
ret = mlx5hws_action_alloc_single_stc(ctx, &stc_attr,
562
563
MLX5HWS_TABLE_TYPE_FDB,
563
-
&action->stc[MLX5HWS_TABLE_TYPE_FDB]);
564
+
&action->stc);
564
565
if (ret)
565
566
goto out_err;
566
567
}
···
584
585
585
586
if (action->flags & MLX5HWS_ACTION_FLAG_HWS_FDB)
586
587
mlx5hws_action_free_single_stc(ctx, MLX5HWS_TABLE_TYPE_FDB,
587
-
&action->stc[MLX5HWS_TABLE_TYPE_FDB]);
588
+
&action->stc);
588
589
589
590
mutex_unlock(&ctx->ctrl_lock);
590
591
}
···
1638
1639
rtc_attr.table_type = mlx5hws_table_get_res_fw_ft_type(MLX5HWS_TABLE_TYPE_FDB, false);
1639
1640
1640
1641
/* STC is a single resource (obj_id), use any STC for the ID */
1641
-
stc_pool = ctx->stc_pool[MLX5HWS_TABLE_TYPE_FDB];
1642
-
default_stc = ctx->common_res[MLX5HWS_TABLE_TYPE_FDB].default_stc;
1642
+
stc_pool = ctx->stc_pool;
1643
+
default_stc = ctx->common_res.default_stc;
1643
1644
obj_id = mlx5hws_pool_chunk_get_base_id(stc_pool, &default_stc->default_hit);
1644
1645
rtc_attr.stc_base = obj_id;
1645
1646
···
1730
1731
ste_attr.used_id_rtc_0 = &used_rtc_0_id;
1731
1732
ste_attr.used_id_rtc_1 = &used_rtc_1_id;
1732
1733
1733
-
common_res = &ctx->common_res[MLX5HWS_TABLE_TYPE_FDB];
1734
+
common_res = &ctx->common_res;
1734
1735
1735
1736
/* init an empty match STE which will always hit */
1736
1737
ste_attr.wqe_ctrl = &wqe_ctrl;
···
1749
1750
wqe_ctrl.stc_ix[MLX5HWS_ACTION_STC_IDX_CTRL] |=
1750
1751
htonl(MLX5HWS_ACTION_STC_IDX_LAST_COMBO2 << 29);
1751
1752
wqe_ctrl.stc_ix[MLX5HWS_ACTION_STC_IDX_HIT] =
1752
-
htonl(hit_ft_action->stc[MLX5HWS_TABLE_TYPE_FDB].offset);
1753
+
htonl(hit_ft_action->stc.offset);
1753
1754
1754
1755
wqe_data_arr = (__force __be32 *)&range_wqe_data;
1755
1756
···
1842
1843
stc_attr.ste_table.match_definer_id = ctx->caps->trivial_match_definer;
1843
1844
1844
1845
ret = mlx5hws_action_alloc_single_stc(ctx, &stc_attr, MLX5HWS_TABLE_TYPE_FDB,
1845
-
&action->stc[MLX5HWS_TABLE_TYPE_FDB]);
1846
+
&action->stc);
1846
1847
if (ret)
1847
1848
goto error_unlock;
1848
1849
···
1874
1875
mlx5hws_action_create_flow_sampler(struct mlx5hws_context *ctx,
1875
1876
u32 sampler_id, u32 flags)
1876
1877
{
1877
-
mlx5hws_err(ctx, "Flow sampler action - unsupported\n");
1878
+
struct mlx5hws_cmd_ft_create_attr ft_attr = {0};
1879
+
struct mlx5hws_cmd_set_fte_attr fte_attr = {0};
1880
+
struct mlx5hws_cmd_forward_tbl *fw_island;
1881
+
struct mlx5hws_cmd_set_fte_dest dest;
1882
+
struct mlx5hws_action *action;
1883
+
int ret;
1884
+
1885
+
if (flags != (MLX5HWS_ACTION_FLAG_HWS_FDB | MLX5HWS_ACTION_FLAG_SHARED)) {
1886
+
mlx5hws_err(ctx, "Unsupported flags for flow sampler\n");
1887
+
return NULL;
1888
+
}
1889
+
1890
+
ft_attr.type = FS_FT_FDB;
1891
+
ft_attr.level = ctx->caps->fdb_ft.max_level - 1;
1892
+
1893
+
dest.destination_type = MLX5_FLOW_DESTINATION_TYPE_FLOW_SAMPLER;
1894
+
dest.destination_id = sampler_id;
1895
+
1896
+
fte_attr.dests_num = 1;
1897
+
fte_attr.dests = &dest;
1898
+
fte_attr.action_flags = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
1899
+
fte_attr.ignore_flow_level = 1;
1900
+
1901
+
fw_island = mlx5hws_cmd_forward_tbl_create(ctx->mdev, &ft_attr, &fte_attr);
1902
+
if (!fw_island)
1903
+
return NULL;
1904
+
1905
+
action = hws_action_create_generic(ctx, flags,
1906
+
MLX5HWS_ACTION_TYP_SAMPLER);
1907
+
if (!action)
1908
+
goto destroy_fw_island;
1909
+
1910
+
ret = hws_action_create_stcs(action, fw_island->ft_id);
1911
+
if (ret)
1912
+
goto free_action;
1913
+
1914
+
action->flow_sampler.fw_island = fw_island;
1915
+
1916
+
return action;
1917
+
1918
+
free_action:
1919
+
kfree(action);
1920
+
destroy_fw_island:
1921
+
mlx5hws_cmd_forward_tbl_destroy(ctx->mdev, fw_island);
1878
1922
return NULL;
1879
1923
}
1880
1924
···
1955
1913
ext_reformat_id);
1956
1914
}
1957
1915
kfree(action->dest_array.dest_list);
1916
+
break;
1917
+
case MLX5HWS_ACTION_TYP_SAMPLER:
1918
+
hws_action_destroy_stcs(action);
1919
+
mlx5hws_cmd_forward_tbl_destroy(action->ctx->mdev,
1920
+
action->flow_sampler.fw_island);
1958
1921
break;
1959
1922
case MLX5HWS_ACTION_TYP_REFORMAT_TNL_L3_TO_L2:
1960
1923
case MLX5HWS_ACTION_TYP_MODIFY_HDR:
···
2017
1970
struct mlx5hws_action_default_stc *default_stc;
2018
1971
int ret;
2019
1972
2020
-
if (ctx->common_res[tbl_type].default_stc) {
2021
-
ctx->common_res[tbl_type].default_stc->refcount++;
1973
+
if (ctx->common_res.default_stc) {
1974
+
ctx->common_res.default_stc->refcount++;
2022
1975
return 0;
2023
1976
}
2024
1977
···
2070
2023
goto free_nop_dw7;
2071
2024
}
2072
2025
2073
-
ctx->common_res[tbl_type].default_stc = default_stc;
2074
-
ctx->common_res[tbl_type].default_stc->refcount++;
2026
+
ctx->common_res.default_stc = default_stc;
2027
+
ctx->common_res.default_stc->refcount++;
2075
2028
2076
2029
return 0;
2077
2030
···
2093
2046
{
2094
2047
struct mlx5hws_action_default_stc *default_stc;
2095
2048
2096
-
default_stc = ctx->common_res[tbl_type].default_stc;
2097
-
2098
-
default_stc = ctx->common_res[tbl_type].default_stc;
2049
+
default_stc = ctx->common_res.default_stc;
2099
2050
if (--default_stc->refcount)
2100
2051
return;
2101
2052
···
2103
2058
mlx5hws_action_free_single_stc(ctx, tbl_type, &default_stc->nop_dw5);
2104
2059
mlx5hws_action_free_single_stc(ctx, tbl_type, &default_stc->nop_ctr);
2105
2060
kfree(default_stc);
2106
-
ctx->common_res[tbl_type].default_stc = NULL;
2061
+
ctx->common_res.default_stc = NULL;
2107
2062
}
2108
2063
2109
2064
static void hws_action_modify_write(struct mlx5hws_send_engine *queue,
···
2195
2150
{
2196
2151
struct mlx5hws_action *action = apply->rule_action[action_idx].action;
2197
2152
2198
-
apply->wqe_ctrl->stc_ix[stc_idx] =
2199
-
htonl(action->stc[apply->tbl_type].offset);
2153
+
apply->wqe_ctrl->stc_ix[stc_idx] = htonl(action->stc.offset);
2200
2154
}
2201
2155
2202
2156
static void
···
2225
2181
rule_action = &apply->rule_action[setter->idx_double];
2226
2182
action = rule_action->action;
2227
2183
2228
-
stc_idx = htonl(action->stc[apply->tbl_type].offset);
2184
+
stc_idx = htonl(action->stc.offset);
2229
2185
apply->wqe_ctrl->stc_ix[MLX5HWS_ACTION_STC_IDX_DW6] = stc_idx;
2230
2186
apply->wqe_ctrl->stc_ix[MLX5HWS_ACTION_STC_IDX_DW7] = 0;
2231
2187
···
2284
2240
apply->wqe_data[MLX5HWS_ACTION_OFFSET_DW6] = 0;
2285
2241
apply->wqe_data[MLX5HWS_ACTION_OFFSET_DW7] = htonl(arg_idx);
2286
2242
2287
-
stc_idx = htonl(action->stc[apply->tbl_type].offset);
2243
+
stc_idx = htonl(action->stc.offset);
2288
2244
apply->wqe_ctrl->stc_ix[MLX5HWS_ACTION_STC_IDX_DW6] = stc_idx;
2289
2245
apply->wqe_ctrl->stc_ix[MLX5HWS_ACTION_STC_IDX_DW7] = 0;
2290
2246
···
2316
2272
apply->wqe_data[MLX5HWS_ACTION_OFFSET_DW6] = 0;
2317
2273
apply->wqe_data[MLX5HWS_ACTION_OFFSET_DW7] = htonl(arg_idx);
2318
2274
2319
-
stc_idx = htonl(action->stc[apply->tbl_type].offset);
2275
+
stc_idx = htonl(action->stc.offset);
2320
2276
apply->wqe_ctrl->stc_ix[MLX5HWS_ACTION_STC_IDX_DW6] = stc_idx;
2321
2277
apply->wqe_ctrl->stc_ix[MLX5HWS_ACTION_STC_IDX_DW7] = 0;
2322
2278
···
2478
2434
case MLX5HWS_ACTION_TYP_DROP:
2479
2435
case MLX5HWS_ACTION_TYP_TBL:
2480
2436
case MLX5HWS_ACTION_TYP_DEST_ARRAY:
2437
+
case MLX5HWS_ACTION_TYP_SAMPLER:
2481
2438
case MLX5HWS_ACTION_TYP_VPORT:
2482
2439
case MLX5HWS_ACTION_TYP_MISS:
2483
2440
/* Hit action */
+6
-3
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.h
+6
-3
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.h
···
70
70
struct mlx5hws_pool_chunk nop_dw6;
71
71
struct mlx5hws_pool_chunk nop_dw7;
72
72
struct mlx5hws_pool_chunk default_hit;
73
-
u32 refcount;
73
+
u32 refcount; /* protected by context ctrl lock */
74
74
};
75
75
76
76
struct mlx5hws_action_shared_stc {
77
77
struct mlx5hws_pool_chunk stc_chunk;
78
-
u32 refcount;
78
+
u32 refcount; /* protected by context ctrl lock */
79
79
};
80
80
81
81
struct mlx5hws_actions_apply_data {
···
124
124
struct mlx5hws_context *ctx;
125
125
union {
126
126
struct {
127
-
struct mlx5hws_pool_chunk stc[MLX5HWS_TABLE_TYPE_MAX];
127
+
struct mlx5hws_pool_chunk stc;
128
128
union {
129
129
struct {
130
130
u32 pat_id;
···
165
165
size_t num_dest;
166
166
struct mlx5hws_cmd_set_fte_dest *dest_list;
167
167
} dest_array;
168
+
struct {
169
+
struct mlx5hws_cmd_forward_tbl *fw_island;
170
+
} flow_sampler;
168
171
struct {
169
172
u8 type;
170
173
u8 start_anchor;
+35
-17
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.c
+35
-17
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.c
···
152
152
if (!bwc_matcher)
153
153
return NULL;
154
154
155
+
atomic_set(&bwc_matcher->num_of_rules, 0);
156
+
155
157
/* Check if the required match params can be all matched
156
158
* in single STE, otherwise complex matcher is needed.
157
159
*/
···
201
199
202
200
int mlx5hws_bwc_matcher_destroy(struct mlx5hws_bwc_matcher *bwc_matcher)
203
201
{
204
-
if (bwc_matcher->num_of_rules)
202
+
u32 num_of_rules = atomic_read(&bwc_matcher->num_of_rules);
203
+
204
+
if (num_of_rules)
205
205
mlx5hws_err(bwc_matcher->matcher->tbl->ctx,
206
206
"BWC matcher destroy: matcher still has %d rules\n",
207
-
bwc_matcher->num_of_rules);
207
+
num_of_rules);
208
208
209
209
mlx5hws_bwc_matcher_destroy_simple(bwc_matcher);
210
210
···
219
215
u32 *pending_rules,
220
216
bool drain)
221
217
{
218
+
unsigned long timeout = jiffies +
219
+
msecs_to_jiffies(MLX5HWS_BWC_POLLING_TIMEOUT * MSEC_PER_SEC);
222
220
struct mlx5hws_flow_op_result comp[MLX5HWS_BWC_MATCHER_REHASH_BURST_TH];
223
221
u16 burst_th = hws_bwc_get_burst_th(ctx, queue_id);
224
222
bool got_comp = *pending_rules >= burst_th;
···
256
250
}
257
251
258
252
got_comp = !!ret;
253
+
254
+
if (unlikely(!got_comp && time_after(jiffies, timeout))) {
255
+
mlx5hws_err(ctx, "BWC poll error: polling queue %d - TIMEOUT\n", queue_id);
256
+
return -ETIMEDOUT;
257
+
}
259
258
}
260
259
261
260
return err;
···
320
309
{
321
310
struct mlx5hws_bwc_matcher *bwc_matcher = bwc_rule->bwc_matcher;
322
311
323
-
bwc_matcher->num_of_rules++;
312
+
atomic_inc(&bwc_matcher->num_of_rules);
324
313
bwc_rule->bwc_queue_idx = idx;
325
314
list_add(&bwc_rule->list_node, &bwc_matcher->rules[idx]);
326
315
}
···
329
318
{
330
319
struct mlx5hws_bwc_matcher *bwc_matcher = bwc_rule->bwc_matcher;
331
320
332
-
bwc_matcher->num_of_rules--;
321
+
atomic_dec(&bwc_matcher->num_of_rules);
333
322
list_del_init(&bwc_rule->list_node);
334
323
}
335
324
···
345
334
struct mlx5hws_rule_attr *rule_attr)
346
335
{
347
336
struct mlx5hws_context *ctx = bwc_rule->bwc_matcher->matcher->tbl->ctx;
348
-
struct mlx5hws_flow_op_result completion;
337
+
u32 expected_completions = 1;
349
338
int ret;
350
339
351
340
ret = hws_bwc_rule_destroy_hws_async(bwc_rule, rule_attr);
352
341
if (unlikely(ret))
353
342
return ret;
354
343
355
-
do {
356
-
ret = mlx5hws_send_queue_poll(ctx, rule_attr->queue_id, &completion, 1);
357
-
} while (ret != 1);
344
+
ret = hws_bwc_queue_poll(ctx, rule_attr->queue_id, &expected_completions, true);
345
+
if (unlikely(ret))
346
+
return ret;
358
347
359
-
if (unlikely(completion.status != MLX5HWS_FLOW_OP_SUCCESS ||
360
-
(bwc_rule->rule->status != MLX5HWS_RULE_STATUS_DELETED &&
361
-
bwc_rule->rule->status != MLX5HWS_RULE_STATUS_DELETING))) {
362
-
mlx5hws_err(ctx, "Failed destroying BWC rule: completion %d, rule status %d\n",
363
-
completion.status, bwc_rule->rule->status);
348
+
if (unlikely(bwc_rule->rule->status != MLX5HWS_RULE_STATUS_DELETED &&
349
+
bwc_rule->rule->status != MLX5HWS_RULE_STATUS_DELETING)) {
350
+
mlx5hws_err(ctx, "Failed destroying BWC rule: rule status %d\n",
351
+
bwc_rule->rule->status);
364
352
return -EINVAL;
365
353
}
366
354
···
625
615
626
616
ret = hws_bwc_queue_poll(ctx, rule_attr.queue_id,
627
617
&pending_rules[i], false);
628
-
if (unlikely(ret))
618
+
if (unlikely(ret)) {
619
+
mlx5hws_err(ctx,
620
+
"Moving BWC rule failed during rehash (%d)\n",
621
+
ret);
629
622
goto free_bwc_rules;
623
+
}
630
624
}
631
625
}
632
626
} while (!all_done);
···
643
629
mlx5hws_send_engine_flush_queue(&ctx->send_queue[queue_id]);
644
630
ret = hws_bwc_queue_poll(ctx, queue_id,
645
631
&pending_rules[i], true);
646
-
if (unlikely(ret))
632
+
if (unlikely(ret)) {
633
+
mlx5hws_err(ctx,
634
+
"Moving BWC rule failed during rehash (%d)\n", ret);
647
635
goto free_bwc_rules;
636
+
}
648
637
}
649
638
}
650
639
···
721
704
* Need to check again if we really need rehash.
722
705
* If the reason for rehash was size, but not any more - skip rehash.
723
706
*/
724
-
if (!hws_bwc_matcher_rehash_size_needed(bwc_matcher, bwc_matcher->num_of_rules))
707
+
if (!hws_bwc_matcher_rehash_size_needed(bwc_matcher,
708
+
atomic_read(&bwc_matcher->num_of_rules)))
725
709
return 0;
726
710
727
711
/* Now we're done all the checking - do the rehash:
···
815
797
}
816
798
817
799
/* check if number of rules require rehash */
818
-
num_of_rules = bwc_matcher->num_of_rules;
800
+
num_of_rules = atomic_read(&bwc_matcher->num_of_rules);
819
801
820
802
if (unlikely(hws_bwc_matcher_rehash_size_needed(bwc_matcher, num_of_rules))) {
821
803
mutex_unlock(queue_lock);
+10
-2
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.h
+10
-2
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.h
···
8
8
#define MLX5HWS_BWC_MATCHER_SIZE_LOG_STEP 1
9
9
#define MLX5HWS_BWC_MATCHER_REHASH_PERCENT_TH 70
10
10
#define MLX5HWS_BWC_MATCHER_REHASH_BURST_TH 32
11
-
#define MLX5HWS_BWC_MATCHER_ATTACH_AT_NUM 255
11
+
12
+
/* Max number of AT attach operations for the same matcher.
13
+
* When the limit is reached, next attempt to attach new AT
14
+
* will result in creation of a new matcher and moving all
15
+
* the rules to this matcher.
16
+
*/
17
+
#define MLX5HWS_BWC_MATCHER_ATTACH_AT_NUM 8
12
18
13
19
#define MLX5HWS_BWC_MAX_ACTS 16
20
+
21
+
#define MLX5HWS_BWC_POLLING_TIMEOUT 60
14
22
15
23
struct mlx5hws_bwc_matcher {
16
24
struct mlx5hws_matcher *matcher;
···
27
19
u8 num_of_at;
28
20
u16 priority;
29
21
u8 size_log;
30
-
u32 num_of_rules; /* atomically accessed */
22
+
atomic_t num_of_rules;
31
23
struct list_head *rules;
32
24
};
33
25
+17
-78
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.c
+17
-78
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.c
···
257
257
dest->ext_reformat_id);
258
258
}
259
259
break;
260
+
case MLX5_FLOW_DESTINATION_TYPE_FLOW_SAMPLER:
261
+
MLX5_SET(dest_format, in_dests,
262
+
destination_type, ifc_dest_type);
263
+
MLX5_SET(dest_format, in_dests, destination_id,
264
+
dest->destination_id);
265
+
break;
260
266
default:
261
267
ret = -EOPNOTSUPP;
262
268
goto out;
···
365
359
ft_attr->type = fw_ft_type;
366
360
ft_attr->table_miss_action = MLX5_IFC_MODIFY_FLOW_TABLE_MISS_ACTION_GOTO_TBL;
367
361
368
-
default_miss_tbl = ctx->common_res[type].default_miss->ft_id;
362
+
default_miss_tbl = ctx->common_res.default_miss->ft_id;
369
363
if (!default_miss_tbl) {
370
364
pr_warn("HWS: no flow table ID for default miss\n");
371
365
return;
···
628
622
u32 pd,
629
623
u32 *arg_id)
630
624
{
625
+
u32 in[MLX5_ST_SZ_DW(create_modify_header_arg_in)] = {0};
631
626
u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)] = {0};
632
-
u32 in[MLX5_ST_SZ_DW(create_arg_in)] = {0};
633
627
void *attr;
634
628
int ret;
635
629
636
-
attr = MLX5_ADDR_OF(create_arg_in, in, hdr);
630
+
attr = MLX5_ADDR_OF(create_modify_header_arg_in, in, hdr);
637
631
MLX5_SET(general_obj_in_cmd_hdr,
638
632
attr, opcode, MLX5_CMD_OP_CREATE_GENERAL_OBJECT);
639
633
MLX5_SET(general_obj_in_cmd_hdr,
···
641
635
MLX5_SET(general_obj_in_cmd_hdr,
642
636
attr, op_param.create.log_obj_range, log_obj_range);
643
637
644
-
attr = MLX5_ADDR_OF(create_arg_in, in, arg);
645
-
MLX5_SET(arg, attr, access_pd, pd);
638
+
attr = MLX5_ADDR_OF(create_modify_header_arg_in, in, arg);
639
+
MLX5_SET(modify_header_arg, attr, access_pd, pd);
646
640
647
641
ret = mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out));
648
642
if (ret) {
···
818
812
struct mlx5hws_cmd_packet_reformat_create_attr *attr,
819
813
u32 *reformat_id)
820
814
{
821
-
u32 out[MLX5_ST_SZ_DW(alloc_packet_reformat_out)] = {0};
815
+
u32 out[MLX5_ST_SZ_DW(alloc_packet_reformat_context_out)] = {0};
822
816
size_t insz, cmd_data_sz, cmd_total_sz;
823
817
void *prctx;
824
818
void *pdata;
···
851
845
goto out;
852
846
}
853
847
854
-
*reformat_id = MLX5_GET(alloc_packet_reformat_out, out, packet_reformat_id);
848
+
*reformat_id = MLX5_GET(alloc_packet_reformat_context_out, out, packet_reformat_id);
855
849
out:
856
850
kfree(in);
857
851
return ret;
···
860
854
int mlx5hws_cmd_packet_reformat_destroy(struct mlx5_core_dev *mdev,
861
855
u32 reformat_id)
862
856
{
863
-
u32 out[MLX5_ST_SZ_DW(dealloc_packet_reformat_out)] = {0};
864
-
u32 in[MLX5_ST_SZ_DW(dealloc_packet_reformat_in)] = {0};
857
+
u32 out[MLX5_ST_SZ_DW(dealloc_packet_reformat_context_out)] = {0};
858
+
u32 in[MLX5_ST_SZ_DW(dealloc_packet_reformat_context_in)] = {0};
865
859
int ret;
866
860
867
-
MLX5_SET(dealloc_packet_reformat_in, in, opcode,
861
+
MLX5_SET(dealloc_packet_reformat_context_in, in, opcode,
868
862
MLX5_CMD_OP_DEALLOC_PACKET_REFORMAT_CONTEXT);
869
-
MLX5_SET(dealloc_packet_reformat_in, in,
863
+
MLX5_SET(dealloc_packet_reformat_context_in, in,
870
864
packet_reformat_id, reformat_id);
871
865
872
866
ret = mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out));
···
893
887
mlx5_core_err(mdev, "Failed to modify SQ\n");
894
888
895
889
return ret;
896
-
}
897
-
898
-
int mlx5hws_cmd_allow_other_vhca_access(struct mlx5_core_dev *mdev,
899
-
struct mlx5hws_cmd_allow_other_vhca_access_attr *attr)
900
-
{
901
-
u32 out[MLX5_ST_SZ_DW(allow_other_vhca_access_out)] = {0};
902
-
u32 in[MLX5_ST_SZ_DW(allow_other_vhca_access_in)] = {0};
903
-
void *key;
904
-
int ret;
905
-
906
-
MLX5_SET(allow_other_vhca_access_in,
907
-
in, opcode, MLX5_CMD_OP_ALLOW_OTHER_VHCA_ACCESS);
908
-
MLX5_SET(allow_other_vhca_access_in,
909
-
in, object_type_to_be_accessed, attr->obj_type);
910
-
MLX5_SET(allow_other_vhca_access_in,
911
-
in, object_id_to_be_accessed, attr->obj_id);
912
-
913
-
key = MLX5_ADDR_OF(allow_other_vhca_access_in, in, access_key);
914
-
memcpy(key, attr->access_key, sizeof(attr->access_key));
915
-
916
-
ret = mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out));
917
-
if (ret)
918
-
mlx5_core_err(mdev, "Failed to execute ALLOW_OTHER_VHCA_ACCESS command\n");
919
-
920
-
return ret;
921
-
}
922
-
923
-
int mlx5hws_cmd_alias_obj_create(struct mlx5_core_dev *mdev,
924
-
struct mlx5hws_cmd_alias_obj_create_attr *alias_attr,
925
-
u32 *obj_id)
926
-
{
927
-
u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)] = {0};
928
-
u32 in[MLX5_ST_SZ_DW(create_alias_obj_in)] = {0};
929
-
void *attr;
930
-
void *key;
931
-
int ret;
932
-
933
-
attr = MLX5_ADDR_OF(create_alias_obj_in, in, hdr);
934
-
MLX5_SET(general_obj_in_cmd_hdr,
935
-
attr, opcode, MLX5_CMD_OP_CREATE_GENERAL_OBJECT);
936
-
MLX5_SET(general_obj_in_cmd_hdr,
937
-
attr, obj_type, alias_attr->obj_type);
938
-
MLX5_SET(general_obj_in_cmd_hdr, attr, op_param.create.alias_object, 1);
939
-
940
-
attr = MLX5_ADDR_OF(create_alias_obj_in, in, alias_ctx);
941
-
MLX5_SET(alias_context, attr, vhca_id_to_be_accessed, alias_attr->vhca_id);
942
-
MLX5_SET(alias_context, attr, object_id_to_be_accessed, alias_attr->obj_id);
943
-
944
-
key = MLX5_ADDR_OF(alias_context, attr, access_key);
945
-
memcpy(key, alias_attr->access_key, sizeof(alias_attr->access_key));
946
-
947
-
ret = mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out));
948
-
if (ret) {
949
-
mlx5_core_err(mdev, "Failed to create ALIAS OBJ\n");
950
-
goto out;
951
-
}
952
-
953
-
*obj_id = MLX5_GET(general_obj_out_cmd_hdr, out, obj_id);
954
-
out:
955
-
return ret;
956
-
}
957
-
958
-
int mlx5hws_cmd_alias_obj_destroy(struct mlx5_core_dev *mdev,
959
-
u16 obj_type,
960
-
u32 obj_id)
961
-
{
962
-
return hws_cmd_general_obj_destroy(mdev, obj_type, obj_id);
963
890
}
964
891
965
892
int mlx5hws_cmd_generate_wqe(struct mlx5_core_dev *mdev,
+1
-12
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.h
+1
-12
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.h
···
63
63
u8 type;
64
64
u32 ft_id;
65
65
u32 fg_id;
66
-
u32 refcount;
66
+
u32 refcount; /* protected by context ctrl lock */
67
67
};
68
68
69
69
struct mlx5hws_cmd_rtc_create_attr {
···
334
334
void mlx5hws_cmd_forward_tbl_destroy(struct mlx5_core_dev *mdev,
335
335
struct mlx5hws_cmd_forward_tbl *tbl);
336
336
337
-
int mlx5hws_cmd_alias_obj_create(struct mlx5_core_dev *mdev,
338
-
struct mlx5hws_cmd_alias_obj_create_attr *alias_attr,
339
-
u32 *obj_id);
340
-
341
-
int mlx5hws_cmd_alias_obj_destroy(struct mlx5_core_dev *mdev,
342
-
u16 obj_type,
343
-
u32 obj_id);
344
-
345
337
int mlx5hws_cmd_sq_modify_rdy(struct mlx5_core_dev *mdev, u32 sqn);
346
338
347
339
int mlx5hws_cmd_query_caps(struct mlx5_core_dev *mdev,
···
343
351
u32 fw_ft_type,
344
352
enum mlx5hws_table_type type,
345
353
struct mlx5hws_cmd_ft_modify_attr *ft_attr);
346
-
347
-
int mlx5hws_cmd_allow_other_vhca_access(struct mlx5_core_dev *mdev,
348
-
struct mlx5hws_cmd_allow_other_vhca_access_attr *attr);
349
354
350
355
int mlx5hws_cmd_query_gvmi(struct mlx5_core_dev *mdev, bool other_function,
351
356
u16 vport_number, u16 *gvmi);
+9
-20
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.c
+9
-20
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.c
···
23
23
struct mlx5hws_pool_attr pool_attr = {0};
24
24
u8 max_log_sz;
25
25
int ret;
26
-
int i;
27
26
28
27
ret = mlx5hws_pat_init_pattern_cache(&ctx->pattern_cache);
29
28
if (ret)
···
38
39
max_log_sz = min(MLX5HWS_POOL_STC_LOG_SZ, ctx->caps->stc_alloc_log_max);
39
40
pool_attr.alloc_log_sz = max(max_log_sz, ctx->caps->stc_alloc_log_gran);
40
41
41
-
for (i = 0; i < MLX5HWS_TABLE_TYPE_MAX; i++) {
42
-
pool_attr.table_type = i;
43
-
ctx->stc_pool[i] = mlx5hws_pool_create(ctx, &pool_attr);
44
-
if (!ctx->stc_pool[i]) {
45
-
mlx5hws_err(ctx, "Failed to allocate STC pool [%d]", i);
46
-
ret = -ENOMEM;
47
-
goto free_stc_pools;
48
-
}
42
+
pool_attr.table_type = MLX5HWS_TABLE_TYPE_FDB;
43
+
ctx->stc_pool = mlx5hws_pool_create(ctx, &pool_attr);
44
+
if (!ctx->stc_pool) {
45
+
mlx5hws_err(ctx, "Failed to allocate STC pool\n");
46
+
ret = -ENOMEM;
47
+
goto uninit_cache;
49
48
}
50
49
51
50
return 0;
52
51
53
-
free_stc_pools:
54
-
for (i = 0; i < MLX5HWS_TABLE_TYPE_MAX; i++)
55
-
if (ctx->stc_pool[i])
56
-
mlx5hws_pool_destroy(ctx->stc_pool[i]);
57
-
52
+
uninit_cache:
58
53
mlx5hws_definer_uninit_cache(ctx->definer_cache);
59
54
uninit_pat_cache:
60
55
mlx5hws_pat_uninit_pattern_cache(ctx->pattern_cache);
···
57
64
58
65
static void hws_context_pools_uninit(struct mlx5hws_context *ctx)
59
66
{
60
-
int i;
61
-
62
-
for (i = 0; i < MLX5HWS_TABLE_TYPE_MAX; i++) {
63
-
if (ctx->stc_pool[i])
64
-
mlx5hws_pool_destroy(ctx->stc_pool[i]);
65
-
}
67
+
if (ctx->stc_pool)
68
+
mlx5hws_pool_destroy(ctx->stc_pool);
66
69
67
70
mlx5hws_definer_uninit_cache(ctx->definer_cache);
68
71
mlx5hws_pat_uninit_pattern_cache(ctx->pattern_cache);
+2
-2
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.h
+2
-2
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.h
···
38
38
struct mlx5_core_dev *mdev;
39
39
struct mlx5hws_cmd_query_caps *caps;
40
40
u32 pd_num;
41
-
struct mlx5hws_pool *stc_pool[MLX5HWS_TABLE_TYPE_MAX];
42
-
struct mlx5hws_context_common_res common_res[MLX5HWS_TABLE_TYPE_MAX];
41
+
struct mlx5hws_pool *stc_pool;
42
+
struct mlx5hws_context_common_res common_res;
43
43
struct mlx5hws_pattern_cache *pattern_cache;
44
44
struct mlx5hws_definer_cache *definer_cache;
45
45
struct mutex ctrl_lock; /* control lock to protect the whole context */
+14
-22
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/debug.c
+14
-22
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/debug.c
···
368
368
369
369
static int hws_debug_dump_context_stc_resource(struct seq_file *f,
370
370
struct mlx5hws_context *ctx,
371
-
u32 tbl_type,
372
371
struct mlx5hws_pool_resource *resource)
373
372
{
373
+
u32 tbl_type = MLX5HWS_TABLE_TYPE_BASE + MLX5HWS_TABLE_TYPE_FDB;
374
+
374
375
seq_printf(f, "%d,0x%llx,%u,%u\n",
375
376
MLX5HWS_DEBUG_RES_TYPE_CONTEXT_STC,
376
377
HWS_PTR_TO_ID(ctx),
···
383
382
384
383
static int hws_debug_dump_context_stc(struct seq_file *f, struct mlx5hws_context *ctx)
385
384
{
386
-
struct mlx5hws_pool *stc_pool;
387
-
u32 table_type;
385
+
struct mlx5hws_pool *stc_pool = ctx->stc_pool;
388
386
int ret;
389
-
int i;
390
387
391
-
for (i = 0; i < MLX5HWS_TABLE_TYPE_MAX; i++) {
392
-
stc_pool = ctx->stc_pool[i];
393
-
table_type = MLX5HWS_TABLE_TYPE_BASE + i;
388
+
if (!stc_pool)
389
+
return 0;
394
390
395
-
if (!stc_pool)
396
-
continue;
391
+
if (stc_pool->resource[0]) {
392
+
ret = hws_debug_dump_context_stc_resource(f, ctx, stc_pool->resource[0]);
393
+
if (ret)
394
+
return ret;
395
+
}
397
396
398
-
if (stc_pool->resource[0]) {
399
-
ret = hws_debug_dump_context_stc_resource(f, ctx, table_type,
400
-
stc_pool->resource[0]);
401
-
if (ret)
402
-
return ret;
403
-
}
404
-
405
-
if (i == MLX5HWS_TABLE_TYPE_FDB && stc_pool->mirror_resource[0]) {
406
-
ret = hws_debug_dump_context_stc_resource(f, ctx, table_type,
407
-
stc_pool->mirror_resource[0]);
408
-
if (ret)
409
-
return ret;
410
-
}
397
+
if (stc_pool->mirror_resource[0]) {
398
+
ret = hws_debug_dump_context_stc_resource(f, ctx, stc_pool->mirror_resource[0]);
399
+
if (ret)
400
+
return ret;
411
401
}
412
402
413
403
return 0;
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.c
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.c
···
70
70
u32 second_dw_mask = (mask) & ((1 << _bit_off) - 1); \
71
71
_HWS_SET32(p, (v) >> _bit_off, byte_off, 0, (mask) >> _bit_off); \
72
72
_HWS_SET32(p, (v) & second_dw_mask, (byte_off) + DW_SIZE, \
73
-
(bit_off) % BITS_IN_DW, second_dw_mask); \
73
+
(bit_off + BITS_IN_DW) % BITS_IN_DW, second_dw_mask); \
74
74
} else { \
75
75
_HWS_SET32(p, v, byte_off, (bit_off), (mask)); \
76
76
} \
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.h
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.h
+14
-22
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/matcher.c
+14
-22
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/matcher.c
···
165
165
next->match_ste.rtc_0_id,
166
166
next->match_ste.rtc_1_id);
167
167
if (ret) {
168
-
mlx5hws_err(tbl->ctx, "Failed to disconnect matcher\n");
169
-
goto matcher_reconnect;
168
+
mlx5hws_err(tbl->ctx, "Fatal error, failed to disconnect matcher\n");
169
+
return ret;
170
170
}
171
171
} else {
172
172
ret = mlx5hws_table_connect_to_miss_table(tbl, tbl->default_miss.miss_tbl);
173
173
if (ret) {
174
-
mlx5hws_err(tbl->ctx, "Failed to disconnect last matcher\n");
175
-
goto matcher_reconnect;
174
+
mlx5hws_err(tbl->ctx, "Fatal error, failed to disconnect last matcher\n");
175
+
return ret;
176
176
}
177
177
}
178
178
···
180
180
if (prev_ft_id == tbl->ft_id) {
181
181
ret = mlx5hws_table_update_connected_miss_tables(tbl);
182
182
if (ret) {
183
-
mlx5hws_err(tbl->ctx, "Fatal error, failed to update connected miss table\n");
184
-
goto matcher_reconnect;
183
+
mlx5hws_err(tbl->ctx,
184
+
"Fatal error, failed to update connected miss table\n");
185
+
return ret;
185
186
}
186
187
}
187
188
188
189
ret = mlx5hws_table_ft_set_default_next_ft(tbl, prev_ft_id);
189
190
if (ret) {
190
191
mlx5hws_err(tbl->ctx, "Fatal error, failed to restore matcher ft default miss\n");
191
-
goto matcher_reconnect;
192
+
return ret;
192
193
}
193
194
194
195
return 0;
195
-
196
-
matcher_reconnect:
197
-
if (list_empty(&tbl->matchers_list) || !prev)
198
-
list_add(&matcher->list_node, &tbl->matchers_list);
199
-
else
200
-
/* insert after prev matcher */
201
-
list_add(&matcher->list_node, &prev->list_node);
202
-
203
-
return ret;
204
196
}
205
197
206
198
static void hws_matcher_set_rtc_attr_sz(struct mlx5hws_matcher *matcher,
···
310
318
hws_matcher_set_rtc_attr_sz(matcher, &rtc_attr, rtc_type, false);
311
319
312
320
/* STC is a single resource (obj_id), use any STC for the ID */
313
-
stc_pool = ctx->stc_pool[tbl->type];
314
-
default_stc = ctx->common_res[tbl->type].default_stc;
321
+
stc_pool = ctx->stc_pool;
322
+
default_stc = ctx->common_res.default_stc;
315
323
obj_id = mlx5hws_pool_chunk_get_base_id(stc_pool, &default_stc->default_hit);
316
324
rtc_attr.stc_base = obj_id;
317
325
···
999
1007
if (!matcher->mt)
1000
1008
return -ENOMEM;
1001
1009
1002
-
matcher->at = kcalloc(num_of_at + matcher->attr.max_num_of_at_attach,
1003
-
sizeof(*matcher->at),
1004
-
GFP_KERNEL);
1010
+
matcher->at = kvcalloc(num_of_at + matcher->attr.max_num_of_at_attach,
1011
+
sizeof(*matcher->at),
1012
+
GFP_KERNEL);
1005
1013
if (!matcher->at) {
1006
1014
mlx5hws_err(ctx, "Failed to allocate action template array\n");
1007
1015
ret = -ENOMEM;
···
1027
1035
static void
1028
1036
hws_matcher_unset_templates(struct mlx5hws_matcher *matcher)
1029
1037
{
1030
-
kfree(matcher->at);
1038
+
kvfree(matcher->at);
1031
1039
kfree(matcher->mt);
1032
1040
}
1033
1041
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.c
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.c
···
344
344
mlx5hws_send_engine_post_req_wqe(&ctrl, (void *)&wqe_ctrl, &wqe_len);
345
345
memset(wqe_ctrl, 0, wqe_len);
346
346
mlx5hws_send_engine_post_req_wqe(&ctrl, (void *)&wqe_arg, &wqe_len);
347
-
memcpy(wqe_arg, arg_data, wqe_len);
347
+
memcpy(wqe_arg, arg_data, MLX5HWS_ARG_DATA_SIZE);
348
348
send_attr.id = arg_idx++;
349
349
mlx5hws_send_engine_post_end(&ctrl, &send_attr);
350
350
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.h
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.h
+2
-2
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.c
+2
-2
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.c
···
183
183
*seg = -1;
184
184
185
185
/* Find the next free place from the buddy array */
186
-
while (*seg == -1) {
186
+
while (*seg < 0) {
187
187
for (i = 0; i < MLX5HWS_POOL_RESOURCE_ARR_SZ; i++) {
188
188
buddy = hws_pool_buddy_get_next_buddy(pool, i,
189
189
order,
···
194
194
}
195
195
196
196
*seg = mlx5hws_buddy_alloc_mem(buddy, order);
197
-
if (*seg != -1)
197
+
if (*seg >= 0)
198
198
goto found;
199
199
200
200
if (pool->flags & MLX5HWS_POOL_FLAGS_ONE_RESOURCE) {
-42
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/prm.h
-42
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/prm.h
···
390
390
u8 match_mask[0x160];
391
391
};
392
392
393
-
struct mlx5_ifc_arg_bits {
394
-
u8 rsvd0[0x88];
395
-
u8 access_pd[0x18];
396
-
};
397
-
398
393
struct mlx5_ifc_header_modify_pattern_in_bits {
399
394
u8 modify_field_select[0x40];
400
395
···
421
426
struct mlx5_ifc_create_definer_in_bits {
422
427
struct mlx5_ifc_general_obj_in_cmd_hdr_bits hdr;
423
428
struct mlx5_ifc_definer_bits definer;
424
-
};
425
-
426
-
struct mlx5_ifc_create_arg_in_bits {
427
-
struct mlx5_ifc_general_obj_in_cmd_hdr_bits hdr;
428
-
struct mlx5_ifc_arg_bits arg;
429
429
};
430
430
431
431
struct mlx5_ifc_create_header_modify_pattern_in_bits {
···
467
477
enum {
468
478
MLX5_IFC_MODIFY_FLOW_TABLE_MISS_ACTION_DEFAULT = 0,
469
479
MLX5_IFC_MODIFY_FLOW_TABLE_MISS_ACTION_GOTO_TBL = 1,
470
-
};
471
-
472
-
struct mlx5_ifc_alloc_packet_reformat_out_bits {
473
-
u8 status[0x8];
474
-
u8 reserved_at_8[0x18];
475
-
476
-
u8 syndrome[0x20];
477
-
478
-
u8 packet_reformat_id[0x20];
479
-
480
-
u8 reserved_at_60[0x20];
481
-
};
482
-
483
-
struct mlx5_ifc_dealloc_packet_reformat_in_bits {
484
-
u8 opcode[0x10];
485
-
u8 reserved_at_10[0x10];
486
-
487
-
u8 reserved_at_20[0x10];
488
-
u8 op_mod[0x10];
489
-
490
-
u8 packet_reformat_id[0x20];
491
-
492
-
u8 reserved_at_60[0x20];
493
-
};
494
-
495
-
struct mlx5_ifc_dealloc_packet_reformat_out_bits {
496
-
u8 status[0x8];
497
-
u8 reserved_at_8[0x18];
498
-
499
-
u8 syndrome[0x20];
500
-
501
-
u8 reserved_at_40[0x40];
502
480
};
503
481
504
482
#endif /* MLX5_PRM_H_ */
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.c
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.c
···
315
315
316
316
/* Init default action apply */
317
317
apply->tbl_type = tbl->type;
318
-
apply->common_res = &ctx->common_res[tbl->type];
318
+
apply->common_res = &ctx->common_res;
319
319
apply->jump_to_action_stc = matcher->action_ste[0].stc.offset;
320
320
apply->require_dep = 0;
321
321
}
+1
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c
+1
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c
+8
-14
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/table.c
+8
-14
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/table.c
···
37
37
}
38
38
39
39
static int hws_table_up_default_fdb_miss_tbl(struct mlx5hws_table *tbl)
40
+
__must_hold(&tbl->ctx->ctrl_lock)
40
41
{
41
42
struct mlx5hws_cmd_ft_create_attr ft_attr = {0};
42
43
struct mlx5hws_cmd_set_fte_attr fte_attr = {0};
···
49
48
if (tbl->type != MLX5HWS_TABLE_TYPE_FDB)
50
49
return 0;
51
50
52
-
if (ctx->common_res[tbl_type].default_miss) {
53
-
ctx->common_res[tbl_type].default_miss->refcount++;
51
+
if (ctx->common_res.default_miss) {
52
+
ctx->common_res.default_miss->refcount++;
54
53
return 0;
55
54
}
56
55
···
71
70
return -EINVAL;
72
71
}
73
72
74
-
/* ctx->ctrl_lock must be held here */
75
-
ctx->common_res[tbl_type].default_miss = default_miss;
76
-
ctx->common_res[tbl_type].default_miss->refcount++;
73
+
ctx->common_res.default_miss = default_miss;
74
+
ctx->common_res.default_miss->refcount++;
77
75
78
76
return 0;
79
77
}
80
78
81
79
/* Called under ctx->ctrl_lock */
82
80
static void hws_table_down_default_fdb_miss_tbl(struct mlx5hws_table *tbl)
81
+
__must_hold(&tbl->ctx->ctrl_lock)
83
82
{
84
83
struct mlx5hws_cmd_forward_tbl *default_miss;
85
84
struct mlx5hws_context *ctx = tbl->ctx;
86
-
u8 tbl_type = tbl->type;
87
85
88
86
if (tbl->type != MLX5HWS_TABLE_TYPE_FDB)
89
87
return;
90
88
91
-
default_miss = ctx->common_res[tbl_type].default_miss;
89
+
default_miss = ctx->common_res.default_miss;
92
90
if (--default_miss->refcount)
93
91
return;
94
92
95
93
mlx5hws_cmd_forward_tbl_destroy(ctx->mdev, default_miss);
96
-
ctx->common_res[tbl_type].default_miss = NULL;
94
+
ctx->common_res.default_miss = NULL;
97
95
}
98
96
99
97
static int hws_table_connect_to_default_miss_tbl(struct mlx5hws_table *tbl, u32 ft_id)
···
478
478
if (old_miss_tbl)
479
479
list_del_init(&tbl->default_miss.next);
480
480
481
-
old_miss_tbl = tbl->default_miss.miss_tbl;
482
-
if (old_miss_tbl)
483
-
list_del_init(&old_miss_tbl->default_miss.head);
484
-
485
481
if (miss_tbl)
486
482
list_add(&tbl->default_miss.next, &miss_tbl->default_miss.head);
487
483
488
-
mutex_unlock(&ctx->ctrl_lock);
489
-
return 0;
490
484
out:
491
485
mutex_unlock(&ctx->ctrl_lock);
492
486
return ret;