Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'drm-fixes-2018-07-27' of git://anongit.freedesktop.org/drm/drm
Pull drm fixes from Dave Airlie:
"Not much happening this week which is good: two imx display fixes and
one i915 quirk addition"
* tag 'drm-fixes-2018-07-27' of git://anongit.freedesktop.org/drm/drm:
drm/i915/glk: Add Quirk for GLK NUC HDMI port issues.
gpu: ipu-csi: Check for field type alternate
drm/imx: imx-ldb: check if channel is enabled before printing warning
drm/imx: imx-ldb: disable LDB on driver bind
+41
-9
+1
drivers/gpu/drm/i915/i915_drv.h
+1
drivers/gpu/drm/i915/i915_drv.h
+11
-2
drivers/gpu/drm/i915/intel_ddi.c
+11
-2
drivers/gpu/drm/i915/intel_ddi.c
···
1782
1782
I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);
1783
1783
}
1784
1784
1785
-
void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
1786
-
enum transcoder cpu_transcoder)
1785
+
void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state)
1787
1786
{
1787
+
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
1788
+
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
1789
+
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
1788
1790
i915_reg_t reg = TRANS_DDI_FUNC_CTL(cpu_transcoder);
1789
1791
uint32_t val = I915_READ(reg);
1790
1792
1791
1793
val &= ~(TRANS_DDI_FUNC_ENABLE | TRANS_DDI_PORT_MASK | TRANS_DDI_DP_VC_PAYLOAD_ALLOC);
1792
1794
val |= TRANS_DDI_PORT_NONE;
1793
1795
I915_WRITE(reg, val);
1796
+
1797
+
if (dev_priv->quirks & QUIRK_INCREASE_DDI_DISABLED_TIME &&
1798
+
intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
1799
+
DRM_DEBUG_KMS("Quirk Increase DDI disabled time\n");
1800
+
/* Quirk time at 100ms for reliable operation */
1801
+
msleep(100);
1802
+
}
1794
1803
}
1795
1804
1796
1805
int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
+20
-1
drivers/gpu/drm/i915/intel_display.c
+20
-1
drivers/gpu/drm/i915/intel_display.c
···
5809
5809
intel_ddi_set_vc_payload_alloc(intel_crtc->config, false);
5810
5810
5811
5811
if (!transcoder_is_dsi(cpu_transcoder))
5812
-
intel_ddi_disable_transcoder_func(dev_priv, cpu_transcoder);
5812
+
intel_ddi_disable_transcoder_func(old_crtc_state);
5813
5813
5814
5814
if (INTEL_GEN(dev_priv) >= 9)
5815
5815
skylake_scaler_disable(intel_crtc);
···
14646
14646
DRM_INFO("Applying T12 delay quirk\n");
14647
14647
}
14648
14648
14649
+
/*
14650
+
* GeminiLake NUC HDMI outputs require additional off time
14651
+
* this allows the onboard retimer to correctly sync to signal
14652
+
*/
14653
+
static void quirk_increase_ddi_disabled_time(struct drm_device *dev)
14654
+
{
14655
+
struct drm_i915_private *dev_priv = to_i915(dev);
14656
+
14657
+
dev_priv->quirks |= QUIRK_INCREASE_DDI_DISABLED_TIME;
14658
+
DRM_INFO("Applying Increase DDI Disabled quirk\n");
14659
+
}
14660
+
14649
14661
struct intel_quirk {
14650
14662
int device;
14651
14663
int subsystem_vendor;
···
14744
14732
14745
14733
/* Toshiba Satellite P50-C-18C */
14746
14734
{ 0x191B, 0x1179, 0xF840, quirk_increase_t12_delay },
14735
+
14736
+
/* GeminiLake NUC */
14737
+
{ 0x3185, 0x8086, 0x2072, quirk_increase_ddi_disabled_time },
14738
+
{ 0x3184, 0x8086, 0x2072, quirk_increase_ddi_disabled_time },
14739
+
/* ASRock ITX*/
14740
+
{ 0x3185, 0x1849, 0x2212, quirk_increase_ddi_disabled_time },
14741
+
{ 0x3184, 0x1849, 0x2212, quirk_increase_ddi_disabled_time },
14747
14742
};
14748
14743
14749
14744
static void intel_init_quirks(struct drm_device *dev)
+1
-2
drivers/gpu/drm/i915/intel_drv.h
+1
-2
drivers/gpu/drm/i915/intel_drv.h
···
1388
1388
void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port);
1389
1389
bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe);
1390
1390
void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state);
1391
-
void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
1392
-
enum transcoder cpu_transcoder);
1391
+
void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state);
1393
1392
void intel_ddi_enable_pipe_clock(const struct intel_crtc_state *crtc_state);
1394
1393
void intel_ddi_disable_pipe_clock(const struct intel_crtc_state *crtc_state);
1395
1394
struct intel_encoder *
+6
-3
drivers/gpu/drm/imx/imx-ldb.c
+6
-3
drivers/gpu/drm/imx/imx-ldb.c
···
612
612
return PTR_ERR(imx_ldb->regmap);
613
613
}
614
614
615
+
/* disable LDB by resetting the control register to POR default */
616
+
regmap_write(imx_ldb->regmap, IOMUXC_GPR2, 0);
617
+
615
618
imx_ldb->dev = dev;
616
619
617
620
if (of_id)
···
655
652
if (ret || i < 0 || i > 1)
656
653
return -EINVAL;
657
654
655
+
if (!of_device_is_available(child))
656
+
continue;
657
+
658
658
if (dual && i > 0) {
659
659
dev_warn(dev, "dual-channel mode, ignoring second output\n");
660
660
continue;
661
661
}
662
-
663
-
if (!of_device_is_available(child))
664
-
continue;
665
662
666
663
channel = &imx_ldb->channel[i];
667
664
channel->ldb = imx_ldb;
+2
-1
drivers/gpu/ipu-v3/ipu-csi.c
+2
-1
drivers/gpu/ipu-v3/ipu-csi.c
···
339
339
break;
340
340
case V4L2_MBUS_BT656:
341
341
csicfg->ext_vsync = 0;
342
-
if (V4L2_FIELD_HAS_BOTH(mbus_fmt->field))
342
+
if (V4L2_FIELD_HAS_BOTH(mbus_fmt->field) ||
343
+
mbus_fmt->field == V4L2_FIELD_ALTERNATE)
343
344
csicfg->clk_mode = IPU_CSI_CLK_MODE_CCIR656_INTERLACED;
344
345
else
345
346
csicfg->clk_mode = IPU_CSI_CLK_MODE_CCIR656_PROGRESSIVE;