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drm/amdgpu: Reduce redundant gpu resets on nbio v7.4

On nbio v7.4, ras controller interrupt and athub
interrupt are generated after injecting UE to PCIE,
but gpu reset only needs to be triggered once.

Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

YiPeng Chai and committed by
Alex Deucher
3d0ffc64 1cdd6751

+1 -2
+1 -2
drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
··· 414 414 /* ras_controller_int is dedicated for nbif ras error, 415 415 * not the global interrupt for sync flood 416 416 */ 417 - amdgpu_ras_set_fed(adev, true); 418 - amdgpu_ras_reset_gpu(adev); 417 + amdgpu_ras_global_ras_isr(adev); 419 418 } 420 419 421 420 amdgpu_ras_error_data_fini(&err_data);