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Merge tag 'drm-misc-fixes-2026-03-05' of https://gitlab.freedesktop.org/drm/misc/kernel into drm-fixes

A return type fix for ttm, a display fix for solomon, several misc fixes
for amdxdna, a DSI clock rate fix for rz-du, a uapi fix for syncobj, a
possible build failure fix for dma-buf, a doc warning fix for sched, a
build failure fix for ttm tests, and a crash fix when suspended for
nouveau.

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Maxime Ripard <mripard@redhat.com>
Link: https://patch.msgid.link/20260305-ludicrous-quirky-raven-7cdafd@houat

+85 -36
+8 -15
drivers/accel/amdxdna/aie2_ctx.c
··· 186 186 cmd_abo = job->cmd_bo; 187 187 188 188 if (unlikely(job->job_timeout)) { 189 - amdxdna_cmd_set_state(cmd_abo, ERT_CMD_STATE_TIMEOUT); 189 + amdxdna_cmd_set_error(cmd_abo, job, 0, ERT_CMD_STATE_TIMEOUT); 190 190 ret = -EINVAL; 191 191 goto out; 192 192 } 193 193 194 194 if (unlikely(!data) || unlikely(size != sizeof(u32))) { 195 - amdxdna_cmd_set_state(cmd_abo, ERT_CMD_STATE_ABORT); 195 + amdxdna_cmd_set_error(cmd_abo, job, 0, ERT_CMD_STATE_ABORT); 196 196 ret = -EINVAL; 197 197 goto out; 198 198 } ··· 202 202 if (status == AIE2_STATUS_SUCCESS) 203 203 amdxdna_cmd_set_state(cmd_abo, ERT_CMD_STATE_COMPLETED); 204 204 else 205 - amdxdna_cmd_set_state(cmd_abo, ERT_CMD_STATE_ERROR); 205 + amdxdna_cmd_set_error(cmd_abo, job, 0, ERT_CMD_STATE_ERROR); 206 206 207 207 out: 208 208 aie2_sched_notify(job); ··· 244 244 cmd_abo = job->cmd_bo; 245 245 246 246 if (unlikely(job->job_timeout)) { 247 - amdxdna_cmd_set_state(cmd_abo, ERT_CMD_STATE_TIMEOUT); 247 + amdxdna_cmd_set_error(cmd_abo, job, 0, ERT_CMD_STATE_TIMEOUT); 248 248 ret = -EINVAL; 249 249 goto out; 250 250 } 251 251 252 252 if (unlikely(!data) || unlikely(size != sizeof(u32) * 3)) { 253 - amdxdna_cmd_set_state(cmd_abo, ERT_CMD_STATE_ABORT); 253 + amdxdna_cmd_set_error(cmd_abo, job, 0, ERT_CMD_STATE_ABORT); 254 254 ret = -EINVAL; 255 255 goto out; 256 256 } ··· 270 270 fail_cmd_idx, fail_cmd_status); 271 271 272 272 if (fail_cmd_status == AIE2_STATUS_SUCCESS) { 273 - amdxdna_cmd_set_state(cmd_abo, ERT_CMD_STATE_ABORT); 273 + amdxdna_cmd_set_error(cmd_abo, job, fail_cmd_idx, ERT_CMD_STATE_ABORT); 274 274 ret = -EINVAL; 275 - goto out; 275 + } else { 276 + amdxdna_cmd_set_error(cmd_abo, job, fail_cmd_idx, ERT_CMD_STATE_ERROR); 276 277 } 277 - amdxdna_cmd_set_state(cmd_abo, ERT_CMD_STATE_ERROR); 278 278 279 - if (amdxdna_cmd_get_op(cmd_abo) == ERT_CMD_CHAIN) { 280 - struct amdxdna_cmd_chain *cc = amdxdna_cmd_get_payload(cmd_abo, NULL); 281 - 282 - cc->error_index = fail_cmd_idx; 283 - if (cc->error_index >= cc->command_count) 284 - cc->error_index = 0; 285 - } 286 279 out: 287 280 aie2_sched_notify(job); 288 281 return ret;
+16 -5
drivers/accel/amdxdna/aie2_message.c
··· 40 40 return -ENODEV; 41 41 42 42 ret = xdna_send_msg_wait(xdna, ndev->mgmt_chann, msg); 43 - if (ret == -ETIME) { 44 - xdna_mailbox_stop_channel(ndev->mgmt_chann); 45 - xdna_mailbox_destroy_channel(ndev->mgmt_chann); 46 - ndev->mgmt_chann = NULL; 47 - } 43 + if (ret == -ETIME) 44 + aie2_destroy_mgmt_chann(ndev); 48 45 49 46 if (!ret && *hdl->status != AIE2_STATUS_SUCCESS) { 50 47 XDNA_ERR(xdna, "command opcode 0x%x failed, status 0x%x", ··· 909 912 ndev->exec_msg_ops = &npu_exec_message_ops; 910 913 else 911 914 ndev->exec_msg_ops = &legacy_exec_message_ops; 915 + } 916 + 917 + void aie2_destroy_mgmt_chann(struct amdxdna_dev_hdl *ndev) 918 + { 919 + struct amdxdna_dev *xdna = ndev->xdna; 920 + 921 + drm_WARN_ON(&xdna->ddev, !mutex_is_locked(&xdna->dev_lock)); 922 + 923 + if (!ndev->mgmt_chann) 924 + return; 925 + 926 + xdna_mailbox_stop_channel(ndev->mgmt_chann); 927 + xdna_mailbox_destroy_channel(ndev->mgmt_chann); 928 + ndev->mgmt_chann = NULL; 912 929 } 913 930 914 931 static inline struct amdxdna_gem_obj *
+2 -5
drivers/accel/amdxdna/aie2_pci.c
··· 330 330 331 331 aie2_runtime_cfg(ndev, AIE2_RT_CFG_CLK_GATING, NULL); 332 332 aie2_mgmt_fw_fini(ndev); 333 - xdna_mailbox_stop_channel(ndev->mgmt_chann); 334 - xdna_mailbox_destroy_channel(ndev->mgmt_chann); 335 - ndev->mgmt_chann = NULL; 333 + aie2_destroy_mgmt_chann(ndev); 336 334 drmm_kfree(&xdna->ddev, ndev->mbox); 337 335 ndev->mbox = NULL; 338 336 aie2_psp_stop(ndev->psp_hdl); ··· 439 441 return 0; 440 442 441 443 destroy_mgmt_chann: 442 - xdna_mailbox_stop_channel(ndev->mgmt_chann); 443 - xdna_mailbox_destroy_channel(ndev->mgmt_chann); 444 + aie2_destroy_mgmt_chann(ndev); 444 445 stop_psp: 445 446 aie2_psp_stop(ndev->psp_hdl); 446 447 fini_smu:
+1
drivers/accel/amdxdna/aie2_pci.h
··· 303 303 304 304 /* aie2_message.c */ 305 305 void aie2_msg_init(struct amdxdna_dev_hdl *ndev); 306 + void aie2_destroy_mgmt_chann(struct amdxdna_dev_hdl *ndev); 306 307 int aie2_suspend_fw(struct amdxdna_dev_hdl *ndev); 307 308 int aie2_resume_fw(struct amdxdna_dev_hdl *ndev); 308 309 int aie2_set_runtime_cfg(struct amdxdna_dev_hdl *ndev, u32 type, u64 value);
+27
drivers/accel/amdxdna/amdxdna_ctx.c
··· 135 135 return INVALID_CU_IDX; 136 136 } 137 137 138 + int amdxdna_cmd_set_error(struct amdxdna_gem_obj *abo, 139 + struct amdxdna_sched_job *job, u32 cmd_idx, 140 + enum ert_cmd_state error_state) 141 + { 142 + struct amdxdna_client *client = job->hwctx->client; 143 + struct amdxdna_cmd *cmd = abo->mem.kva; 144 + struct amdxdna_cmd_chain *cc = NULL; 145 + 146 + cmd->header &= ~AMDXDNA_CMD_STATE; 147 + cmd->header |= FIELD_PREP(AMDXDNA_CMD_STATE, error_state); 148 + 149 + if (amdxdna_cmd_get_op(abo) == ERT_CMD_CHAIN) { 150 + cc = amdxdna_cmd_get_payload(abo, NULL); 151 + cc->error_index = (cmd_idx < cc->command_count) ? cmd_idx : 0; 152 + abo = amdxdna_gem_get_obj(client, cc->data[0], AMDXDNA_BO_CMD); 153 + if (!abo) 154 + return -EINVAL; 155 + cmd = abo->mem.kva; 156 + } 157 + 158 + memset(cmd->data, 0xff, abo->mem.size - sizeof(*cmd)); 159 + if (cc) 160 + amdxdna_gem_put_obj(abo); 161 + 162 + return 0; 163 + } 164 + 138 165 /* 139 166 * This should be called in close() and remove(). DO NOT call in other syscalls. 140 167 * This guarantee that when hwctx and resources will be released, if user
+3
drivers/accel/amdxdna/amdxdna_ctx.h
··· 167 167 168 168 void *amdxdna_cmd_get_payload(struct amdxdna_gem_obj *abo, u32 *size); 169 169 u32 amdxdna_cmd_get_cu_idx(struct amdxdna_gem_obj *abo); 170 + int amdxdna_cmd_set_error(struct amdxdna_gem_obj *abo, 171 + struct amdxdna_sched_job *job, u32 cmd_idx, 172 + enum ert_cmd_state error_state); 170 173 171 174 void amdxdna_sched_job_cleanup(struct amdxdna_sched_job *job); 172 175 void amdxdna_hwctx_remove_all(struct amdxdna_client *client);
+1 -1
drivers/accel/amdxdna/npu1_regs.c
··· 67 67 68 68 static const struct aie2_fw_feature_tbl npu1_fw_feature_table[] = { 69 69 { .major = 5, .min_minor = 7 }, 70 - { .features = BIT_U64(AIE2_NPU_COMMAND), .min_minor = 8 }, 70 + { .features = BIT_U64(AIE2_NPU_COMMAND), .major = 5, .min_minor = 8 }, 71 71 { 0 } 72 72 }; 73 73
+2 -2
drivers/gpu/drm/drm_syncobj.c
··· 875 875 return drm_syncobj_export_sync_file(file_private, args->handle, 876 876 point, &args->fd); 877 877 878 - if (args->point) 878 + if (point) 879 879 return -EINVAL; 880 880 881 881 return drm_syncobj_handle_to_fd(file_private, args->handle, ··· 909 909 args->handle, 910 910 point); 911 911 912 - if (args->point) 912 + if (point) 913 913 return -EINVAL; 914 914 915 915 return drm_syncobj_fd_to_handle(file_private, args->fd,
+3
drivers/gpu/drm/nouveau/nouveau_connector.c
··· 1230 1230 u8 size = msg->size; 1231 1231 int ret; 1232 1232 1233 + if (pm_runtime_suspended(nv_connector->base.dev->dev)) 1234 + return -EBUSY; 1235 + 1233 1236 nv_encoder = find_encoder(&nv_connector->base, DCB_OUTPUT_DP); 1234 1237 if (!nv_encoder) 1235 1238 return -ENODEV;
+15 -1
drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
··· 1122 1122 struct mipi_dsi_device *device) 1123 1123 { 1124 1124 struct rzg2l_mipi_dsi *dsi = host_to_rzg2l_mipi_dsi(host); 1125 + int bpp; 1125 1126 int ret; 1126 1127 1127 1128 if (device->lanes > dsi->num_data_lanes) { ··· 1132 1131 return -EINVAL; 1133 1132 } 1134 1133 1135 - switch (mipi_dsi_pixel_format_to_bpp(device->format)) { 1134 + bpp = mipi_dsi_pixel_format_to_bpp(device->format); 1135 + switch (bpp) { 1136 1136 case 24: 1137 1137 break; 1138 1138 case 18: ··· 1163 1161 } 1164 1162 1165 1163 drm_bridge_add(&dsi->bridge); 1164 + 1165 + /* 1166 + * Report the required division ratio setting for the MIPI clock dividers. 1167 + * 1168 + * vclk * bpp = hsclk * 8 * num_lanes 1169 + * 1170 + * vclk * DSI_AB_divider = hsclk * 16 1171 + * 1172 + * which simplifies to... 1173 + * DSI_AB_divider = bpp * 2 / num_lanes 1174 + */ 1175 + rzg2l_cpg_dsi_div_set_divider(bpp * 2 / dsi->lanes, PLL5_TARGET_DSI); 1166 1176 1167 1177 return 0; 1168 1178 }
+1
drivers/gpu/drm/scheduler/sched_main.c
··· 361 361 /** 362 362 * drm_sched_job_done - complete a job 363 363 * @s_job: pointer to the job which is done 364 + * @result: 0 on success, -ERRNO on error 364 365 * 365 366 * Finish the job's fence and resubmit the work items. 366 367 */
+2 -4
drivers/gpu/drm/solomon/ssd130x.c
··· 737 737 unsigned int height = drm_rect_height(rect); 738 738 unsigned int line_length = DIV_ROUND_UP(width, 8); 739 739 unsigned int page_height = SSD130X_PAGE_HEIGHT; 740 + u8 page_start = ssd130x->page_offset + y / page_height; 740 741 unsigned int pages = DIV_ROUND_UP(height, page_height); 741 742 struct drm_device *drm = &ssd130x->drm; 742 743 u32 array_idx = 0; ··· 775 774 */ 776 775 777 776 if (!ssd130x->page_address_mode) { 778 - u8 page_start; 779 - 780 777 /* Set address range for horizontal addressing mode */ 781 778 ret = ssd130x_set_col_range(ssd130x, ssd130x->col_offset + x, width); 782 779 if (ret < 0) 783 780 return ret; 784 781 785 - page_start = ssd130x->page_offset + y / page_height; 786 782 ret = ssd130x_set_page_range(ssd130x, page_start, pages); 787 783 if (ret < 0) 788 784 return ret; ··· 811 813 */ 812 814 if (ssd130x->page_address_mode) { 813 815 ret = ssd130x_set_page_pos(ssd130x, 814 - ssd130x->page_offset + i, 816 + page_start + i, 815 817 ssd130x->col_offset + x); 816 818 if (ret < 0) 817 819 return ret;
+2 -2
drivers/gpu/drm/ttm/tests/ttm_bo_test.c
··· 222 222 KUNIT_FAIL(test, "Couldn't create ttm bo reserve task\n"); 223 223 224 224 /* Take a lock so the threaded reserve has to wait */ 225 - mutex_lock(&bo->base.resv->lock.base); 225 + dma_resv_lock(bo->base.resv, NULL); 226 226 227 227 wake_up_process(task); 228 228 msleep(20); 229 229 err = kthread_stop(task); 230 230 231 - mutex_unlock(&bo->base.resv->lock.base); 231 + dma_resv_unlock(bo->base.resv); 232 232 233 233 KUNIT_ASSERT_EQ(test, err, -ERESTARTSYS); 234 234 }
+1 -1
drivers/gpu/drm/ttm/ttm_pool_internal.h
··· 17 17 return pool->alloc_flags & TTM_ALLOCATION_POOL_USE_DMA32; 18 18 } 19 19 20 - static inline bool ttm_pool_beneficial_order(struct ttm_pool *pool) 20 + static inline unsigned int ttm_pool_beneficial_order(struct ttm_pool *pool) 21 21 { 22 22 return pool->alloc_flags & 0xff; 23 23 }
+1
include/uapi/linux/dma-buf.h
··· 20 20 #ifndef _DMA_BUF_UAPI_H_ 21 21 #define _DMA_BUF_UAPI_H_ 22 22 23 + #include <linux/ioctl.h> 23 24 #include <linux/types.h> 24 25 25 26 /**