Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

drm: atmel-hlcdc: add LCD controller layer definition for sama7d65

Add the LCD controller layer definition and atmel_hlcdc_of_match
entry for sama7d65.

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://patch.msgid.link/20251218040521.463937-3-manikandan.m@microchip.com
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>

authored by

Ryan Wanner and committed by
Manikandan Muralidharan
3d8fd28d b99deb61

+81
+81
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
··· 566 566 .ops = &atmel_xlcdc_ops, 567 567 }; 568 568 569 + static const struct atmel_hlcdc_layer_desc atmel_xlcdc_sama7d65_layers[] = { 570 + { 571 + .name = "base", 572 + .formats = &atmel_hlcdc_plane_rgb_formats, 573 + .regs_offset = 0x60, 574 + .id = 0, 575 + .type = ATMEL_HLCDC_BASE_LAYER, 576 + .cfgs_offset = 0x1c, 577 + .layout = { 578 + .xstride = { 2 }, 579 + .default_color = 3, 580 + .general_config = 4, 581 + .disc_pos = 5, 582 + .disc_size = 6, 583 + }, 584 + .clut_offset = 0x700, 585 + }, 586 + { 587 + .name = "overlay1", 588 + .formats = &atmel_hlcdc_plane_rgb_formats, 589 + .regs_offset = 0x160, 590 + .id = 1, 591 + .type = ATMEL_HLCDC_OVERLAY_LAYER, 592 + .cfgs_offset = 0x1c, 593 + .layout = { 594 + .pos = 2, 595 + .size = 3, 596 + .xstride = { 4 }, 597 + .pstride = { 5 }, 598 + .default_color = 6, 599 + .chroma_key = 7, 600 + .chroma_key_mask = 8, 601 + .general_config = 9, 602 + }, 603 + .clut_offset = 0xb00, 604 + }, 605 + { 606 + .name = "high-end-overlay", 607 + .formats = &atmel_hlcdc_plane_rgb_and_yuv_formats, 608 + .regs_offset = 0x360, 609 + .id = 2, 610 + .type = ATMEL_HLCDC_OVERLAY_LAYER, 611 + .cfgs_offset = 0x30, 612 + .layout = { 613 + .pos = 2, 614 + .size = 3, 615 + .memsize = 4, 616 + .xstride = { 5, 7 }, 617 + .pstride = { 6, 8 }, 618 + .default_color = 9, 619 + .chroma_key = 10, 620 + .chroma_key_mask = 11, 621 + .general_config = 12, 622 + .csc = 16, 623 + .scaler_config = 23, 624 + .vxs_config = 30, 625 + .hxs_config = 31, 626 + }, 627 + .clut_offset = 0x1300, 628 + }, 629 + }; 630 + 631 + static const struct atmel_hlcdc_dc_desc atmel_xlcdc_dc_sama7d65 = { 632 + .min_width = 0, 633 + .min_height = 0, 634 + .max_width = 2048, 635 + .max_height = 2048, 636 + .max_spw = 0x3ff, 637 + .max_vpw = 0x3ff, 638 + .max_hpw = 0x3ff, 639 + .fixed_clksrc = true, 640 + .is_xlcdc = true, 641 + .nlayers = ARRAY_SIZE(atmel_xlcdc_sama7d65_layers), 642 + .layers = atmel_xlcdc_sama7d65_layers, 643 + .ops = &atmel_xlcdc_ops, 644 + }; 645 + 569 646 static const struct of_device_id atmel_hlcdc_of_match[] = { 570 647 { 571 648 .compatible = "atmel,at91sam9n12-hlcdc", ··· 671 594 { 672 595 .compatible = "microchip,sam9x75-xlcdc", 673 596 .data = &atmel_xlcdc_dc_sam9x75, 597 + }, 598 + { 599 + .compatible = "microchip,sama7d65-xlcdc", 600 + .data = &atmel_xlcdc_dc_sama7d65, 674 601 }, 675 602 { /* sentinel */ }, 676 603 };