Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86:
x86: rdc: leds build/config fix
x86: sysfs cpu?/topology is empty in 2.6.25 (32-bit Intel system)
x86: revert commit 709f744 ("x86: bitops asm constraint fixes")
x86: restrict keyboard io ports reservation to make ipmi driver work
x86: fix fpu restore from sig return
x86: remove spew print out about bus to node mapping
x86: revert printk format warning change which is for linux-next
x86: cleanup PAT cpu validation
x86: geode: define geode_has_vsa2() even if CONFIG_MGEODE_LX is not set
x86: GEODE: cache results from geode_has_vsa2() and uninline
x86: revert geode config dependency
+136
-110
+1
-1
arch/x86/Kconfig
+1
-1
arch/x86/Kconfig
···
335
335
select GENERIC_GPIO
336
336
select LEDS_CLASS
337
337
select LEDS_GPIO
338
+
select NEW_LEDS
338
339
help
339
340
This option is needed for RDC R-321x system-on-chip, also known
340
341
as R-8610-(G).
···
1663
1662
1664
1663
config OLPC
1665
1664
bool "One Laptop Per Child support"
1666
-
depends on MGEODE_LX
1667
1665
default n
1668
1666
help
1669
1667
Add support for detecting the unique features of the OLPC
+21
arch/x86/kernel/cpu/addon_cpuid_features.c
+21
arch/x86/kernel/cpu/addon_cpuid_features.c
···
6
6
7
7
#include <linux/cpu.h>
8
8
9
+
#include <asm/pat.h>
9
10
#include <asm/processor.h>
10
11
11
12
struct cpuid_bit {
···
49
48
set_cpu_cap(c, cb->feature);
50
49
}
51
50
}
51
+
52
+
#ifdef CONFIG_X86_PAT
53
+
void __cpuinit validate_pat_support(struct cpuinfo_x86 *c)
54
+
{
55
+
switch (c->x86_vendor) {
56
+
case X86_VENDOR_AMD:
57
+
if (c->x86 >= 0xf && c->x86 <= 0x11)
58
+
return;
59
+
break;
60
+
case X86_VENDOR_INTEL:
61
+
if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
62
+
return;
63
+
break;
64
+
}
65
+
66
+
pat_disable(cpu_has_pat ?
67
+
"PAT disabled. Not yet verified on this CPU type." :
68
+
"PAT not supported by CPU.");
69
+
}
70
+
#endif
+2
-25
arch/x86/kernel/cpu/common.c
+2
-25
arch/x86/kernel/cpu/common.c
···
12
12
#include <asm/mmu_context.h>
13
13
#include <asm/mtrr.h>
14
14
#include <asm/mce.h>
15
+
#include <asm/pat.h>
15
16
#ifdef CONFIG_X86_LOCAL_APIC
16
17
#include <asm/mpspec.h>
17
18
#include <asm/apic.h>
···
309
308
310
309
}
311
310
312
-
clear_cpu_cap(c, X86_FEATURE_PAT);
313
-
314
-
switch (c->x86_vendor) {
315
-
case X86_VENDOR_AMD:
316
-
if (c->x86 >= 0xf && c->x86 <= 0x11)
317
-
set_cpu_cap(c, X86_FEATURE_PAT);
318
-
break;
319
-
case X86_VENDOR_INTEL:
320
-
if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
321
-
set_cpu_cap(c, X86_FEATURE_PAT);
322
-
break;
323
-
}
324
-
325
311
}
326
312
327
313
/*
···
397
409
init_scattered_cpuid_features(c);
398
410
}
399
411
400
-
clear_cpu_cap(c, X86_FEATURE_PAT);
401
-
402
-
switch (c->x86_vendor) {
403
-
case X86_VENDOR_AMD:
404
-
if (c->x86 >= 0xf && c->x86 <= 0x11)
405
-
set_cpu_cap(c, X86_FEATURE_PAT);
406
-
break;
407
-
case X86_VENDOR_INTEL:
408
-
if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
409
-
set_cpu_cap(c, X86_FEATURE_PAT);
410
-
break;
411
-
}
412
412
}
413
413
414
414
static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
···
627
651
cpu_devs[cvdev->vendor] = cvdev->cpu_dev;
628
652
629
653
early_cpu_detect();
654
+
validate_pat_support(&boot_cpu_data);
630
655
}
631
656
632
657
/* Make sure %fs is initialized properly in idle threads */
+19
arch/x86/kernel/geode_32.c
+19
arch/x86/kernel/geode_32.c
···
161
161
}
162
162
EXPORT_SYMBOL_GPL(geode_gpio_setup_event);
163
163
164
+
int geode_has_vsa2(void)
165
+
{
166
+
static int has_vsa2 = -1;
167
+
168
+
if (has_vsa2 == -1) {
169
+
/*
170
+
* The VSA has virtual registers that we can query for a
171
+
* signature.
172
+
*/
173
+
outw(VSA_VR_UNLOCK, VSA_VRC_INDEX);
174
+
outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX);
175
+
176
+
has_vsa2 = (inw(VSA_VRC_DATA) == VSA_SIG);
177
+
}
178
+
179
+
return has_vsa2;
180
+
}
181
+
EXPORT_SYMBOL_GPL(geode_has_vsa2);
182
+
164
183
static int __init geode_southbridge_init(void)
165
184
{
166
185
if (!is_geode())
+10
-2
arch/x86/kernel/i387.c
+10
-2
arch/x86/kernel/i387.c
···
450
450
{
451
451
struct task_struct *tsk = current;
452
452
453
-
clear_fpu(tsk);
454
453
return __copy_from_user(&tsk->thread.xstate->fsave, buf,
455
454
sizeof(struct i387_fsave_struct));
456
455
}
···
460
461
struct user_i387_ia32_struct env;
461
462
int err;
462
463
463
-
clear_fpu(tsk);
464
464
err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0],
465
465
sizeof(struct i387_fxsave_struct));
466
466
/* mxcsr reserved bits must be masked to zero for security reasons */
···
476
478
int err;
477
479
478
480
if (HAVE_HWFP) {
481
+
struct task_struct *tsk = current;
482
+
483
+
clear_fpu(tsk);
484
+
485
+
if (!used_math()) {
486
+
err = init_fpu(tsk);
487
+
if (err)
488
+
return err;
489
+
}
490
+
479
491
if (cpu_has_fxsr)
480
492
err = restore_i387_fxsave(buf);
481
493
else
+1
-1
arch/x86/kernel/setup.c
+1
-1
arch/x86/kernel/setup.c
···
95
95
96
96
/* Copy section for each CPU (we discard the original) */
97
97
size = PERCPU_ENOUGH_ROOM;
98
-
printk(KERN_INFO "PERCPU: Allocating %zd bytes of per cpu data\n",
98
+
printk(KERN_INFO "PERCPU: Allocating %lu bytes of per cpu data\n",
99
99
size);
100
100
101
101
for_each_possible_cpu(i) {
+6
-1
arch/x86/kernel/setup_32.c
+6
-1
arch/x86/kernel/setup_32.c
···
127
127
}, {
128
128
.name = "keyboard",
129
129
.start = 0x0060,
130
-
.end = 0x006f,
130
+
.end = 0x0060,
131
+
.flags = IORESOURCE_BUSY | IORESOURCE_IO
132
+
}, {
133
+
.name = "keyboard",
134
+
.start = 0x0064,
135
+
.end = 0x0064,
131
136
.flags = IORESOURCE_BUSY | IORESOURCE_IO
132
137
}, {
133
138
.name = "dma page reg",
+5
-8
arch/x86/kernel/setup_64.c
+5
-8
arch/x86/kernel/setup_64.c
···
70
70
#include <asm/ds.h>
71
71
#include <asm/topology.h>
72
72
#include <asm/trampoline.h>
73
+
#include <asm/pat.h>
73
74
74
75
#include <mach_apic.h>
75
76
#ifdef CONFIG_PARAVIRT
···
129
128
.flags = IORESOURCE_BUSY | IORESOURCE_IO },
130
129
{ .name = "timer1", .start = 0x50, .end = 0x53,
131
130
.flags = IORESOURCE_BUSY | IORESOURCE_IO },
132
-
{ .name = "keyboard", .start = 0x60, .end = 0x6f,
131
+
{ .name = "keyboard", .start = 0x60, .end = 0x60,
132
+
.flags = IORESOURCE_BUSY | IORESOURCE_IO },
133
+
{ .name = "keyboard", .start = 0x64, .end = 0x64,
133
134
.flags = IORESOURCE_BUSY | IORESOURCE_IO },
134
135
{ .name = "dma page reg", .start = 0x80, .end = 0x8f,
135
136
.flags = IORESOURCE_BUSY | IORESOURCE_IO },
···
1066
1063
if (c->extended_cpuid_level >= 0x80000007)
1067
1064
c->x86_power = cpuid_edx(0x80000007);
1068
1065
1069
-
1070
-
clear_cpu_cap(c, X86_FEATURE_PAT);
1071
-
1072
1066
switch (c->x86_vendor) {
1073
1067
case X86_VENDOR_AMD:
1074
1068
early_init_amd(c);
1075
-
if (c->x86 >= 0xf && c->x86 <= 0x11)
1076
-
set_cpu_cap(c, X86_FEATURE_PAT);
1077
1069
break;
1078
1070
case X86_VENDOR_INTEL:
1079
1071
early_init_intel(c);
1080
-
if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
1081
-
set_cpu_cap(c, X86_FEATURE_PAT);
1082
1072
break;
1083
1073
case X86_VENDOR_CENTAUR:
1084
1074
early_init_centaur(c);
1085
1075
break;
1086
1076
}
1087
1077
1078
+
validate_pat_support(c);
1088
1079
}
1089
1080
1090
1081
/*
+22
-28
arch/x86/mm/pat.c
+22
-28
arch/x86/mm/pat.c
···
25
25
#include <asm/mtrr.h>
26
26
#include <asm/io.h>
27
27
28
-
int pat_wc_enabled = 1;
28
+
#ifdef CONFIG_X86_PAT
29
+
int __read_mostly pat_wc_enabled = 1;
29
30
30
-
static u64 __read_mostly boot_pat_state;
31
+
void __init pat_disable(char *reason)
32
+
{
33
+
pat_wc_enabled = 0;
34
+
printk(KERN_INFO "%s\n", reason);
35
+
}
31
36
32
37
static int nopat(char *str)
33
38
{
34
-
pat_wc_enabled = 0;
35
-
printk(KERN_INFO "x86: PAT support disabled.\n");
36
-
39
+
pat_disable("PAT support disabled.");
37
40
return 0;
38
41
}
39
42
early_param("nopat", nopat);
43
+
#endif
40
44
41
-
static int pat_known_cpu(void)
42
-
{
43
-
if (!pat_wc_enabled)
44
-
return 0;
45
-
46
-
if (cpu_has_pat)
47
-
return 1;
48
-
49
-
pat_wc_enabled = 0;
50
-
printk(KERN_INFO "CPU and/or kernel does not support PAT.\n");
51
-
return 0;
52
-
}
45
+
static u64 __read_mostly boot_pat_state;
53
46
54
47
enum {
55
48
PAT_UC = 0, /* uncached */
···
59
66
{
60
67
u64 pat;
61
68
62
-
#ifndef CONFIG_X86_PAT
63
-
nopat(NULL);
64
-
#endif
65
-
66
-
/* Boot CPU enables PAT based on CPU feature */
67
-
if (!smp_processor_id() && !pat_known_cpu())
69
+
if (!pat_wc_enabled)
68
70
return;
69
71
70
-
/* APs enable PAT iff boot CPU has enabled it before */
71
-
if (smp_processor_id() && !pat_wc_enabled)
72
-
return;
72
+
/* Paranoia check. */
73
+
if (!cpu_has_pat) {
74
+
printk(KERN_ERR "PAT enabled, but CPU feature cleared\n");
75
+
/*
76
+
* Panic if this happens on the secondary CPU, and we
77
+
* switched to PAT on the boot CPU. We have no way to
78
+
* undo PAT.
79
+
*/
80
+
BUG_ON(boot_pat_state);
81
+
}
73
82
74
83
/* Set PWT to Write-Combining. All other bits stay the same */
75
84
/*
···
90
95
PAT(4,WB) | PAT(5,WC) | PAT(6,UC_MINUS) | PAT(7,UC);
91
96
92
97
/* Boot CPU check */
93
-
if (!smp_processor_id()) {
98
+
if (!boot_pat_state)
94
99
rdmsrl(MSR_IA32_CR_PAT, boot_pat_state);
95
-
}
96
100
97
101
wrmsrl(MSR_IA32_CR_PAT, pat);
98
102
printk(KERN_INFO "x86 PAT enabled: cpu %d, old 0x%Lx, new 0x%Lx\n",
-8
arch/x86/pci/k8-bus_64.c
-8
arch/x86/pci/k8-bus_64.c
···
504
504
}
505
505
}
506
506
507
-
#ifdef CONFIG_NUMA
508
-
for (i = 0; i < BUS_NR; i++) {
509
-
node = mp_bus_to_node[i];
510
-
if (node >= 0)
511
-
printk(KERN_DEBUG "bus: %02x to node: %02x\n", i, node);
512
-
}
513
-
#endif
514
-
515
507
for (i = 0; i < pci_root_num; i++) {
516
508
int res_num;
517
509
int busnum;
+17
-20
include/asm-x86/bitops.h
+17
-20
include/asm-x86/bitops.h
···
23
23
#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 1)
24
24
/* Technically wrong, but this avoids compilation errors on some gcc
25
25
versions. */
26
-
#define ADDR "=m" (*(volatile long *)addr)
27
-
#define BIT_ADDR "=m" (((volatile int *)addr)[nr >> 5])
26
+
#define ADDR "=m" (*(volatile long *) addr)
28
27
#else
29
28
#define ADDR "+m" (*(volatile long *) addr)
30
-
#define BIT_ADDR "+m" (((volatile int *)addr)[nr >> 5])
31
29
#endif
32
-
#define BASE_ADDR "m" (*(volatile int *)addr)
33
30
34
31
/**
35
32
* set_bit - Atomically set a bit in memory
···
74
77
*/
75
78
static inline void clear_bit(int nr, volatile void *addr)
76
79
{
77
-
asm volatile(LOCK_PREFIX "btr %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR);
80
+
asm volatile(LOCK_PREFIX "btr %1,%0" : ADDR : "Ir" (nr));
78
81
}
79
82
80
83
/*
···
93
96
94
97
static inline void __clear_bit(int nr, volatile void *addr)
95
98
{
96
-
asm volatile("btr %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR);
99
+
asm volatile("btr %1,%0" : ADDR : "Ir" (nr));
97
100
}
98
101
99
102
/*
···
128
131
*/
129
132
static inline void __change_bit(int nr, volatile void *addr)
130
133
{
131
-
asm volatile("btc %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR);
134
+
asm volatile("btc %1,%0" : ADDR : "Ir" (nr));
132
135
}
133
136
134
137
/**
···
142
145
*/
143
146
static inline void change_bit(int nr, volatile void *addr)
144
147
{
145
-
asm volatile(LOCK_PREFIX "btc %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR);
148
+
asm volatile(LOCK_PREFIX "btc %1,%0" : ADDR : "Ir" (nr));
146
149
}
147
150
148
151
/**
···
188
191
{
189
192
int oldbit;
190
193
191
-
asm volatile("bts %2,%3\n\t"
192
-
"sbb %0,%0"
193
-
: "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR);
194
+
asm("bts %2,%1\n\t"
195
+
"sbb %0,%0"
196
+
: "=r" (oldbit), ADDR
197
+
: "Ir" (nr));
194
198
return oldbit;
195
199
}
196
200
···
227
229
{
228
230
int oldbit;
229
231
230
-
asm volatile("btr %2,%3\n\t"
232
+
asm volatile("btr %2,%1\n\t"
231
233
"sbb %0,%0"
232
-
: "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR);
234
+
: "=r" (oldbit), ADDR
235
+
: "Ir" (nr));
233
236
return oldbit;
234
237
}
235
238
···
239
240
{
240
241
int oldbit;
241
242
242
-
asm volatile("btc %2,%3\n\t"
243
+
asm volatile("btc %2,%1\n\t"
243
244
"sbb %0,%0"
244
-
: "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR);
245
+
: "=r" (oldbit), ADDR
246
+
: "Ir" (nr) : "memory");
245
247
246
248
return oldbit;
247
249
}
···
276
276
{
277
277
int oldbit;
278
278
279
-
asm volatile("bt %2,%3\n\t"
279
+
asm volatile("bt %2,%1\n\t"
280
280
"sbb %0,%0"
281
281
: "=r" (oldbit)
282
-
: "m" (((volatile const int *)addr)[nr >> 5]),
283
-
"Ir" (nr), BASE_ADDR);
282
+
: "m" (*(unsigned long *)addr), "Ir" (nr));
284
283
285
284
return oldbit;
286
285
}
···
396
397
}
397
398
#endif /* __KERNEL__ */
398
399
399
-
#undef BASE_ADDR
400
-
#undef BIT_ADDR
401
400
#undef ADDR
402
401
403
402
static inline void set_bit_string(unsigned long *bitmap,
+5
-7
include/asm-x86/geode.h
+5
-7
include/asm-x86/geode.h
···
185
185
return (is_geode_gx() || is_geode_lx());
186
186
}
187
187
188
-
/*
189
-
* The VSA has virtual registers that we can query for a signature.
190
-
*/
188
+
#ifdef CONFIG_MGEODE_LX
189
+
extern int geode_has_vsa2(void);
190
+
#else
191
191
static inline int geode_has_vsa2(void)
192
192
{
193
-
outw(VSA_VR_UNLOCK, VSA_VRC_INDEX);
194
-
outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX);
195
-
196
-
return (inw(VSA_VRC_DATA) == VSA_SIG);
193
+
return 0;
197
194
}
195
+
#endif
198
196
199
197
/* MFGPTs */
200
198
+9
-1
include/asm-x86/i387.h
+9
-1
include/asm-x86/i387.h
···
175
175
*/
176
176
static inline int restore_i387(struct _fpstate __user *buf)
177
177
{
178
-
set_used_math();
178
+
struct task_struct *tsk = current;
179
+
int err;
180
+
181
+
if (!used_math()) {
182
+
err = init_fpu(tsk);
183
+
if (err)
184
+
return err;
185
+
}
186
+
179
187
if (!(task_thread_info(current)->status & TS_USEDFPU)) {
180
188
clts();
181
189
task_thread_info(current)->status |= TS_USEDFPU;
+8
include/asm-x86/pat.h
+8
include/asm-x86/pat.h
···
4
4
5
5
#include <linux/types.h>
6
6
7
+
#ifdef CONFIG_X86_PAT
7
8
extern int pat_wc_enabled;
9
+
extern void validate_pat_support(struct cpuinfo_x86 *c);
10
+
#else
11
+
static const int pat_wc_enabled = 0;
12
+
static inline void validate_pat_support(struct cpuinfo_x86 *c) { }
13
+
#endif
8
14
9
15
extern void pat_init(void);
10
16
11
17
extern int reserve_memtype(u64 start, u64 end,
12
18
unsigned long req_type, unsigned long *ret_type);
13
19
extern int free_memtype(u64 start, u64 end);
20
+
21
+
extern void pat_disable(char *reason);
14
22
15
23
#endif
16
24
+10
-8
include/asm-x86/topology.h
+10
-8
include/asm-x86/topology.h
···
25
25
#ifndef _ASM_X86_TOPOLOGY_H
26
26
#define _ASM_X86_TOPOLOGY_H
27
27
28
+
#ifdef CONFIG_X86_32
29
+
# ifdef CONFIG_X86_HT
30
+
# define ENABLE_TOPO_DEFINES
31
+
# endif
32
+
#else
33
+
# ifdef CONFIG_SMP
34
+
# define ENABLE_TOPO_DEFINES
35
+
# endif
36
+
#endif
37
+
28
38
#ifdef CONFIG_NUMA
29
39
#include <linux/cpumask.h>
30
40
#include <asm/mpspec.h>
···
140
130
extern unsigned long node_remap_size[];
141
131
#define node_has_online_mem(nid) (node_start_pfn[nid] != node_end_pfn[nid])
142
132
143
-
# ifdef CONFIG_X86_HT
144
-
# define ENABLE_TOPO_DEFINES
145
-
# endif
146
-
147
133
# define SD_CACHE_NICE_TRIES 1
148
134
# define SD_IDLE_IDX 1
149
135
# define SD_NEWIDLE_IDX 2
150
136
# define SD_FORKEXEC_IDX 0
151
137
152
138
#else
153
-
154
-
# ifdef CONFIG_SMP
155
-
# define ENABLE_TOPO_DEFINES
156
-
# endif
157
139
158
140
# define SD_CACHE_NICE_TRIES 2
159
141
# define SD_IDLE_IDX 2