Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c fix from Wolfram Sang:
"Here is the revert for the regression of the i2c-octeon driver I
mentioned last time. I wished for a bit more feedback, but all people
working actively on it are in need of this patch, so here it goes"
* 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
Revert "i2c: octeon: thunderx: Limit register access retries"
+12
-19
+1
-3
drivers/i2c/busses/i2c-octeon-core.c
+1
-3
drivers/i2c/busses/i2c-octeon-core.c
+11
-16
drivers/i2c/busses/i2c-octeon-core.h
+11
-16
drivers/i2c/busses/i2c-octeon-core.h
···
5
5
#include <linux/i2c.h>
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6
#include <linux/i2c-smbus.h>
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7
#include <linux/io.h>
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-
#include <linux/iopoll.h>
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8
#include <linux/kernel.h>
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9
#include <linux/pci.h>
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10
···
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u64 tmp;
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__raw_writeq(SW_TWSI_V | eop_reg | data, i2c->twsi_base + SW_TWSI(i2c));
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-
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-
readq_poll_timeout(i2c->twsi_base + SW_TWSI(i2c), tmp, tmp & SW_TWSI_V,
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-
I2C_OCTEON_EVENT_WAIT, i2c->adap.timeout);
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+
do {
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+
tmp = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
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+
} while ((tmp & SW_TWSI_V) != 0);
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}
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#define octeon_i2c_ctl_write(i2c, val) \
···
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*
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* The I2C core registers are accessed indirectly via the SW_TWSI CSR.
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*/
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-
static inline int octeon_i2c_reg_read(struct octeon_i2c *i2c, u64 eop_reg,
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-
int *error)
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+
static inline u8 octeon_i2c_reg_read(struct octeon_i2c *i2c, u64 eop_reg)
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{
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u64 tmp;
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-
int ret;
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__raw_writeq(SW_TWSI_V | eop_reg | SW_TWSI_R, i2c->twsi_base + SW_TWSI(i2c));
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+
do {
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+
tmp = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
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+
} while ((tmp & SW_TWSI_V) != 0);
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-
ret = readq_poll_timeout(i2c->twsi_base + SW_TWSI(i2c), tmp,
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tmp & SW_TWSI_V, I2C_OCTEON_EVENT_WAIT,
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-
i2c->adap.timeout);
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-
if (error)
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-
*error = ret;
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return tmp & 0xFF;
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}
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#define octeon_i2c_ctl_read(i2c) \
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octeon_i2c_reg_read(i2c, SW_TWSI_EOP_TWSI_CTL, NULL)
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-
#define octeon_i2c_data_read(i2c, error) \
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octeon_i2c_reg_read(i2c, SW_TWSI_EOP_TWSI_DATA, error)
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+
octeon_i2c_reg_read(i2c, SW_TWSI_EOP_TWSI_CTL)
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+
#define octeon_i2c_data_read(i2c) \
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+
octeon_i2c_reg_read(i2c, SW_TWSI_EOP_TWSI_DATA)
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#define octeon_i2c_stat_read(i2c) \
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-
octeon_i2c_reg_read(i2c, SW_TWSI_EOP_TWSI_STAT, NULL)
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+
octeon_i2c_reg_read(i2c, SW_TWSI_EOP_TWSI_STAT)
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/**
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* octeon_i2c_read_int - read the TWSI_INT register