Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
net/mlx5e: Extend TC max ratelimit using max_bw_value_msb
The per-TC rate limit was restricted to 255 Gbps due to the 8-bit
max_bw_value field in the QETC register.
This limit is insufficient for newer, higher-bandwidth NICs.
Extend the rate limit by using the full 16-bit max_bw_value field.
This allows the finer 100Mbps granularity to be used for rates up to
~6.5 Tbps, instead of switching to 1Gbps granularity at higher rates.
The extended range is only used when the device advertises support
via the qetcr_qshr_max_bw_val_msb capability bit in the QCAM register.
Signed-off-by: Alexei Lazar <alazar@nvidia.com>
Reviewed-by: Dragos Tatulea <dtatulea@nvidia.com>
Reviewed-by: Gal Pressman <gal@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260203073021.1710806-2-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
authored by
Alexei Lazar
and committed by
Jakub Kicinski
3e5aa52b
23fb09db
+44
-34
+4
drivers/net/ethernet/mellanox/mlx5/core/en/dcbnl.h
+4
drivers/net/ethernet/mellanox/mlx5/core/en/dcbnl.h
+36
-30
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
+36
-30
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
···
58
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MLX5_DCB_CHG_NO_RESET,
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};
60
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61
+
static const struct {
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+
int scale;
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+
const char *units_str;
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+
} mlx5e_bw_units[] = {
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+
[MLX5_100_MBPS_UNIT] = {
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+
.scale = 100,
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+
.units_str = "Mbps",
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+
},
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+
[MLX5_GBPS_UNIT] = {
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.scale = 1,
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.units_str = "Gbps",
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+
},
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+
};
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+
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#define MLX5_DSCP_SUPPORTED(mdev) (MLX5_CAP_GEN(mdev, qcam_reg) && \
62
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MLX5_CAP_QCAM_REG(mdev, qpts) && \
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MLX5_CAP_QCAM_REG(mdev, qpdpm))
···
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{
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struct mlx5e_priv *priv = netdev_priv(netdev);
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struct mlx5_core_dev *mdev = priv->mdev;
576
-
u8 max_bw_value[IEEE_8021QAZ_MAX_TCS];
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+
u16 max_bw_value[IEEE_8021QAZ_MAX_TCS];
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u8 max_bw_unit[IEEE_8021QAZ_MAX_TCS];
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int err;
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int i;
···
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{
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struct mlx5e_priv *priv = netdev_priv(netdev);
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struct mlx5_core_dev *mdev = priv->mdev;
611
-
u8 max_bw_value[IEEE_8021QAZ_MAX_TCS];
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+
u16 max_bw_value[IEEE_8021QAZ_MAX_TCS];
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u8 max_bw_unit[IEEE_8021QAZ_MAX_TCS];
613
-
u64 upper_limit_100mbps;
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-
u64 upper_limit_gbps;
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int i;
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-
struct {
617
-
int scale;
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-
const char *units_str;
619
-
} units[] = {
620
-
[MLX5_100_MBPS_UNIT] = {
621
-
.scale = 100,
622
-
.units_str = "Mbps",
623
-
},
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-
[MLX5_GBPS_UNIT] = {
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-
.scale = 1,
626
-
.units_str = "Gbps",
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-
},
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-
};
629
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memset(max_bw_value, 0, sizeof(max_bw_value));
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memset(max_bw_unit, 0, sizeof(max_bw_unit));
632
-
upper_limit_100mbps = U8_MAX * MLX5E_100MB_TO_KB;
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-
upper_limit_gbps = U8_MAX * MLX5E_1GB_TO_KB;
634
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for (i = 0; i <= mlx5_max_tc(mdev); i++) {
636
-
if (!maxrate->tc_maxrate[i]) {
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+
u64 rate = maxrate->tc_maxrate[i];
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+
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+
if (!rate) {
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max_bw_unit[i] = MLX5_BW_NO_LIMIT;
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continue;
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}
640
-
if (maxrate->tc_maxrate[i] <= upper_limit_100mbps) {
641
-
max_bw_value[i] = div_u64(maxrate->tc_maxrate[i],
642
-
MLX5E_100MB_TO_KB);
611
+
if (rate <= priv->dcbx.upper_limit_100mbps) {
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+
max_bw_value[i] = div_u64(rate, MLX5E_100MB_TO_KB);
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max_bw_value[i] = max_bw_value[i] ? max_bw_value[i] : 1;
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max_bw_unit[i] = MLX5_100_MBPS_UNIT;
645
-
} else if (maxrate->tc_maxrate[i] <= upper_limit_gbps) {
646
-
max_bw_value[i] = div_u64(maxrate->tc_maxrate[i],
647
-
MLX5E_1GB_TO_KB);
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+
} else if (rate <= priv->dcbx.upper_limit_gbps) {
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+
max_bw_value[i] = div_u64(rate, MLX5E_1GB_TO_KB);
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max_bw_unit[i] = MLX5_GBPS_UNIT;
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} else {
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netdev_err(netdev,
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"tc_%d maxrate %llu Kbps exceeds limit %llu\n",
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-
i, maxrate->tc_maxrate[i],
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-
upper_limit_gbps);
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+
i, rate, priv->dcbx.upper_limit_gbps);
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return -EINVAL;
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}
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}
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for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
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+
u8 unit = max_bw_unit[i];
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+
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netdev_dbg(netdev, "%s: tc_%d <=> max_bw %u %s\n", __func__, i,
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-
max_bw_value[i] * units[max_bw_unit[i]].scale,
661
-
units[max_bw_unit[i]].units_str);
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+
max_bw_value[i] * mlx5e_bw_units[unit].scale,
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+
mlx5e_bw_units[unit].units_str);
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}
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return mlx5_modify_port_ets_rate_limit(mdev, max_bw_value, max_bw_unit);
···
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void mlx5e_dcbnl_initialize(struct mlx5e_priv *priv)
1267
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{
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struct mlx5e_dcbx *dcbx = &priv->dcbx;
1271
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bool max_bw_msb_supported;
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+
u16 type_max;
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mlx5e_trust_initialize(priv);
1271
1275
···
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priv->dcbx.port_buff_cell_sz = mlx5e_query_port_buffers_cell_size(priv);
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priv->dcbx.cable_len = MLX5E_DEFAULT_CABLE_LEN;
1287
+
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max_bw_msb_supported = MLX5_CAP_QCAM_FEATURE(priv->mdev,
1289
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qetcr_qshr_max_bw_val_msb);
1290
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type_max = max_bw_msb_supported ? U16_MAX : U8_MAX;
1291
+
priv->dcbx.upper_limit_100mbps = type_max * MLX5E_100MB_TO_KB;
1292
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priv->dcbx.upper_limit_gbps = type_max * MLX5E_1GB_TO_KB;
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mlx5e_ets_init(priv);
1289
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}
+2
-2
drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h
+2
-2
drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h
···
345
345
int mlx5_query_port_tc_bw_alloc(struct mlx5_core_dev *mdev,
346
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u8 tc, u8 *bw_pct);
347
347
int mlx5_modify_port_ets_rate_limit(struct mlx5_core_dev *mdev,
348
-
u8 *max_bw_value,
348
+
u16 *max_bw_value,
349
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u8 *max_bw_unit);
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int mlx5_query_port_ets_rate_limit(struct mlx5_core_dev *mdev,
351
-
u8 *max_bw_value,
351
+
u16 *max_bw_value,
352
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u8 *max_bw_unit);
353
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int mlx5_set_port_wol(struct mlx5_core_dev *mdev, u8 wol_mode);
354
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int mlx5_query_port_wol(struct mlx5_core_dev *mdev, u8 *wol_mode);
+2
-2
drivers/net/ethernet/mellanox/mlx5/core/port.c
+2
-2
drivers/net/ethernet/mellanox/mlx5/core/port.c
···
773
773
}
774
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775
775
int mlx5_modify_port_ets_rate_limit(struct mlx5_core_dev *mdev,
776
-
u8 *max_bw_value,
776
+
u16 *max_bw_value,
777
777
u8 *max_bw_units)
778
778
{
779
779
u32 in[MLX5_ST_SZ_DW(qetc_reg)] = {0};
···
796
796
}
797
797
798
798
int mlx5_query_port_ets_rate_limit(struct mlx5_core_dev *mdev,
799
-
u8 *max_bw_value,
799
+
u16 *max_bw_value,
800
800
u8 *max_bw_units)
801
801
{
802
802
u32 out[MLX5_ST_SZ_DW(qetc_reg)];